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Ru Huang 0001
Person information
- affiliation: Peking University, School of Integrated Circuits, Beijing, China
- affiliation (PhD 1997): Peking University, Institute of Microelectronics, Beijing, China
Other persons with the same name
- Ru Huang 0002 — East China University of Science and Technology, School of Information Science and Engineering, Shanghai, China (and 1 more)
- Ru Huang 0003 — IQVIA (and 2 more)
- Ru Huang 0004 — Nanning University, China
- Ru Huang 0005 — Nanjing Research Institute of Electronic Engineering, China
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2020 – today
- 2024
- [j90]Lindong Wu, Zongwei Wang, Lin Bao, Linbo Shan, Zhizhen Yu, Yunfan Yang, Shuangjie Zhang, Guandong Bai, Cuimei Wang, John Robertson, Yuan Wang, Yimao Cai, Ru Huang:
Investigation and mitigation of Mott neuronal oscillation fluctuation in spiking neural network. Sci. China Inf. Sci. 67(2) (2024) - [j89]Xiaohan Gao, Haoyi Zhang, Siyuan Ye, Mingjie Liu, David Z. Pan, Linxiao Shen, Runsheng Wang, Yibo Lin, Ru Huang:
Post-layout simulation driven analog circuit sizing. Sci. China Inf. Sci. 67(4) (2024) - [j88]Yaotian Ling, Zongwei Wang, Yuhang Yang, Lin Bao, Shengyu Bao, Qishen Wang, Yimao Cai, Ru Huang:
An isolated symmetrical 2T2R cell enabling high precision and high density for RRAM-based in-memory computing. Sci. China Inf. Sci. 67(5) (2024) - [j87]Shiyuan Liu, Xiong Xiong, Xin Wang, Xinhang Shi, Ru Huang, Yanqing Wu:
Hole mobility enhancement in monolayer WSe2 p-type transistors through molecular doping. Sci. China Inf. Sci. 67(6) (2024) - [j86]Heyi Li, Kaixuan Du, Yuanxin Bao, Yanchi Dong, Jiayoon Ru, Han Xiao, Hao Zhang, Zhixuan Wang, Yi Zhong, Linxiao Shen, Le Ye, Ru Huang:
A 0.39-mm2 Stacked Standard-CMOS Humidity Sensor Using a Charge-Redistribution Correlated Level Shifting Floating Inverter Amplifier and a VCO-Based Zoom CDC. IEEE J. Solid State Circuits 59(2): 435-448 (2024) - [j85]Junjie Wang, Teng Zhang, Shuang Liu, Yihe Liu, Yuancong Wu, Shaogang Hu, Tupei Chen, Yang Liu, Yuchao Yang, Ru Huang:
Design and Implementation of a Hybrid, ADC/DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip. IEEE J. Solid State Circuits 59(2): 595-604 (2024) - [j84]Jiahao Song, Xiyuan Tang, Haoyang Luo, Haoyi Zhang, Xin Qiao, Zixuan Sun, Xiangxing Yang, Zihan Wu, Yuan Wang, Runsheng Wang, Ru Huang:
A 4-bit Calibration-Free Computing-In-Memory Macro With 3T1C Current-Programed Dynamic-Cascode Multi-Level-Cell eDRAM. IEEE J. Solid State Circuits 59(3): 842-854 (2024) - [j83]Yufei Chen, Zizheng Guo, Runsheng Wang, Ru Huang, Yibo Lin, Cheng Zhuo:
Dynamic Supply Noise Aware Timing Analysis With JIT Machine Learning Integration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5): 1511-1524 (2024) - [j82]Yihan Fu, Daijing Shi, Anjunyi Fan, Wenshuo Yue, Yuchao Yang, Ru Huang, Bonan Yan:
Probabilistic Compute-in-Memory Design for Efficient Markov Chain Monte Carlo Sampling. IEEE Trans. Circuits Syst. I Regul. Pap. 71(2): 703-716 (2024) - [j81]Hai-Bao Chen, Xinjie Zhang, Wenjie Zhu, Jie Chen, Pengpeng Ren, Zhigang Ji, Junhua Liu, Runsheng Wang, Ru Huang:
DRGA-Based Second-Order Block Arnoldi Method for Model Order Reduction of MIMO RCS Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 71(5): 2410-2423 (2024) - [j80]Ying Liu, Zhiyuan Chen, Wentao Zhao, Tianhao Zhao, Tianyu Jia, Zhixuan Wang, Ru Huang, Le Ye, Yufei Ma:
Sparsity-Aware In-Memory Neuromorphic Computing Unit With Configurable Topology of Hybrid Spiking and Artificial Neural Network. IEEE Trans. Circuits Syst. I Regul. Pap. 71(6): 2660-2673 (2024) - [j79]Yufei Ma, Yikan Qiu, Wentao Zhao, Guoxiang Li, Meng Wu, Tianyu Jia, Le Ye, Ru Huang:
DCIM-GCN: Digital Computing-in-Memory Accelerator for Graph Convolutional Network. IEEE Trans. Circuits Syst. I Regul. Pap. 71(6): 2735-2748 (2024) - [j78]Yaotian Ling, Zongwei Wang, Lindong Wu, Yimao Cai, Ru Huang:
An RRAM-Based Hierarchical Computing-in-Memory Architecture With Synchronous Parallelism for 3-D Point Cloud Recognition. IEEE Trans. Circuits Syst. II Express Briefs 71(10): 4412-4416 (2024) - [c142]Jie Li, Linxiao Shen, Siyuan Ye, Jihang Gao, Jiajia Cui, Xinhang Xu, Zhuoyi Chen, Yaohui Luan, Yuanxin Bao, Ru Huang, Le Ye:
An 8b 1GS/s SAR ADC with Metastability-Based Resolution/Speed Enhancement and Self-Tuning Delay Achieving 47.2dB SNDR at Nyquist Input. CICC 2024: 1-2 - [c141]Yikan Qiu, Yufei Ma, Meng Wu, Yifan Jia, Xinyu Qu, Zecheng Zhou, Jincheng Lou, Tianyu Jia, Le Ye, Ru Huang:
Quartet: A 22nm 0.09mJ/lnference Digital Compute-in-Memory Versatile AI Accelerator with Heterogeneous Tensor Engines and Off-Chip-Less Dataflow. CICC 2024: 1-2 - [c140]Meng Wu, Wenjie Ren, Peiyu Chen, Wentao Zhao, Yiqi Jing, Jiayoon Ru, Zhixuan Wang, Yufei Ma, Ru Huang, Tianyu Jia, Le Ye:
S2D-CIM: A 22nm 128Kb Systolic Digital Compute-in-Memory Macro with Domino Data Path for Flexible Vector Operation and 2-D Weight Update in Edge AI Applications. CICC 2024: 1-2 - [c139]Weikai Xu, Jin Luo, Qianqian Huang, Ru Huang:
Compact and Efficient CAM Architecture through Combinatorial Encoding and Self-Terminating Searching for In-Memory-Searching Accelerator. DAC 2024: 34:1-34:6 - [c138]Yufan Du, Zizheng Guo, Xun Jiang, Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Runsheng Wang, Ru Huang:
PowPrediCT: Cross-Stage Power Prediction with Circuit-Transformation-Aware Learning. DAC 2024: 36:1-36:6 - [c137]Haoyi Zhang, Jiahao Song, Xiaohan Gao, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang:
EasyACIM: An End-to-End Automated Analog CIM with Synthesizable Architecture and Agile Design Space Exploration. DAC 2024: 75:1-75:6 - [c136]Yiqi Jing, Meng Wu, Jiaqi Zhou, Yiyang Sun, Yufei Ma, Ru Huang, Tianyu Jia, Le Ye:
AIG-CIM: A Scalable Chiplet Module with Tri-Gear Heterogeneous Compute-in-Memory for Diffusion Acceleration. DAC 2024: 145:1-145:6 - [c135]Chenqi Lin, Tianshi Xu, Zebin Yang, Runsheng Wang, Ru Huang, Meng Li:
FastQuery: Communication-efficient Embedding Table Query for Private LLMs inference. DAC 2024: 146:1-146:6 - [c134]Zhiyuan Chen, Yufei Ma, Keyi Li, Yifan Jia, Guoxiang Li, Meng Wu, Tianyu Jia, Le Ye, Ru Huang:
An In-Memory Computing Accelerator with Reconfigurable Dataflow for Multi-Scale Vision Transformer with Hybrid Topology. DAC 2024: 245:1-245:6 - [c133]Zizheng Guo, Tsung-Wei Huang, Zhou Jin, Cheng Zhuo, Yibo Lin, Runsheng Wang, Ru Huang:
Heterogeneous Static Timing Analysis with Advanced Delay Calculator. DATE 2024: 1-6 - [c132]Lunshuai Pan, Pushen Zuo, Yubiao Luo, Zhong Sun, Ru Huang:
BlockAMC: Scalable In-Memory Analog Matrix Computing for Solving Linear Systems. DATE 2024: 1-6 - [c131]Hanyong Shao, Boyi Fu, Jinghao Yang, Wenpu Luo, Chang Su, Zhiyuan Fu, Kechao Tang, Ru Huang:
IMCE: An In-Memory Computing and Encrypting Hardware Architecture for Robust Edge Security. DATE 2024: 1-6 - [c130]Tong Xie, Yixuan Hu, Renjie Wei, Meng Li, Yuan Wang, Runsheng Wang, Ru Huang:
ASCEND: Accurate yet Efficient End-to-End Stochastic Computing Acceleration of Vision Transformer. DATE 2024: 1-6 - [c129]Haoyi Zhang, Xiaohan Gao, Zilong Shen, Jiahao Song, Xiaoxu Cheng, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang:
SAGERoute 2.0: Hierarchical Analog and Mixed Signal Routing Considering Versatile Routing Scenarios. DATE 2024: 1-6 - [c128]Xun Jiang, Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Runsheng Wang, Ru Huang:
CircuitNet 2.0: An Advanced Dataset for Promoting Machine Learning Innovations in Realistic Chip Design Environment. ICLR 2024 - [c127]Jingwei Sun, Zongwei Wang, Jiajun Gao, Linbo Shan, Qishen Wang, Yuhang Yang, Yimao Cai, Ru Huang:
ASAP: An Efficient and Reliable Programming Algorithm for Multi-level RRAM Cell. IRPS 2024: 1-4 - [c126]Shiyu Xia, Longda Zhou, Kewei Wang, Xiaobin Fan, Yongkang Xue, Qi Shan, Hannian Wang, Pengpeng Ren, Zhigang Ji, Ru Huang:
Convolution-Based Vth Shift Prediction and the New 9T2C Pixel Circuit in LTPS TFT AMOLED. IRPS 2024: 1-7 - [c125]Yongkang Xue, Miaojia Yuan, Yu Li, Da Wang, Maokun Wu, Pengpeng Ren, Lining Zhang, Runsheng Wang, Zhigang Ji, Ru Huang:
Investigation of Positive Bias Temperature Instability in advanced FinFET nodes. IRPS 2024: 1-5 - [c124]Zirui Wang, Haoran Wang, Yuxiao Wang, Zixuan Sun, Lang Zeng, Runsheng Wang, Ru Huang:
New Insights into the Random Telegraph Noise (RTN) in FinFETs at Cryogenic Temperature. IRPS 2024: 6 - [c123]Sihao Chen, Yu Li, Baokang Peng, Zixuan Sun, Lining Zhang, Runsheng Wang, Ru Huang:
Accelerating Device-Circuit Self-Heating Simulations with Dynamic Time Evolution for GAAFET. IRPS 2024: 7 - [c122]Da Wang, Yongkang Xue, Yong Liu, Pengpeng Ren, Zixuan Sun, Zirui Wang, Yueyang Liu, Zhijun Cheng, Haiyang Yang, Xiangli Liu, Blacksmith Wu, Kanyu Cao, Runsheng Wang, Zhigang Ji, Ru Huang:
Sub-20-nm DRAM Technology under Negative Bias Temperature Instability (NBTI): from Characterization to Physical Origin Identification. IRPS 2024: 9 - [c121]Zixuan Sun, Yongkang Xue, Haoran Lu, Pengpeng Ren, Zirui Wang, Zhigang Ji, Runsheng Wang, Ru Huang:
Investigation of Interplays between Body Biasing and Hot Carrier Degradation (HCD) in Advanced NMOS FinFETs. IRPS 2024: 72 - [c120]Xinhang Xu, Siyuan Ye, Yaohui Luan, Jihang Gao, Jie Li, Jiajia Cui, Hao Zhang, Ru Huang, Linxiao Shen, Le Ye:
3.10 A 0.69/0.58-PEF 1.6nW/24nW Capacitively Coupled Chopper Instrumentation Amplifier with an Input-Boosted First Stage in 22nm/180nm CMOS. ISSCC 2024: 72-74 - [c119]Siyuan Ye, Linxiao Shen, Jihang Gao, Jie Li, Zhuoyi Chen, Xinhang Xu, Jiajia Cui, Hao Zhang, Xing Zhang, Le Ye, Ru Huang:
9.1 A 2mW 70.7dB SNDR 200MS/s Pipelined-SAR ADC with Continuous-Time SAR-Assisted Detect-and-Skip and Open-then-Close Correlated Level Shifting. ISSCC 2024: 168-170 - [c118]Zhuoyi Chen, Linxiao Shen, Siyuan Ye, Jihang Gao, Jie Li, Jiajia Cui, Xinhang Xu, Yaohui Luan, Hao Zhang, Le Ye, Ru Huang:
9.4 A 182.3dB FoMs 50MS/s Pipelined-SAR ADC using Cascode Capacitively Degenerated Dynamic Amplifier and MSB Pre-Conversion Technique. ISSCC 2024: 174-176 - [c117]Ying Liu, Yufei Ma, Ninghui Shang, Tianhao Zhao, Peiyu Chen, Meng Wu, Jiayoon Ru, Tianyu Jia, Le Ye, Zhixuan Wang, Ru Huang:
30.2 A 22nm 0.26nW/Synapse Spike-Driven Spiking Neural Network Processing Unit Using Time-Step-First Dataflow and Sparsity-Adaptive In-Memory Computing. ISSCC 2024: 484-486 - [c116]Jiahao Song, Zihan Wu, Xiyuan Tang, Bocheng Xu, Haoyang Luo, Youming Yang, Yuan Wang, Runsheng Wang, Ru Huang:
30.5 A Variation-Tolerant In-eDRAM Continuous-Time Ising Machine Featuring 15-Level Coefficients and Leaked Negative-Feedback Annealing. ISSCC 2024: 490-492 - [c115]Ruifan Xu, Jin Luo, Yawen Zhang, Yibo Lin, Runsheng Wang, Ru Huang, Yun Liang:
Hestia: An Efficient Cross-Level Debugger for High-Level Synthesis. MICRO 2024: 765-779 - [c114]Yanchi Dong, Xueping Liu, Kangbo Bai, Guoxiang Li, Meng Wu, Yiqi Jing, Yihan Zhang, Pixian Zhan, Yadong Zhang, Yufei Ma, Ru Huang, Le Ye, Tianyu Jia:
A Heterogeneous TinyML SoC with Energy-Event-Performance-Aware Management and Compute-in-Memory Two-Stage Event-Driven Wakeup. VLSI Technology and Circuits 2024: 1-2 - [c113]Haoran Lu, Yandong Ge, Xun Jiang, Jiacheng Sun, Wanyue Peng, Rui Guo, Ming Li, Yibo Lin, Runsheng Wang, Heng Wu, Ru Huang:
First Experimental Demonstration of Self-Aligned Flip FET (FFET): A Breakthrough Stacked Transistor Technology with 2.5T Design, Dual-Side Active and Interconnects. VLSI Technology and Circuits 2024: 1-2 - [i27]Lunshuai Pan, Pushen Zuo, Yubiao Luo, Zhong Sun, Ru Huang:
BlockAMC: Scalable In-Memory Analog Matrix Computing for Solving Linear Systems. CoRR abs/2401.10042 (2024) - [i26]Rongqing Cong, Wenyang He, Mingxuan Li, Bangning Luo, Zebin Yang, Yuchao Yang, Ru Huang, Bonan Yan:
AttentionLego: An Open-Source Building Block For Spatially-Scalable Large Language Model Accelerator With Processing-In-Memory Technology. CoRR abs/2401.11459 (2024) - [i25]Meng Li, Yixuan Hu, Tengyu Zhang, Renjie Wei, Yawen Zhang, Ru Huang, Runsheng Wang:
Efficient yet Accurate End-to-End SC Accelerator Design. CoRR abs/2401.15332 (2024) - [i24]Tong Xie, Yixuan Hu, Renjie Wei, Meng Li, Yuan Wang, Runsheng Wang, Ru Huang:
ASCEND: Accurate yet Efficient End-to-End Stochastic Computing Acceleration of Vision Transformer. CoRR abs/2402.12820 (2024) - [i23]Shuzhang Zhong, Zebin Yang, Meng Li, Ruihao Gong, Runsheng Wang, Ru Huang:
ProPD: Dynamic Token Tree Pruning and Generation for LLM Parallel Decoding. CoRR abs/2402.13485 (2024) - [i22]Yuxiang Zhao, Zhuomin Chai, Xun Jiang, Yibo Lin, Runsheng Wang, Ru Huang:
PDNNet: PDN-Aware GNN-CNN Heterogeneous Network for Dynamic IR Drop Prediction. CoRR abs/2403.18569 (2024) - [i21]Haoyi Zhang, Jiahao Song, Xiaohan Gao, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang:
EasyACIM: An End-to-End Automated Analog CIM with Synthesizable Architecture and Agile Design Space Exploration. CoRR abs/2404.13062 (2024) - [i20]Chenqi Lin, Tianshi Xu, Zebin Yang, Runsheng Wang, Ru Huang, Meng Li:
FastQuery: Communication-efficient Embedding Table Query for Private LLM Inference. CoRR abs/2405.16241 (2024) - [i19]Bingyang Liu, Haoyi Zhang, Xiaohan Gao, Zichen Kong, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang:
LayoutCopilot: An LLM-powered Multi-agent Collaborative Framework for Interactive Analog Layout Design. CoRR abs/2406.18873 (2024) - [i18]Renye Yan, Yaozhong Gan, You Wu, Ling Liang, Junliang Xing, Yimao Cai, Ru Huang:
The Exploration-Exploitation Dilemma Revisited: An Entropy Perspective. CoRR abs/2408.09974 (2024) - [i17]Shuzhang Zhong, Ling Liang, Yuan Wang, Runsheng Wang, Ru Huang, Meng Li:
AdapMoE: Adaptive Sensitivity-based Expert Gating and Management for Efficient MoE Inference. CoRR abs/2408.10284 (2024) - [i16]Zebin Yang, Renze Chen, Taiqiang Wu, Ngai Wong, Yun Liang, Runsheng Wang, Ru Huang, Meng Li:
MCUBERT: Memory-Efficient BERT Inference on Commodity Microcontrollers. CoRR abs/2410.17957 (2024) - 2023
- [j77]Zhen Yang, Teng Zhang, Keqin Liu, Bingjie Dang, Liying Xu, Yuchao Yang, Ru Huang:
Neuromorphic Artificial Vision Systems Based on Reconfigurable Ion-Modulated Memtransistors. Adv. Intell. Syst. 5(8) (2023) - [j76]Zhongxin Liang, Yang Zhao, Kaifeng Wang, Jieyin Zhang, Jianjun Zhang, Ming Li, Ru Huang, Qianqian Huang:
Experimental investigation of a novel junction-modulated hetero-layer tunnel FET with the striped gate for low power applications. Sci. China Inf. Sci. 66(6) (2023) - [j75]Bonan Yan, Yuchao Yang, Ru Huang:
Memristive dynamics enabled neuromorphic computing systems. Sci. China Inf. Sci. 66(10) (2023) - [j74]Le Ye, Zhixuan Wang, Tianyu Jia, Yufei Ma, Linxiao Shen, Yihan Zhang, Heyi Li, Peiyu Chen, Meng Wu, Ying Liu, Yiqi Jing, Hao Zhang, Ru Huang:
Research progress on low-power artificial intelligence of things (AIoT) chip design. Sci. China Inf. Sci. 66(10) (2023) - [j73]Anjunyi Fan, Yihan Fu, Yaoyu Tao, Zhonghua Jin, Haiyue Han, Huiyu Liu, Yaojun Zhang, Bonan Yan, Yuchao Yang, Ru Huang:
Hadamard product-based in-memory computing design for floating point neural network training. Neuromorph. Comput. Eng. 3(1): 14009 (2023) - [j72]Xiaohan Gao, Haoyi Zhang, Mingjie Liu, Linxiao Shen, David Z. Pan, Yibo Lin, Runsheng Wang, Ru Huang:
Interactive Analog Layout Editing With Instant Placement and Routing Legalization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(3): 698-711 (2023) - [j71]Xiang Liu, Pengpeng Ren, Hai-Bao Chen, Zhigang Ji, Junhua Liu, Runsheng Wang, Jianfu Zhang, Ru Huang:
Equiprobability-Based Local Response Surface Method for High-Sigma Yield Estimation With Both High Accuracy and Efficiency. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(4): 1346-1350 (2023) - [j70]Zuodong Zhang, Zizheng Guo, Yibo Lin, Meng Li, Runsheng Wang, Ru Huang:
AVATAR: An Aging- and Variation-Aware Dynamic Timing Analyzer for Error-Efficient Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4139-4151 (2023) - [j69]Zhuomin Chai, Yuxiang Zhao, Wei Liu, Yibo Lin, Runsheng Wang, Ru Huang:
CircuitNet: An Open-Source Dataset for Machine Learning in VLSI CAD Applications With Improved Domain-Specific Evaluation Metric and Learning Strategies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 5034-5047 (2023) - [j68]Wu Dai, Yu Li, Zhao Rong, Baokang Peng, Lining Zhang, Runsheng Wang, Ru Huang:
Statistical Compact Modeling With Artificial Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 5156-5160 (2023) - [j67]Jiahao Song, Xiyuan Tang, Xin Qiao, Yuan Wang, Runsheng Wang, Ru Huang:
A 28 nm 16 Kb Bit-Scalable Charge-Domain Transpose 6T SRAM In-Memory Computing Macro. IEEE Trans. Circuits Syst. I Regul. Pap. 70(5): 1835-1845 (2023) - [j66]Ying Liu, Yufei Ma, Wei He, Zhixuan Wang, Linxiao Shen, Jiayoon Ru, Ru Huang, Le Ye:
An 82-nW 0.53-pJ/SOP Clock-Free Spiking Neural Network With 40-μs Latency for AIoT Wake-Up Functions Using a Multilevel-Event-Driven Bionic Architecture and Computing-in-Memory Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 70(8): 3075-3088 (2023) - [j65]Xinfa Zhang, Zuodong Zhang, Yibo Lin, Zhigang Ji, Runsheng Wang, Ru Huang:
Efficient Aging-Aware Standard Cell Library Characterization Based on Sensitivity Analysis. IEEE Trans. Circuits Syst. II Express Briefs 70(2): 721-725 (2023) - [j64]Pushen Zuo, Zhong Sun, Ru Huang:
Extremely-Fast, Energy-Efficient Massive MIMO Precoding With Analog RRAM Matrix Computing. IEEE Trans. Circuits Syst. II Express Briefs 70(7): 2335-2339 (2023) - [c112]Anjunyi Fan, Bo Hu, Zhonghua Jin, Haiyue Han, Yaojun Zhang, Yue Yang, Yuchao Yang, Bonan Yan, Ru Huang:
Live Demonstration: SRAM Compute-In-Memory Based Visual & Aural Recognition System. AICAS 2023: 1-2 - [c111]Yimao Cai, Yi Gao, Zongwei Wang, Lin Bao, Ling Liang, Qilin Zheng, Cuimei Wang, Ru Huang:
Device-Architecture Co-optimization for RRAM-based In-memory Computing. ASICON 2023: 1-4 - [c110]Meng Li, Yixuan Hu, Tengyu Zhang, Renjie Wei, Yawen Zhang, Ru Huang, Runsheng Wang:
Not your father's stochastic computing (SC)! Efficient yet Accurate End-to-End SC Accelerator Design. ASICON 2023: 1-4 - [c109]Renjie Wei, Kaifeng Wang, Zhixuan Wang, Libo Yang, Fangxing Zhang, Yongqin Wu, Ye Ren, Le Ye, Lining Zhang, Weihai Bu, Ru Huang, Qianqian Huang:
A Novel TFET-MOSFET Hybrid SRAM for Ultra-Low-Power Applications. ASICON 2023: 1-4 - [c108]Peiyu Chen, Meng Wu, Yufei Ma, Le Ye, Ru Huang:
RIMAC: An Array-Level ADC/DAC-Free ReRAM-Based in-Memory DNN Processor with Analog Cache and Computation. ASP-DAC 2023: 228-233 - [c107]Ying Liu, Zhiyuan Chen, Zhixuan Wang, Wentao Zhao, Wei He, Jianfeng Zhu, Oijun Wang, Ning Zhang, Tianyu Jia, Yufei Ma, Le Ye, Ru Huang:
A A 22nm 0.43pJ/SOP Sparsity-Aware In-Memory Neuromorphic Computing System with Hybrid Spiking and Artificial Neural Network and Configurable Topology. CICC 2023: 1-2 - [c106]Jiahao Song, Xiyuan Tang, Haoyang Luo, Haoyi Zhang, Xin Qiao, Zixuan Sun, Xiangxing Yang, Yuan Wang, Runsheng Wang, Ru Huang:
A Calibration-Free 15-level/Cell eDRAM Computing-in-Memory Macro with 3T1C Current-Programmed Dynamic-Cascoded MLC achieving 233-to-304-TOPS/W 4b MAC. CICC 2023: 1-2 - [c105]Yanchi Dong, Tianyu Jia, Kaixuan Du, Yiqi Jing, Qijun Wang, Pixian Zhan, Yadong Zhang, Fengyun Yan, Yufei Ma, Yun Liang, Le Ye, Ru Huang:
A Model-Specific End-to-End Design Methodology for Resource-Constrained TinyML Hardware. DAC 2023: 1-6 - [c104]Zizheng Guo, Zuodong Zhang, Xun Jiang, Wuxi Li, Yibo Lin, Runsheng Wang, Ru Huang:
General-Purpose Gate-Level Simulation with Partition-Agnostic Parallelism. DAC 2023: 1-6 - [c103]Yixuan Hu, Tengyu Zhang, Meng Li, Renjie Wei, Liangzhen Lai, Yuan Wang, Runsheng Wang, Ru Huang:
Efficient Non-Linear Adder for Stochastic Computing with Approximate Spatial-Temporal Sorting Network. DAC 2023: 1-6 - [c102]Qipan Wang, Ping Liu, Liguo Jiang, Mingjie Liu, Yibo Lin, Runsheng Wang, Ru Huang:
MTL-Designer: An Integrated Flow for Analysis and Synthesis of Microstrip Transmission Line. DAC 2023: 1-6 - [c101]Yixuan Hu, Tengyu Zhang, Renjie Wei, Meng Li, Runsheng Wang, Yuan Wang, Ru Huang:
Accurate yet Efficient Stochastic Computing Neural Acceleration with High Precision Residual Fusion. DATE 2023: 1-6 - [c100]Haoyi Zhang, Xiaohan Gao, Haoyang Luo, Jiahao Song, Xiyuan Tang, Junhua Liu, Yibo Lin, Runsheng Wang, Ru Huang:
SAGERoute: Synergistic Analog Routing Considering Geometric and Electrical Constraints with Manual Design Compatibility. DATE 2023: 1-6 - [c99]Zuodong Zhang, Meng Li, Yibo Lin, Runsheng Wang, Ru Huang:
READ: Reliability-Enhanced Accelerator Dataflow Optimization using Critical Input Pattern Reduction. DATE 2023: 1-2 - [c98]Xinhang Xu, Linxiao Shen, Siyuan Ye, Jiayi Wu, Zhuoyi Chen, Jihang Gao, Jiajia Cui, Yihan Zhang, Ru Huang, Le Ye:
A 12.5-ppm/°C 1.086-nW/kHz Relaxation Oscillator with Clock-Gated Discrete-Time Comparator in 22nm CMOS Technology. ESSCIRC 2023: 121-124 - [c97]Kaifeng Wang, Yongqin Wu, Ye Ren, Renjie Wei, Zerui Chen, Jianfeng Hang, Zhixuan Wang, Fangxing Zhang, Lining Zhang, Chunyu Peng, Xiulong Wu, Le Ye, Kai Zheng, Jin Kang, Xusheng Wu, Weihai Bu, Ru Huang, Qianqian Huang:
First Foundry Platform Demonstration of Hybrid Tunnel FET and MOSFET Circuits Based on a Novel Laminated Well Isolation Technology. ESSDERC 2023: 13-16 - [c96]Chang Su, Zhongxin Liang, Zhiyuan Fu, Shaodi Xu, Kaifeng Wang, Puyang Cai, Liang Chen, Ru Huang, Qianqian Huang:
New Insights into Read Current Margin and Memory Window of HfO2-based Ferroelectric FET with Re-exploration of the Role of Ferroelectric Dynamics and Interface Charges during Readout. ESSDERC 2023: 89-92 - [c95]Xun Jiang, Zizheng Guo, Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Runsheng Wang, Ru Huang:
Invited Paper: Accelerating Routability and Timing Optimization with Open-Source AI4EDA Dataset CircuitNet and Heterogeneous Platforms. ICCAD 2023: 1-9 - [c94]Tianshi Xu, Meng Li, Runsheng Wang, Ru Huang:
Falcon: Accelerating Homomorphically Encrypted Convolutions for Efficient Private Mobile Network Inference. ICCAD 2023: 1-9 - [c93]Zuodong Zhang, Renjie Wei, Meng Li, Yibo Lin, Runsheng Wang, Ru Huang:
READ: Reliability-Enhanced Accelerator Dataflow Optimization Using Critical Input Pattern Reduction. ICCAD 2023: 1-9 - [c92]Shuzhang Zhong, Meng Li, Yun Liang, Runsheng Wang, Ru Huang:
Memory-aware Scheduling for Complex Wired Networks with Iterative Graph Optimization. ICCAD 2023: 1-9 - [c91]Wenxuan Zeng, Meng Li, Wenjie Xiong, Tong Tong, Wen-Jie Lu, Jin Tan, Runsheng Wang, Ru Huang:
MPCViT: Searching for Accurate and Efficient MPC-Friendly Vision Transformer with Heterogeneous Attention. ICCV 2023: 5029-5040 - [c90]Zezhi Cheng, Yabo Qin, Zongwei Wang, Feng Zou, Cuimei Wang, Yimao Cai, Ru Huang:
A High-Throughput and Configurable TRNG Based on Dual-Mode Memristor for Stochastic Computing. ICTA 2023: 108-109 - [c89]Jinshan Li, Zongwei Wang, Cuimei Wang, Yimao Cai, Ru Huang:
Design Considerations of Multi-Level 1S1R Cell for In-Memory Computing. ICTA 2023: 144-145 - [c88]Zixuan Sun, Haoran Lu, Yongkang Xue, Wenpu Luo, Zirui Wang, Jiayang Zhang, Zhigang Ji, Runsheng Wang, Ru Huang:
Investigation of Hot Carrier Enhanced Body Bias Effect in Advanced FinFET Technology. IRPS 2023: 1-6 - [c87]Longda Zhou, Jie Li, Zheng Qiao, Pengpeng Ren, Zixuan Sun, Jianping Wang, Blacksmith Wu, Zhigang Ji, Runsheng Wang, Kanyu Cao, Ru Huang:
Double-sided Row Hammer Effect in Sub-20 nm DRAM: Physical Mechanism, Key Features and Mitigation. IRPS 2023: 1-10 - [c86]Yihan Zhang, You You, Wenjie Ren, Xinhang Xu, Linxiao Shen, Jiayoon Ru, Ru Huang, Le Ye:
A 0.954nW 32kHz Crystal Oscillator in 22nm CMOS with Gm-C-Based Current Injection Control. ISSCC 2023: 68-69 - [c85]Peiyu Chen, Meng Wu, Wentao Zhao, Jiajia Cui, Zhixuan Wang, Yadong Zhang, Qijun Wang, Jiayoon Ru, Linxiao Shen, Tianyu Jia, Yufei Ma, Le Ye, Ru Huang:
A 22nm Delta-Sigma Computing-In-Memory (Δ∑CIM) SRAM Macro with Near-Zero-Mean Outputs and LSB-First ADCs Achieving 21.38TOPS/W for 8b-MAC Edge AI Processing. ISSCC 2023: 140-141 - [c84]Jihang Gao, Linxiao Shen, Heyi Li, Siyuan Ye, Jie Li, Xinhang Xu, Jiajia Cui, Yunhung Gao, Ru Huang, Le Ye:
A 7.9fJ/Conversion-Step and 37.12aFrms Pipelined-SAR Capacitance-to-Digital Converter with kT/C Noise Cancellation and Incomplete-Settling-Based Correlated Level Shifting. ISSCC 2023: 346-347 - [c83]Kexing Zhou, Yun Liang, Yibo Lin, Runsheng Wang, Ru Huang:
Khronos: Fusing Memory Access for Improved Hardware RTL Simulation. MICRO 2023: 180-193 - [c82]Wenxuan Zeng, Meng Li, Haichuan Yang, Wen-jie Lu, Runsheng Wang, Ru Huang:
CoPriv: Network/Protocol Co-Optimization for Communication-Efficient Private Inference. NeurIPS 2023 - [c81]Zuoyuan Dong, Zixuan Sun, Xin Yang, Xiaomei Li, Yongkang Xue, Chen Luo, Puyang Cai, Zirui Wang, Shuying Wang, Yewei Zhang, Chaolun Wang, Pengpeng Ren, Zhigang Ji, Xing Wu, Runsheng Wang, Ru Huang:
Catching the Missing EM Consequence in Soft Breakdown Reliability in Advanced FinFETs: Impacts of Self-heating, On-State TDDB, and Layout Dependence. VLSI Technology and Circuits 2023: 1-2 - [i15]Renjie Wei, Shuwen Zhang, Zechun Liu, Meng Li, Yuchen Fan, Runsheng Wang, Ru Huang:
EBSR: Enhanced Binary Neural Network for Image Super-Resolution. CoRR abs/2303.12270 (2023) - [i14]Yuxiang Zhao, Zhuomin Chai, Yibo Lin, Runsheng Wang, Ru Huang:
HybridNet: Dual-Branch Fusion of Geometrical and Topological Views for VLSI Congestion Prediction. CoRR abs/2305.05374 (2023) - [i13]Yihan Fu, Daijing Shi, Anjunyi Fan, Wenshuo Yue, Yuchao Yang, Ru Huang, Bonan Yan:
Probabilistic Compute-in-Memory Design For Efficient Markov Chain Monte Carlo Sampling. CoRR abs/2307.10866 (2023) - [i12]Tianshi Xu, Meng Li, Runsheng Wang, Ru Huang:
Falcon: Accelerating Homomorphically Encrypted Convolutions for Efficient Private Mobile Network Inference. CoRR abs/2308.13189 (2023) - [i11]Shuzhang Zhong, Meng Li, Yun Liang, Runsheng Wang, Ru Huang:
Memory-aware Scheduling for Complex Wired Networks with Iterative Graph Optimization. CoRR abs/2308.13898 (2023) - [i10]Zuodong Zhang, Renjie Wei, Meng Li, Yibo Lin, Runsheng Wang, Ru Huang:
READ: Reliability-Enhanced Accelerator Dataflow Optimization using Critical Input Pattern Reduction. CoRR abs/2308.15698 (2023) - [i9]Xiaohan Gao, Haoyi Zhang, Siyuan Ye, Mingjie Liu, David Z. Pan, Linxiao Shen, Runsheng Wang, Yibo Lin, Ru Huang:
Post-Layout Simulation Driven Analog Circuit Sizing. CoRR abs/2310.14049 (2023) - [i8]Wenxuan Zeng, Meng Li, Haichuan Yang, Wenjie Lu, Runsheng Wang, Ru Huang:
CoPriv: Network/Protocol Co-Optimization for Communication-Efficient Private Inference. CoRR abs/2311.01737 (2023) - 2022
- [j63]Qingxi Duan, Teng Zhang, Chang Liu, Rui Yuan, Ge Li, Pek Jun Tiw, Ke Yang, Chen Ge, Yuchao Yang, Ru Huang:
Artificial Multisensory Neurons with Fused Haptic and Temperature Perception for Multimodal In-Sensor Computing. Adv. Intell. Syst. 4(8) (2022) - [j62]Qingxi Duan, Teng Zhang, Chang Liu, Rui Yuan, Ge Li, Pek Jun Tiw, Ke Yang, Chen Ge, Yuchao Yang, Ru Huang:
Artificial Multisensory Neurons with Fused Haptic and Temperature Perception for Multimodal In-Sensor Computing. Adv. Intell. Syst. 4(8) (2022) - [j61]Linbo Shan, Zongwei Wang, Lin Bao, Shengyu Bao, Yabo Qin, Yaotian Ling, Guandong Bai, John Robertson, Yimao Cai, Ru Huang:
In Materia Neuron Spiking Plasticity for Sequential Event Processing Based on Dual-Mode Memristor. Adv. Intell. Syst. 4(8) (2022) - [j60]Mengxuan Yang, Qianqian Huang, Chang Su, Liang Chen, Yangyuan Wang, Ru Huang:
Experimental investigation of the gate voltage range of negative differential capacitance in ferroelectric transistors. Sci. China Inf. Sci. 65(6): 1-2 (2022) - [j59]Mengxuan Yang, Qianqian Huang, Kaifeng Wang, Chang Su, Liang Chen, Yangyuan Wang, Ru Huang:
Physical investigation of subthreshold swing degradation behavior in negative capacitance FET. Sci. China Inf. Sci. 65(6): 1-6 (2022) - [j58]Jingyi Liu, Xia An, Gensong Li, Zhexuan Ren, Ming Li, Xing Zhang, Ru Huang:
Single event transients induced by pulse laser in Ge pMOSFETs and its supply voltage dependence. Sci. China Inf. Sci. 65(8): 1-2 (2022) - [j57]Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Wei Liu, Runsheng Wang, Ru Huang:
CircuitNet: an open-source dataset for machine learning applications in electronic design automation (EDA). Sci. China Inf. Sci. 65(12) (2022) - [j56]Zhuojian Xiao, Bonan Yan, Teng Zhang, Ru Huang, Yuchao Yang:
Memristive devices based hardware for unlabeled data processing. Neuromorph. Comput. Eng. 2(2): 22003 (2022) - [j55]Qilin Zheng, Xingchen Li, Yijin Guan, Zongwei Wang, Yimao Cai, Yiran Chen, Guangyu Sun, Ru Huang:
PIMulator-NN: An Event-Driven, Cross-Level Simulation Framework for Processing-In-Memory-Based Neural Network Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(12): 5464-5475 (2022) - [j54]Zhaokun Jing, Bonan Yan, Yuchao Yang, Ru Huang:
VSDCA: A Voltage Sensing Differential Column Architecture Based on 1T2R RRAM Array for Computing-in-Memory Accelerators. IEEE Trans. Circuits Syst. I Regul. Pap. 69(10): 4028-4041 (2022) - [j53]Yubiao Luo, Shiqing Wang, Pushen Zuo, Zhong Sun, Ru Huang:
Modeling and Mitigating the Interconnect Resistance Issue in Analog RRAM Matrix Computing Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 69(11): 4367-4380 (2022) - [j52]Yisong Kuang, Xiaoxin Cui, Zilin Wang, Chenglong Zou, Yi Zhong, Kefei Liu, Zhenhui Dai, Dunshan Yu, Yuan Wang, Ru Huang:
ESSA: Design of a Programmable Efficient Sparse Spiking Neural Network Accelerator. IEEE Trans. Very Large Scale Integr. Syst. 30(11): 1631-1641 (2022) - [c80]Xiuping Cui, Xiaochen Hao, Yun Liang, Guangyu Sun, Xiaoxin Cui, Yuan Wang, Ru Huang:
A Mapping Model of SNNs to Neuromorphic Hardware. AICAS 2022: 206-209 - [c79]Kangyi Qiu, Yaojun Zhang, Bonan Yan, Ru Huang:
Heterogeneous Memory Architecture Accommodating Processing-in-Memory on SoC for AIoT Applications. ASP-DAC 2022: 383-388 - [c78]Hao Zhang, Linxiao Shen, Shichuang Zhang, Heyi Li, Yihan Zhang, Zhichao Tan, Ru Huang, Le Ye:
A 77μW 115dB-Dynamic-Range 586fA-Sensitivity Current-Domain Continuous-Time Zoom ADC with Pulse-Width-Modulated Resistor DAC and Background Offset Compensation Scheme. CICC 2022: 1-2 - [c77]Zuodong Zhang, Zizheng Guo, Yibo Lin, Runsheng Wang, Ru Huang:
AVATAR: an aging- and variation-aware dynamic timing analyzer for application-based DVAFS. DAC 2022: 841-846 - [c76]Ziru Li, Qilin Zheng, Bonan Yan, Ru Huang, Bing Li, Yiran Chen:
ASTERS: adaptable threshold spike-timing neuromorphic design with twin-column ReRAM synapses. DAC 2022: 1099-1104 - [c75]Zuodong Zhang, Zizheng Guo, Yibo Lin, Runsheng Wang, Ru Huang:
EventTimer: Fast and Accurate Event-Based Dynamic Timing Analysis. DATE 2022: 945-950 - [c74]Feilong Ding, Xi Li, Yihan Chen, Zhitang Song, Runsheng Wang, Clarissa C. Prawoto, Mansun Chan, Lining Zhang, Ru Huang:
Compact Modeling of Phase Change Memory with Parameter Extractions. ESSDERC 2022: 308-311 - [c73]Xingchen Li, Bingzhe Wu, Guangyu Sun, Zhe Zhang, Zhihang Yuan, Runsheng Wang, Ru Huang, Dimin Niu, Hongzhong Zheng, Zhichao Lu, Liang Zhao, Meng-Fan Marvin Chang, Tianchan Guan, Xin Si:
Enabling High-Quality Uncertainty Quantification in a PIM Designed for Bayesian Neural Network. HPCA 2022: 1043-1055 - [c72]Yikan Qiu, Yufei Ma, Wentao Zhao, Meng Wu, Le Ye, Ru Huang:
DCIM-GCN: Digital Computing-in-Memory to Efficiently Accelerate Graph Convolutional Networks. ICCAD 2022: 46:1-46:9 - [c71]Qipan Wang, Xiaohan Gao, Yibo Lin, Runsheng Wang, Ru Huang:
DeePEB: A Neural Partial Differential Equation Solver for Post Exposure Baking Simulation in Lithography. ICCAD 2022: 122:1-122:9 - [c70]Pengpeng Ren, Xinfa Zhang, Junhua Liu, Runsheng Wang, Zhigang Ji, Ru Huang:
Towards the Characterization of Full ID-VG Degradation in Transistors for Future Analog Applications. IRPS 2022: 3 - [c69]Yong Liu, Pengpeng Ren, Da Wang, Longda Zhou, Zhigang Ji, Junhua Liu, Runsheng Wang, Ru Huang:
New Insight into the Aging Induced Retention Time Degraded of Advanced DRAM Technology. IRPS 2022: 6 - [c68]Da Wang, Yong Liu, Pengpeng Ren, Longda Zhou, Zhigang Ji, Junhua Liu, Runsheng Wang, Ru Huang:
Characterization and Modelling of Hot Carrier Degradation in pFETs under Vd>Vg Condition for sub-20nm DRAM Technologies. IRPS 2022: 7 - [c67]Yihan Zhang, Chang Xue, Xiao Wang, Tianyi Liu, Jihang Gao, Peiyu Chen, Jinguang Liu, Linan Sun, Linxiao Shen, Jiayoon Ru, Le Ye, Ru Huang:
Single-Mode CMOS 6T-SRAM Macros With Keeper-Loading-Free Peripherals and Row-Separate Dynamic Body Bias Achieving 2.53fW/bit Leakage for AIoT Sensing Platforms. ISSCC 2022: 184-186 - [c66]Bonan Yan, Jeng-Long Hsu, Pang-Cheng Yu, Chia-Chi Lee, Yaojun Zhang, Wenshuo Yue, Guoqiang Mei, Yuchao Yang, Yue Yang, Hai Li, Yiran Chen, Ru Huang:
A 1.041-Mb/mm2 27.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation for AI and Embedded Applications. ISSCC 2022: 188-190 - [c65]Ying Liu, Zhixuan Wang, Wei He, Linxiao Shen, Yihan Zhang, Peiyu Chen, Meng Wu, Hao Zhang, Peng Zhou, Jinguang Liu, Guangyu Sun, Jiayoon Ru, Le Ye, Ru Huang:
An 82nW 0.53pJ/SOP Clock-Free Spiking Neural Network with 40µs Latency for AloT Wake-Up Functions Using Ultimate-Event-Driven Bionic Architecture and Computing-in-Memory Technique. ISSCC 2022: 372-374 - [c64]Jin Luo, Weikai Xu, Boyi Fu, Zheru Yu, Mengxuan Yang, Yiqing Li, Qianqian Huang, Ru Huang:
A Novel Ambipolar Ferroelectric Tunnel FinFET based Content Addressable Memory with Ultra-low Hardware Cost and High Energy Efficiency for Machine Learning. VLSI Technology and Circuits 2022: 226-227 - [i7]Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Wei Liu, Runsheng Wang, Ru Huang:
CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA). CoRR abs/2208.01040 (2022) - [i6]Pushen Zuo, Zhong Sun, Ru Huang:
Extremely-Fast, Energy-Efficient Massive MIMO Precoding with Analog RRAM Matrix Computing. CoRR abs/2211.03624 (2022) - [i5]Wenxuan Zeng, Meng Li, Wenjie Xiong, Wenjie Lu, Jin Tan, Runsheng Wang, Ru Huang:
MPCViT: Searching for MPC-friendly Vision Transformer with Heterogeneous Attention. CoRR abs/2211.13955 (2022) - 2021
- [j51]Zhexuan Ren, Xia An, Gensong Li, Xing Zhang, Ru Huang:
Layout dependence of total-ionizing-dose response in 65-nm bulk Si pMOSFET. Sci. China Inf. Sci. 64(2) (2021) - [j50]Caidie Cheng, Pek Jun Tiw, Yimao Cai, Xiaoqin Yan, Yuchao Yang, Ru Huang:
In-memory computing with emerging nonvolatile memory devices. Sci. China Inf. Sci. 64(12) (2021) - [j49]Zhixuan Wang, Hao Zhang, Yihan Zhang, Linxiao Shen, Jiayoon Ru, Haitao Fan, Zhichao Tan, Yangyuan Wang, Le Ye, Ru Huang:
A Software-Defined Always-On System With 57-75-nW Wake-Up Function Using Asynchronous Clock-Free Pipelined Event-Driven Architecture and Time-Shielding Level-Crossing ADC. IEEE J. Solid State Circuits 56(9): 2804-2816 (2021) - [j48]Zhixuan Wang, Ying Liu, Peng Zhou, Zhichao Tan, Haitao Fan, Yihan Zhang, Linxiao Shen, Jiayoon Ru, Yangyuan Wang, Le Ye, Ru Huang:
A 148-nW Reconfigurable Event-Driven Intelligent Wake-Up System for AIoT Nodes Using an Asynchronous Pulse-Based Feature Extractor and a Convolutional Neural Network. IEEE J. Solid State Circuits 56(11): 3274-3288 (2021) - [j47]Heyi Li, Zhichao Tan, Yuanxin Bao, Han Xiao, Hao Zhang, Kaixuan Du, Linxiao Shen, Jiayoon Ru, Yihan Zhang, Le Ye, Ru Huang:
Energy-Efficient CMOS Humidity Sensors Using Adaptive Range-Shift Zoom CDC and Power-Aware Floating Inverter Amplifier Array. IEEE J. Solid State Circuits 56(12): 3560-3572 (2021) - [j46]Zhixuan Wang, Le Ye, Qianqian Huang, Kaixuan Du, Zhichao Tan, Yangyuan Wang, Ru Huang:
Ultra-Low-Power and Performance-Improved Logic Circuit Using Hybrid TFET-MOSFET Standard Cells Topologies and Optimized Digital Front-End Process. IEEE Trans. Circuits Syst. I Regul. Pap. 68(3): 1160-1170 (2021) - [j45]Zhixuan Wang, Le Ye, Qianqian Huang, Yangyuan Wang, Ru Huang:
Re-Assessment of Steep-Slope Device Design From a Circuit-Level Perspective Using Novel Evaluation Criteria and Model-Less Method. IEEE Trans. Circuits Syst. I Regul. Pap. 68(4): 1624-1635 (2021) - [j44]Jiahao Song, Yuan Wang, Minguang Guo, Xiang Ji, Kaili Cheng, Yixuan Hu, Xiyuan Tang, Runsheng Wang, Ru Huang:
TD-SRAM: Time-Domain-Based In-Memory Computing Macro for Binary Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 68(8): 3377-3387 (2021) - [j43]Le Ye, Zhixuan Wang, Ying Liu, Peiyu Chen, Heyi Li, Hao Zhang, Meng Wu, Wei He, Linxiao Shen, Yihan Zhang, Zhichao Tan, Yangyuan Wang, Ru Huang:
The Challenges and Emerging Technologies for Low-Power Artificial Intelligence IoT Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 68(12): 4821-4834 (2021) - [j42]Shiqing Wang, Zhong Sun, Yuheng Liu, Shengyu Bao, Yimao Cai, Daniele Ielmini, Ru Huang:
Optimization Schemes for In-Memory Linear Regression Circuit With Memristor Arrays. IEEE Trans. Circuits Syst. I Regul. Pap. 68(12): 4900-4909 (2021) - [j41]Yisong Kuang, Xiaoxin Cui, Yi Zhong, Kefei Liu, Chenglong Zou, Zhenhui Dai, Yuan Wang, Dunshan Yu, Ru Huang:
A 64K-Neuron 64M-1b-Synapse 2.64pJ/SOP Neuromorphic Chip With All Memory on Chip for Spike-Based Models in 65nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 68(7): 2655-2659 (2021) - [j40]Zhong Sun, Ru Huang:
Time Complexity of In-Memory Matrix-Vector Multiplication. IEEE Trans. Circuits Syst. II Express Briefs 68(8): 2785-2789 (2021) - [c63]Jiahao Song, Yuan Wang, Xiyuan Tang, Runsheng Wang, Ru Huang:
A 16Kb Transpose 6T SRAM In-Memory-Computing Macro based on Robust Charge-Domain Computing. A-SSCC 2021: 1-3 - [c62]Yufei Ma, Gokul Krishnan, Yu Cao, Le Ye, Ru Huang:
SWIFT: Small-World-based Structural Pruning to Accelerate DNN Inference on FPGA. FPGA 2021: 148 - [c61]Chang Meng, Zhiyuan Xiang, Niyiqiu Liu, Yixuan Hu, Jiahao Song, Runsheng Wang, Ru Huang, Weikang Qian:
DALTA: A Decomposition-based Approximate Lookup Table Architecture. ICCAD 2021: 1-8 - [c60]Runsheng Wang, Zuodong Zhang, Yawen Zhang, Yixuan Hu, Yanan Sun, Weikang Qian, Ru Huang:
Can Emerging Computing Paradigms Help Enhancing Reliability Towards the End of Technology Roadmap? IRPS 2021: 1-7 - [c59]Yisong Kuang, Xiaoxin Cui, Yi Zhong, Kefei Liu, Chenglong Zou, Zhenhui Dai, Dunshan Yu, Yuan Wang, Ru Huang:
A 28-nm 0.34-pJ/SOP Spike-Based Neuromorphic Processor for Efficient Artificial Neural Network Implementations. ISCAS 2021: 1-5 - [c58]Yifan Qian, Chang Meng, Yawen Zhang, Weikang Qian, Runsheng Wang, Ru Huang:
Approximate Logic Synthesis in the Loop for Designing Low-Power Neural Network Accelerator. ISCAS 2021: 1-5 - [c57]Lindong Wu, Zongwei Wang, Ming Zhao, Wei Hu, Yimao Cai, Ru Huang:
A High Accuracy Multiple-Command Speech Recognition ASIC Based on Configurable One-Dimension Convolutional Neural Network. ISCAS 2021: 1-4 - [c56]Yi Zhong, Xiaoxin Cui, Yisong Kuang, Kefei Liu, Yuan Wang, Ru Huang:
A Spike-Event-Based Neuromorphic Processor with Enhanced On-Chip STDP Learning in 28nm CMOS. ISCAS 2021: 1-5 - [c55]Heyi Li, Zhichao Tan, Yuanxin Bao, Han Xiao, Hao Zhang, Kaixuan Du, Yihan Zhang, Le Ye, Ru Huang:
5.1 A 1.5μW 0.135pJ·%RH2 CMOS Humidity Sensor Using Adaptive Range-Shift Zoom CDC and Power-Aware Floating Inverter Amplifier Array. ISSCC 2021: 72-74 - [c54]Meng-Fan Chang, Ru Huang, Seung-Jun Bae:
Session 16 Overview: Computation in Memory Memory Subcommittee. ISSCC 2021: 244-245 - [c53]Zhixuan Wang, Le Ye, Ying Liu, Peng Zhou, Zhichao Tan, Haitao Fan, Yihan Zhang, Jiayoon Ru, Yangyuan Wang, Ru Huang:
12.1 A 148nW General-Purpose Event-Driven Intelligent Wake-Up Chip for AIoT Devices Using Asynchronous Spike-Based Feature Extractor and Convolutional Neural Network. ISSCC 2021: 436-438 - 2020
- [j39]Yanghao Wang, Liutao Yu, Si Wu, Ru Huang, Yuchao Yang:
Memristor-Based Biologically Plausible Memory Based on Discrete and Continuous Attractor Networks for Neuromorphic Systems. Adv. Intell. Syst. 2(3): 2000001 (2020) - [j38]Lin Bao, Zongwei Wang, Zhizhen Yu, Yaotian Ling, Yimao Cai, Ru Huang:
Rotational Pattern Recognition by Spiking Correlated Neural Network Based on Dual-Gated MoS 2 Neuristor. Adv. Intell. Syst. 2(11): 2000102 (2020) - [j37]Rundong Jia, Qianqian Huang, Ru Huang:
Vertical SnS2/Si heterostructure for tunnel diodes. Sci. China Inf. Sci. 63(2): 122401 (2020) - [j36]Rundong Jia, Liang Chen, Qianqian Huang, Ru Huang:
Complementary tunneling transistors based on WSe2/SnS2 van der Waals heterostructure. Sci. China Inf. Sci. 63(4) (2020) - [j35]Gong Chen, Bocheng Yu, Xiaokang Li, Xiaoqiao Dong, Xiaoyan Xu, Zhihong Li, Ru Huang, Ming Li:
A photomemory by selective-assembling hybrid porphyrin-silicon nanowire field-effect transistor. Sci. China Inf. Sci. 63(6) (2020) - [j34]Rui Yuan, Mingyuan Ma, Liying Xu, Zhenhua Zhu, Qingxi Duan, Teng Zhang, Yu Zhu, Yu Wang, Ru Huang, Yuchao Yang:
Efficient 16 Boolean logic and arithmetic based on bipolar oxide memristors. Sci. China Inf. Sci. 63(10): 1-8 (2020) - [j33]Yuancheng Yang, Baotong Zhang, Xiaoqiao Dong, Xiaokang Li, Shuang Sun, Qifeng Cai, Ran Bi, Xiaoyan Xu, Ming Li, Ru Huang:
High-quality and large-grain epi-like Si film by NiSi2-seed initiated lateral epitaxial crystallization (SILEC). Sci. China Inf. Sci. 63(12) (2020) - [j32]Zuodong Zhang, Runsheng Wang, Zhe Zhang, Yawen Zhang, Shaofeng Guo, Ru Huang:
Circuit Reliability Comparison Between Stochastic Computing and Binary Computing. IEEE Trans. Circuits Syst. 67-II(12): 3342-3346 (2020) - [j31]Yawen Zhang, Runsheng Wang, Xinyue Zhang, Yuan Wang, Ru Huang:
Parallel Hybrid Stochastic-Binary-Based Neural Network Accelerators. IEEE Trans. Circuits Syst. 67-II(12): 3387-3391 (2020) - [c52]Qilin Zheng, Zongwei Wang, Zishun Feng, Bonan Yan, Yimao Cai, Ru Huang, Yiran Chen, Chia-Lin Yang, Hai Helen Li:
Lattice: An ADC/DAC-less ReRAM-based Processing-In-Memory Architecture for Accelerating Deep Convolution Neural Networks. DAC 2020: 1-6 - [c51]Yawen Zhang, Sheng Lin, Runsheng Wang, Yanzhi Wang, Yuan Wang, Weikang Qian, Ru Huang:
When Sorting Network Meets Parallel Bitstreams: A Fault-Tolerant Parallel Ternary Neural Network Accelerator based on Stochastic Computing. DATE 2020: 1287-1290 - [c50]Zuodong Zhang, Runsheng Wang, Zhe Zhang, Ru Huang, Chang Meng, Weikang Qian, Zhuangzhuang Zhou:
Reliability-Enhanced Circuit Design Flow Based on Approximate Logic Synthesis. ACM Great Lakes Symposium on VLSI 2020: 71-76 - [c49]Qilin Zheng, Xingchen Li, Zongwei Wang, Guangyu Sun, Yimao Cai, Ru Huang, Yiran Chen, Hai Li:
MobiLattice: A Depth-wise DCNN Accelerator with Hybrid Digital/Analog Nonvolatile Processing-In-Memory Block. ICCAD 2020: 104:1-104:9 - [c48]Xiaolong Chen, Enbin Gong, Hao Zhang, Le Ye, Ru Huang:
A 1μW-to-158μW Output Power Pseudo Open-Loop Boost DC-DC with 86.7% Peak Efficiency using Frequency-Programmable Oscillator and Hybrid Zero Current Detection. ISCAS 2020: 1-4 - [c47]Enbin Gong, Hao Zhang, Xiaolong Chen, Le Ye, Ru Huang:
2.4-GHz 16-QAM Passive Backscatter Transmitter for Wireless Self-Power Chips in IoT. ISCAS 2020: 1-5 - [c46]Yawen Zhang, Runsheng Wang, Yixuan Hu, Weikang Qian, Yanzhi Wang, Yuan Wang, Ru Huang:
Accurate and Energy-Efficient Implementation of Non-Linear Adder in Parallel Stochastic Computing using Sorting Network. ISCAS 2020: 1-5 - [c45]Zhixuan Wang, Le Ye, Hao Zhanq, Jiayoon Ru, Haitao Fan, Yangyuan Wang, Ru Huang:
20.2 A 57nW Software-Defined Always-On Wake-Up Chip for IoT Devices with Asynchronous Pipelined Event-Driven Architecture and Time-Shielding Level-Crossing ADC. ISSCC 2020: 314-316 - [i4]Qinggang Zhou, Yawen Zhang, Pengcheng Li, Xiaoyong Liu, Jun Yang, Runsheng Wang, Ru Huang:
DaSGD: Squeezing SGD Parallelization Performance in Distributed Training Using Delayed Averaging. CoRR abs/2006.00441 (2020)
2010 – 2019
- 2019
- [j30]Huimin Wang, Qianqian Huang, Mengxuan Yang, Xing Zhang, Ru Huang:
Deep insight into the voltage amplification effect from ferroelectric negative capacitance. Sci. China Inf. Sci. 62(8): 89401:1-89401:3 (2019) - [j29]Xiaokang Li, Baotong Zhang, Bowen Wang, Xiaoyan Xu, Yuancheng Yang, Shuang Sun, Qifeng Cai, Shijie Hu, Xia An, Ming Li, Ru Huang:
Low power and high uniformity of HfO x -based RRAM via tip-enhanced electric fields. Sci. China Inf. Sci. 62(10): 202401:1-202401:7 (2019) - [j28]Yichen Fang, Zongwei Wang, Caidie Cheng, Zhizhen Yu, Teng Zhang, Yuchao Yang, Yimao Cai, Ru Huang:
Investigation of NbOx-based volatile switching device with self-rectifying characteristics. Sci. China Inf. Sci. 62(12): 229401 (2019) - [c44]Caidie Cheng, Teng Zhang, Chang Liu, Jiadi Zhu, Liying Xu, Xiaoqin Yan, Yuchao Yang, Ru Huang:
Realization of Nanoscale Neuromorphic Memristor Array with Low Power Consumption. ASICON 2019: 1-4 - [c43]Runsheng Wang, Zhe Zhang, Shaofeng Guo, Qingxue Wang, Dehuang Wu, Joddy Wang, Ru Huang:
OMI/TMI-based Modeling and Fast Simulation of Random Telegraph Noise (RTN) in Advanced Logic Devices and Circuits. ASICON 2019: 1-4 - [c42]Xinyue Zhang, Jiahao Song, Yuan Wang, Yawen Zhang, Zuodong Zhang, Runsheng Wang, Ru Huang:
An Energy-Efficient Mixed-Signal Parallel Multiply-Accumulate (MAC) Engine Based on Stochastic Computing. ASICON 2019: 1-4 - [c41]Zhao Zhao, Yuan Wang, Xinyue Zhang, Xiaoxin Cui, Ru Huang:
An Energy-Efficient Computing-in-Memory Neuromorphic System with On-Chip Training. BioCAS 2019: 1-4 - [c40]Xinyue Zhang, Yuan Wang, Yawen Zhang, Jiahao Song, Zuodong Zhang, Kaili Cheng, Runsheng Wang, Ru Huang:
Memory System Designed for Multiply-Accumulate (MAC) Engine Based on Stochastic Computing. ICICDT 2019: 1-4 - [c39]Zhao Zhao, Yuan Wang, Cheng Li, Xiaoxin Cui, Ru Huang:
A Sparse Event-Driven Unsupervised Learning Network with Adaptive Exponential Integrate-and-Fire Model. ICICDT 2019: 1-4 - [c38]Zhixuan Wang, Yuan Zhong, Cheng Chen, Le Ye, Qianqian Huang, Libo Yang, Yangyuan Wang, Ru Huang:
Ultra-Low Power Hybrid TFET-MOSFET Topologies for Standard Logic Cells with Improved Comprehensive Performance. ISCAS 2019: 1-5 - [c37]Qilin Zheng, Jian Kang, Zongwei Wang, Yimao Cai, Ru Huang, Bing Li, Yiran Chen, Hai Helen Li:
Enhance the Robustness to Time Dependent Variability of ReRAM-Based Neuromorphic Computing Systems with Regularization and 2R Synapse. ISCAS 2019: 1-5 - [c36]Weikang Qian, Runsheng Wang, Yuan Wang, Marc D. Riedel, Ru Huang:
A Survey of Computation-Driven Data Encoding. SiPS 2019: 7-12 - [c35]Yawen Zhang, Xinyue Zhang, Jiahao Song, Yuan Wang, Ru Huang, Runsheng Wang:
Parallel Convolutional Neural Network (CNN) Accelerators Based on Stochastic Computing. SiPS 2019: 19-24 - [p1]Yuchao Yang, Ke Yang, Ru Huang:
Neuromorphic Devices and Networks Based on Memristors with Ionic Dynamics. Handbook of Memristor Networks 2019: 527-554 - [i3]Yawen Zhang, Runsheng Wang, Xinyue Zhang, Zherui Zhang, Jiahao Song, Zuodong Zhang, Yuan Wang, Ru Huang:
A Parallel Bitstream Generator for Stochastic Computing. CoRR abs/1904.09554 (2019) - [i2]Zhe Zhang, Runsheng Wang, Cheng Chen, Qianqian Huang, Yangyuan Wang, Cheng Hu, Dehuang Wu, Joddy Wang, Ru Huang:
New-Generation Design-Technology Co-Optimization (DTCO): Machine-Learning Assisted Modeling Framework. CoRR abs/1904.10269 (2019) - 2018
- [j27]Qingyu Chen, Min Lin, Yichen Fang, Zongwei Wang, Yuchao Yang, Jintong Xu, Yimao Cai, Ru Huang:
Integration of biocompatible organic resistive memory and photoresistor for wearable image sensing application. Sci. China Inf. Sci. 61(6): 060411:1-060411:8 (2018) - [j26]Bingxin Zhang, Xia An, Xiangyang Hu, Ming Li, Xing Zhang, Ru Huang:
GeC film with high substitutional carbon concentration formed by ion implantation and solid phase epitaxy for strained Ge n-MOSFETs. Sci. China Inf. Sci. 61(6): 069405:1-069405:3 (2018) - [j25]Bingxin Zhang, Xia An, Pengqiang Liu, Xiangyang Hu, Ming Li, Xing Zhang, Ru Huang:
Improvement of thermal stability of nickel germanide using nitrogen plasma pretreatment for germanium-based technology. Sci. China Inf. Sci. 61(10): 109401:1-109401:3 (2018) - [j24]Shaofeng Guo, Runsheng Wang, Pengpeng Ren, Changze Liu, Mulong Luo, Xiaobo Jiang, Yangyuan Wang, Ru Huang:
Investigation on NBTI-induced dynamic variability in nanoscale CMOS devices: Modeling, experimental evidence, and impact on circuits. Microelectron. Reliab. 81: 101-111 (2018) - [c34]Che-Lun Hsu, Shaofeng Guo, Yibo Lin, Xiaoqing Xu, Meng Li, Runsheng Wang, Ru Huang, David Z. Pan:
Layout-dependent aging mitigation for critical path timing. ASP-DAC 2018: 153-158 - [c33]Cheng Li, Yuan Wang, Jin Zhang, Xiaoxin Cui, Ru Huang:
A Compact and Accelerated Spike-based Neuromorphic VLSI Chip for Pattern Recognition. BioCAS 2018: 1-4 - [c32]Devyani Patra, Jiayang Zhang, Runsheng Wang, Mehdi Katoozi, Ethan H. Cannon, Ru Huang, Yu Cao:
Compact modeling and simulation of accelerated circuit aging. CICC 2018: 1-4 - [c31]Pengpeng Ren, Changze Liu, Sanping Wan, Jiayang Zhang, Zhuoqing Yu, Nie Liu, Yongsheng Sun, Runsheng Wang, Canhui Zhan, Zhenghao Gan, Waisum Wong, Yu Xia, Ru Huang:
New insights into the HCI degradation of pass-gate transistor in advanced FinFET technology. IRPS 2018: 3-1 - [c30]Shaofeng Guo, Zhenghan Lin, Runsheng Wang, Zexuan Zhang, Zhe Zhang, Yangyuan Wang, Ru Huang:
Investigation on the amplitude coupling effect of random telegraph noise (RTN) in nanoscale FinFETs. IRPS 2018: 6-1 - [c29]Shaofeng Guo, Zhenghan Lin, Runsheng Wang, Dongyuan Mao, Yangyuan Wang, Ru Huang:
Evaluation of SRAM Vmin shift induced by random telegraph noise (RTN): physical understanding and prediction method. ISCAS 2018: 1-4 - [c28]Guangyi Lu, Yuan Wang, Lizhong Zhang, Yize Wang, Ru Huang, Xing Zhang:
Investigation on the Gate Bias Voltage of BigFET in Power-rail ESD Clamp Circuit for Enhanced Transient Noise Immunity. ISCAS 2018: 1-5 - [c27]Libo Yang, Jiadi Zhu, Cheng Chen, Zhixuan Wang, Zexue Liu, Qianqian Huang, Le Ye, Ru Huang:
Combinational Access Tunnel FET SRAM for Ultra-Low Power Applications. ISCAS 2018: 1-5 - [c26]Lu Zhang, Jin Zhang, Yuan Wang, Xing Zhang, Ru Huang:
A Multi-Mode Silicon Neuron Circuit With High Robustness Against PVT Variation. ISCAS 2018: 1-4 - [c25]Yi-Shao Chen, Zongwei Wang, Zhihong Zhang, Li Wang, Yichen Fang, Jen-Chung Lou, Kaihui Liu, Jintong Xu, Yimao Cai, Ru Huang:
Enhancement of HfO2 Based RRAM Performance Through Hexagonal Boron Nitride Interface Layer. NVMTS 2018: 1-3 - [c24]Zhizhen Yu, Yichen Fang, Zongwei Wang, Yimao Cai, Ru Huang, Jintong Xu:
Margin Dependence on Array Size for Asymmetric Resistive Memory Cell. NVMTS 2018: 1-3 - 2017
- [c23]Runsheng Wang, Xiaobo Jiang, Shaofeng Guo, Ru Huang:
How close to the CMOS voltage scaling limit for FinFET technology? - Near-threshold computing and stochastic computing. ASICON 2017: 56-59 - [c22]Qingxi Duan, Teng Zhang, Minghui Yin, Caidie Cheng, Liying Xu, Yuchao Yang, Ru Huang:
Switching dynamics and computing applications of memristors: An overview. ASICON 2017: 144-147 - [c21]Xiaoqiang Lv, Yimao Cai, Yuchao Yang, Zhizhen Yu, Yichen Fang, Zongwei Wang, Lindong Wu, Jianfeng Liu, Wanrong Zhang, Ru Huang:
A neural network circuit with associative learning and forgetting process based on memristor neuromorphic device. ASICON 2017: 211-214 - [c20]Xiaowei Han, Qian Jia, Hongbin Sun, Longfei Wang, Huaqiang Wu, Yimao Cai, Feng Zhang, Yongyi Xie, Fangxu Dong, Xiaoguang Wang, Xiaofei Xue, Li Pang, Xiaoqing Zhao, Mengnan Wu, Pu Bai, Qi Liu, Hangbing Lv, Bing Yu, Chao Zhao, He Qian, Ru Huang, Ming Liu, Yumei Zhou, Nanning Zheng, Qiwei Ren:
A 0.13μm 64Mb HfOx ReRAM using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement. CICC 2017: 1-4 - [c19]Shaofeng Guo, Runsheng Wang, Zhuoqing Yu, Peng Hao, Pengpeng Ren, Yangyuan Wang, Siyu Liao, Chunyi Huang, Tianlei Guo, Alvin Chen, Jushan Xie, Ru Huang:
Towards reliability-aware circuit design in nanoscale FinFET technology: - New-generation aging model and circuit reliability simulator. ICCAD 2017: 780-785 - [c18]Lingyi Guo, Le Ye, Cheng Chen, Qianqian Huang, Libo Yang, Zhu Lv, Xia An, Ru Huang:
Benchmarking TFET from a circuit level perspective: Applications and guideline. ISCAS 2017: 1-4 - [c17]Jin Zhang, Yuan Wang, Xing Zhang, Ru Huang:
Compact digital-controlled neuromorphic circuit with low power consumption. ISCAS 2017: 1-4 - 2016
- [j23]Ru Huang, Hiroshi Iwai, Cor Claeys, Simon Deleonibus, Runsheng Wang:
Editor's note. Sci. China Inf. Sci. 59(6): 060401:1 (2016) - [c16]Hantao Huang, Leibin Ni, Yuhao Wang, Hao Yu, Zongwei Wang, Yimao Cai, Ru Huang:
A 3D multi-layer CMOS-RRAM accelerator for neural network. 3DIC 2016: 1-5 - [c15]Pengpeng Ren, Runsheng Wang, Ru Huang:
Layout dependent BTI and HCI degradation in nano CMOS technology: A new time-dependent LDE and impacts on circuit at end of life. ICICDT 2016: 1-3 - 2015
- [j22]Chao Wang, Chunlei Wu, Jiaxin Wang, Qianqian Huang, Ru Huang:
Analytical current model of tunneling field-effect transistor considering the impacts of both gate and drain voltages on tunneling. Sci. China Inf. Sci. 58(2): 1-8 (2015) - [j21]Meng Lin, Xia An, Ming Li, Quanxin Yun, Min Li, Zhiqiang Li, Pengqiang Liu, Xing Zhang, Ru Huang:
Ge surface passivation by GeO2 fabricated by N2O plasma oxidation. Sci. China Inf. Sci. 58(4): 1-5 (2015) - [j20]Yixiao Wang, Le Ye, Huailin Liao, Ru Huang, Yangyuan Wang:
Highly Reconfigurable Analog Baseband for Multistandard Wireless Receivers in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 62-II(3): 296-300 (2015) - [c14]Ketul B. Sutaria, Pengpeng Ren, Abinash Mohanty, Xixiang Feng, Runsheng Wang, Ru Huang, Yu Cao:
Duty cycle shift under static/dynamic aging in 28nm HK-MG technology. IRPS 2015: 7 - [c13]Yichen Fang, Yimao Cai, Zongwei Wang, Zhizhen Yu, Xue Yang, Ru Huang:
Influence of selector-introduced compliance current on HfOx RRAM switching operation. NVMTS 2015: 1-3 - [c12]Xue Yang, Yimao Cai, Zhenxing Zhang, Muxi Yu, Ru Huang:
An electronic synapse based on tantalum oxide material. NVMTS 2015: 1-4 - 2014
- [j19]Shan Liu, Xin'an Wang, Jinpeng Shen, Bo Wang, Tao Ye, Ru Huang:
A novel low-noise high-linearity CMOS transmitter for mobile UHF RFID reader. Sci. China Inf. Sci. 57(8): 1-8 (2014) - [c11]Ru Huang, Yimao Cai, Yefan Liu, Wenliang Bai, Yongbian Kuang, Yangyuan Wang:
Resistive switching in organic memory devices for flexible applications. ISCAS 2014: 838-841 - [i1]Jhih-Rong Gao, Bei Yu, Ru Huang, David Z. Pan:
Self-Aligned Double Patterning Friendly Configuration for Standard Cell Library Considering Placement. CoRR abs/1402.2442 (2014) - 2013
- [j18]Junhua Liu, Chen Li, Long Chen, Congyin Shi, Xuankai Weng, Yixiao Wang, Jiayi Wang, Yu Liao, Le Ye, Huailin Liao, Ru Huang:
A 65 mW fully integrated UHF-band CMMB tuner in 65 nm CMOS process. Sci. China Inf. Sci. 56(1): 1-5 (2013) - [j17]Runsheng Wang, Tao Yu, Ru Huang, Yangyuan Wang:
Impacts of short-channel effects on the random threshold voltage variation in nanoscale transistors. Sci. China Inf. Sci. 56(6): 1-7 (2013) - [j16]Zhan Zhan, Qianqian Huang, Ru Huang, Wenzhe Jiang, Yangyuan Wang:
A comb-gate silicon tunneling field effect transistor with improved on-state current. Sci. China Inf. Sci. 56(7): 1-6 (2013) - [j15]Le Ye, Congyin Shi, Huailin Liao, Ru Huang, Yangyuan Wang:
Highly Power-Efficient Active-RC Filters With Wide Bandwidth-Range Using Low-Gain Push-Pull Opamps. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(1): 95-107 (2013) - [c10]Yongan Zheng, Le Ye, Long Chen, Huailin Liao, Ru Huang:
SAW-less GNSS front-end amplifier with 80.4-dB GSM blocker suppression using CMOS directional coupler notch filter. ISCAS 2013: 749-752 - [c9]Li Wang, Rui Ma, Chen Zhang, Zongyu Dong, Xin Wang, Zitao Shi, Jian Liu, Lin Lin, Hui Zhao, Fei Lu, Qiang Fang, Chen Yang, Jing Zhan, Tianling Ren, Xinxin Li, Ru Huang, Albert Z. Wang:
Heterogeneous integration of nano enabling devices for 3D ICs. ISLPED 2013: 249-254 - [e1]Pai H. Chou, Ru Huang, Yuan Xie, Tanay Karnik:
International Symposium on Low Power Electronics and Design (ISLPED), Beijing, China, September 4-6, 2013. IEEE 2013, ISBN 978-1-4799-1235-3 [contents] - 2012
- [j14]Ziyi Hu, Yong Zhao, Xin'an Wang, Ru Huang, Teng Wang, Xing Zhang:
Theory and verification of operator design methodology. Sci. China Inf. Sci. 55(2): 480-490 (2012) - [j13]Shan Liu, Xin'an Wang, Jinpeng Shen, Bo Wang, Tao Ye, Ru Huang:
A novel compact low-power direct conversion receiver for mobile UHF RFID reader. Sci. China Inf. Sci. 55(10): 2226-2233 (2012) - [c8]Long Chen, Chuan Wang, Chen Li, Le Ye, Huailin Liao, Ru Huang:
A +21.2 dBm out-of-band IIP3 0.2-3GHz RF front-end using impedance translation technique. ISCAS 2012: 468-471 - [c7]Le Ye, Yixiao Wang, Long Chen, Huailin Liao, Ru Huang:
Widely reconfigurable 8th-order chebyshev analog baseband IC with proposed push-pull op-amp for Software-Defined Radio in 65nm CMOS. ISCAS 2012: 672-675 - [c6]Yixiao Wang, Le Ye, Huailin Liao, Ru Huang:
Cost-efficient CMOS RF tunable bandpass filter with active inductor-less biquads. ISCAS 2012: 2139-2142 - [c5]Xin Huang, Tianwei Zhang, Runsheng Wang, Changze Liu, Yuchao Liu, Ru Huang:
Self-heating effects in gate-all-around silicon nanowire MOSFETs: Modeling and analysis. ISQED 2012: 727-731 - 2011
- [j12]Ru Huang, Bin Zhao, Runsheng Wang, Yimao Cai:
Editor's note. Sci. China Inf. Sci. 54(5): 913-914 (2011) - [j11]Frederick T. Chen, Heng-Yuan Lee, Yu-Sheng Chen, Yenya Hsu, Lijie Zhang, Pang-Shiu Chen, Weisu Chen, Peiyi Gu, Wenhsing Liu, Sumin Wang, Chen-Han Tsai, Shyh-Shyuan Sheu, Ming-Jinn Tsai, Ru Huang:
Resistance switching for RRAM applications. Sci. China Inf. Sci. 54(5): 1073-1086 (2011) - [j10]Ru Huang, Runsheng Wang, Changze Liu, Liangliang Zhang, Jing Zhuge, Yu Tao, Jinbin Zou, Yuchao Liu, Yangyuan Wang:
HCI and NBTI induced degradation in gate-all-around silicon nanowire transistors. Microelectron. Reliab. 51(9-11): 1515-1520 (2011) - [c4]Ru Huang, Runsheng Wang, Jing Zhuge, Changze Liu, Tao Yu, Liangliang Zhang, Xin Huang, Yujie Ai, Jinbin Zou, Yuchao Liu, Jiewen Fan, Huailin Liao, Yangyuan Wang:
Characterization and analysis of gate-all-around Si nanowire transistors for extreme scaling. CICC 2011: 1-8 - [c3]Junhua Liu, Chen Li, Long Chen, Yehui Xiao, Jiayi Wang, Huailin Liao, Ru Huang:
An ultra-low power 400MHz OOK transceiver for medical implanted applications. ESSCIRC 2011: 175-178 - [c2]Le Ye, Congyin Shi, Huailin Liao, Ru Huang:
A 0.47mW 6th-order 20MHz active filter using highly power-efficient Opamp. ISCAS 2011: 1640-1643 - 2010
- [j9]Le Ye, Huailin Liao, Fei Song, Jiang Chen, Chen Li, Jinshu Zhao, Ruiqiang Liu, Chuan Wang, Congyin Shi, Junhua Liu, Ru Huang, Yangyuan Wang:
A Single-Chip CMOS UHF RFID Reader Transceiver for Chinese Mobile Applications. IEEE J. Solid State Circuits 45(7): 1316-1329 (2010) - [j8]Jian Wang, Wenhua Wang, Ru Huang, Yunpeng Pei, Shoubin Xue, Xin'an Wang, Chunhui Fan, Yangyuan Wang:
Deteriorated radiation effects impact on the characteristics of MOS transistors with multi-finger configuration. Microelectron. Reliab. 50(8): 1094-1097 (2010)
2000 – 2009
- 2009
- [j7]Ru Huang, HanMing Wu, Jinfeng Kang, DeYuan Xiao, XueLong Shi, Xia An, Yu Tian, Runsheng Wang, Liangliang Zhang, Xing Zhang, Yangyuan Wang:
Challenges of 22 nm and beyond CMOS technology. Sci. China Ser. F Inf. Sci. 52(9): 1491-1533 (2009) - [c1]Le Ye, Huailin Liao, Fei Song, Jiang Chen, Congyin Shi, Chen Li, Junhua Liu, Ru Huang, Jinshu Zhao, Huiling Xiao, Ruiqiang Liu, Xinan Wang:
A single-chip CMOS UHF RFID Reader transceiver for mobile applications. ESSCIRC 2009: 228-231 - 2008
- [j6]Yangyuan Wang, Xing Zhang, Xiaoyan Liu, Ru Huang:
Novel devices and process for 32 nm CMOS technology and beyond. Sci. China Ser. F Inf. Sci. 51(6): 743-755 (2008) - [j5]Ru Huang, FaLong Zhou, Yimao Cai, DaKe Wu, Xing Zhang:
Novel vertical channel double gate structures for high density and low power flash memory applications. Sci. China Ser. F Inf. Sci. 51(6): 799-806 (2008) - 2003
- [j4]Ru Huang, Jinyan Wang, Jin He, Min Yu, Xing Zhang, Yangyuan Wang:
Hot carrier degradation behavior in SOI dynamic-threshold-voltage nMOSFET's (n-DTMOSFET) measured by gated-diode configuration. Microelectron. Reliab. 43(5): 707-711 (2003) - 2002
- [j3]Jin He, Xing Zhang, Ru Huang, Yangyuan Wang:
Application of forward gated-diode R-G current method in extracting F-N stress-induced interface traps in SOI NMOSFETs. Microelectron. Reliab. 42(1): 145-148 (2002) - 2001
- [j2]Ru Huang, Weihai Bu, Xing Zhang, Yangyuan Wang:
Quasi-two-dimensional subthreshold current model of deep submicrometer SOI drive-in gate controlled hybrid transistors with lateral non-uniform doping profile. Sci. China Ser. F Inf. Sci. 44(1): 60-67 (2001) - [j1]Jin He, Xing Zhang, Ru Huang, Yangyuan Wang:
Extraction of the lateral distribution of interface traps in MOSFETs by a novel combined gated-diode technique. Microelectron. Reliab. 41(12): 1953-1957 (2001)
Coauthor Index
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