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ORCIDCongyin Shi
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2010 – 2019
- 2019
[j9]Congyin Shi
, Edgar Sánchez-Sinencio:
An On-Chip Built-in Linearity Estimation Methodology and Hardware Implementation. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(3): 897-908 (2019)- 2018
- [j8]Congyin Shi, Sanghoon Lee, Sergio Soto Aguilar, Edgar Sánchez-Sinencio:
A Time-Domain Digital-Intensive Built-In Tester for Analog Circuits. J. Electron. Test. 34(3): 313-320 (2018) - [j7]Sanghoon Lee, Congyin Shi, Jiafan Wang, Adriana C. Sanabria-Borbon, Hatem Osman, Jiang Hu, Edgar Sánchez-Sinencio:
A Built-In Self-Test and In Situ Analog Circuit Optimization Platform. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3445-3458 (2018) - 2017
- [j6]Congyin Shi, Edgar Sánchez-Sinencio:
On-Chip Two-Tone Synthesizer Based on a Mixing-FIR Architecture. IEEE J. Solid State Circuits 52(8): 2105-2116 (2017) - [c5]Jiafan Wang, Congyin Shi, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio, Jiang Hu:
Thwarting analog IC piracy via combinational locking. ITC 2017: 1-10 - 2015
- [j5]Congyin Shi, Edgar Sánchez-Sinencio:
150-850 MHz High-Linearity Sine-wave Synthesizer Architecture Based on FIR Filter Approach and SFDR Optimization. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(9): 2227-2237 (2015) - [c4]Jiafan Wang, Congyin Shi, Edgar Sánchez-Sinencio, Jiang Hu:
Built-In Self Optimization for Variation Resilience of Analog Filters. ISVLSI 2015: 656-661 - 2014
- [j4]Long Chen, Yixiao Wang, Chuan Wang, Jiayi Wang, Congyin Shi, Xuankai Weng, Le Ye, Junhua Liu, Huailin Liao, Yangyuan Wang:
A 4.2 mm2 72 mW Multistandard Direct-Conversion DTV Tuner in 65 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(1): 280-292 (2014) - 2013
- [j3]Junhua Liu, Chen Li, Long Chen, Congyin Shi, Xuankai Weng, Yixiao Wang, Jiayi Wang, Yu Liao, Le Ye, Huailin Liao, Ru Huang:
A 65 mW fully integrated UHF-band CMMB tuner in 65 nm CMOS process. Sci. China Inf. Sci. 56(1): 1-5 (2013) - [j2]Le Ye, Congyin Shi, Huailin Liao, Ru Huang, Yangyuan Wang:
Highly Power-Efficient Active-RC Filters With Wide Bandwidth-Range Using Low-Gain Push-Pull Opamps. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(1): 95-107 (2013) - 2011
- [c3]Le Ye, Congyin Shi, Huailin Liao, Ru Huang:
A 0.47mW 6th-order 20MHz active filter using highly power-efficient Opamp. ISCAS 2011: 1640-1643 - [c2]Congyin Shi, Chuan Wang, Le Ye, Huailin Liao:
-99dBc/Hz@10kHz 1MHz-step dual-loop integer-N PLL with anti-mislocking frequency calibration for global navigation satellite system receiver. ISCAS 2011: 1876-1879 - 2010
- [j1]Le Ye, Huailin Liao, Fei Song, Jiang Chen, Chen Li, Jinshu Zhao, Ruiqiang Liu, Chuan Wang, Congyin Shi, Junhua Liu, Ru Huang, Yangyuan Wang:
A Single-Chip CMOS UHF RFID Reader Transceiver for Chinese Mobile Applications. IEEE J. Solid State Circuits 45(7): 1316-1329 (2010)
2000 – 2009
- 2009
- [c1]Le Ye, Huailin Liao, Fei Song, Jiang Chen, Congyin Shi, Chen Li, Junhua Liu, Ru Huang, Jinshu Zhao, Huiling Xiao, Ruiqiang Liu, Xinan Wang:
A single-chip CMOS UHF RFID Reader transceiver for mobile applications. ESSCIRC 2009: 228-231
Coauthor Index
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