default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDTsung-Wei Huang
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[c94]Chedi Morchdi, Cheng-Hsiang Chiu, Yi Zhou, Tsung-Wei Huang:
A Resource-efficient Task Scheduling System using Reinforcement Learning : Invited Paper. ASPDAC 2024: 89-95- [c93]Shao-Hung Chan, Zhe Chen, Dian-Lun Lin, Yue Zhang, Daniel Harabor, Sven Koenig, Tsung-Wei Huang, Thomy Phan:
Anytime Multi-Agent Path Finding using Operation Parallelism in Large Neighborhood Search. AAMAS 2024: 2183-2185 - [c92]Che Chang
, Tsung-Wei Huang, Dian-Lun Lin, Guannan Guo, Shiju Lin:
Ink: Efficient Incremental k-Critical Path Generation. DAC 2024: 11:1-11:6 - [c91]Shiju Lin, Guannan Guo, Tsung-Wei Huang, Weihua Sheng, Evangeline F. Y. Young, Martin D. F. Wong:
GCS-Timer: GPU-Accelerated Current Source Model Based Static Timing Analysis. DAC 2024: 71:1-71:6 - [c90]Boyang Zhang, Dian-Lun Lin, Che Chang, Cheng-Hsiang Chiu, Bojue Wang, Wan-Luan Lee, Chih-Chun Chang, Donghao Fang, Tsung-Wei Huang:
G-PASTA: GPU-Accelerated Partitioning Algorithm for Static Timing Analysis. DAC 2024: 76:1-76:6 - [c89]Wan-Luan Lee, Dian-Lun Lin, Tsung-Wei Huang, Shui Jiang, Tsung-Yi Ho, Yibo Lin, Bei Yu:
G-kway: Multilevel GPU-Accelerated k-way Graph Partitioner. DAC 2024: 105:1-105:6 - [c88]Zizheng Guo, Tsung-Wei Huang, Zhou Jin, Cheng Zhuo, Yibo Lin, Runsheng Wang, Ru Huang:
Heterogeneous Static Timing Analysis with Advanced Delay Calculator. DATE 2024: 1-6 - [c87]Taoran Lu, Peng Yin, Guan-Ming Su, Dae Yeol Lee, Tsung-Wei Huang, Sejin Oh, Sean McCarthy, Walt Husak, Gary J. Sullivan:
The Multiplane Image Information SEI Message and its Use for Distribution of Volumetric Video with Conventional Codecs. DCC 2024: 73-82 - [c86]Pooja Guhan, Tsung-Wei Huang, Guan-Ming Su, Subhadra Gopalakrishnan, Dinesh Manocha:
V-Trans4Style: Visual Transition Recommendation for Video Production Style Adaptation. ECCV (80) 2024: 191-206 - [c85]Dian-Lun Lin, Umit Ogras, Joshua San Miguel, Tsung-Wei Huang:
TaroRTL: Accelerating RTL Simulation Using Coroutine-Based Heterogeneous Task Graph Scheduling. Euro-Par (3) 2024: 151-166 - [c84]Cheng-Hsiang Chiu, Zhicheng Xiong, Zizheng Guo, Tsung-Wei Huang, Yibo Lin:
An Efficient Task-Parallel Pipeline Programming Framework. HPC Asia 2024: 95-106 - [c83]Shui Jiang, Rongliang Fu, Lukas Burgholzer, Robert Wille, Tsung-Yi Ho, Tsung-Wei Huang:
FlatDD: A High-Performance Quantum Circuit Simulator using Decision Diagram and Flat Array. ICPP 2024: 388-399 - [c82]Chih-Chun Chang, Boyang Zhang, Tsung-Wei Huang:
GSAP: A GPU-Accelerated Stochastic Graph Partitioner. ICPP 2024: 565-575 - [c81]Tsung-Wei Huang, Boyang Zhang, Dian-Lun Lin, Cheng-Hsiang Chiu:
Parallel and Heterogeneous Timing Analysis: Partition, Algorithm, and System. ISPD 2024: 51-59 - [c80]Cheng-Hsiang Chiu, Tsung-Wei Huang:
An Experimental Study of Dynamic Task Graph Parallelism for Large-Scale Circuit Analysis Workloads. ISVLSI 2024: 766-770 - [c79]Che Chang, Cheng-Hsiang Chiu, Boyang Zhang, Tsung-Wei Huang:
Incremental Critical Path Generation for Dynamic Graphs. ISVLSI 2024: 771-774 - [c78]Jie Tong, Liangliang Chang, Umit Yusuf Ogras, Tsung-Wei Huang:
BatchSim: Parallel RTL Simulation Using Inter-Cycle Batching and Task Graph Parallelism. ISVLSI 2024: 789-793 - [c77]Zhenfei Zhang, Tsung-Wei Huang, Guan-Ming Su, Ming-Ching Chang, Xin Li:
Text-Driven Synchronized Diffusion Video and Audio Talking Head Generation. MIPR 2024: 61-67 - [c76]Yu-Ching Chen, Chih-Yu Chen, Tsung-Wei Huang, Chia-Ho Ou:
Quantum Fourier Transform of Atrial Fibrillation. QCE 2024: 537-538 - [i5]Shao-Hung Chan, Zhe Chen, Dian-Lun Lin, Yue Zhang, Daniel Harabor, Tsung-Wei Huang, Sven Koenig, Thomy Phan:
Anytime Multi-Agent Path Finding using Operation Parallelism in Large Neighborhood Search. CoRR abs/2402.01961 (2024) - 2023
- [j21]Ying-Yi Hong, Christine Joy E. Arce, Tsung-Wei Huang:
A Robust Hybrid Classical and Quantum Model for Short-Term Wind Speed Forecasting. IEEE Access 11: 90811-90824 (2023) - [j20]Guannan Guo, Tsung-Wei Huang, Yibo Lin, Zizheng Guo, Sushma Yellapragada, Martin D. F. Wong:
A GPU-Accelerated Framework for Path-Based Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4219-4232 (2023) - [j19]Zizheng Guo, Tsung-Wei Huang, Yibo Lin:
Accelerating Static Timing Analysis Using CPU-GPU Heterogeneous Parallelism. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4973-4984 (2023) - [c75]Tsung-Wei Huang, Peihan Tu, Guan-Ming Su:
Neural Segmentation Field in 3D Scene. ACSSC 2023: 1141-1145 - [c74]Dian-Lun Lin, Yanqing Zhang, Haoxing Ren, Brucek Khailany, Shih-Hsin Wang, Tsung-Wei Huang:
GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple Inputs. DAC 2023: 1-6 - [c73]Guannan Guo, Tsung-Wei Huang, Martin D. F. Wong:
Fast STA Graph Partitioning Framework for Multi-GPU Acceleration. DATE 2023: 1-6 - [c72]Chih-Chun Chang, Tsung-Wei Huang:
uSAP: An Ultra-Fast Stochastic Graph Partitioner. HPEC 2023: 1-7 - [c71]Shui Jiang, Tsung-Wei Huang, Tsung-Yi Ho:
GLARE: Accelerating Sparse DNN Inference Kernels with Global Memory Access Reduction. HPEC 2023: 1-7 - [c70]Cheng-Hsiang Chiu, Dian-Lun Lin, Tsung-Wei Huang:
Invited Paper: Programming Dynamic Task Parallelism for Heterogeneous EDA Algorithms. ICCAD 2023: 1-8 - [c69]Takashi Sato, Chun-Yao Wang, Yu-Guang Chen, Tsung-Wei Huang:
Invited Paper: Overview of 2023 CAD Contest at ICCAD. ICCAD 2023: 1-6 - [c68]Tsung-Wei Huang, Guan-Ming Su, Peng Yin:
Film Grain Removal Using Metadata. ICIP 2023: 1520-1524 - [c67]Shui Jiang, Tsung-Wei Huang, Bei Yu, Tsung-Yi Ho:
SNICIT: Accelerating Sparse Neural Network Inference via Compression at Inference Time on GPU. ICPP 2023: 51-61 - [c66]Tsung-Wei Huang:
qTask: Task-parallel Quantum Circuit Simulation with Incrementality. IPDPS 2023: 746-756 - [c65]Elmir Dzaka, Dian-Lun Lin, Tsung-Wei Huang:
Parallel And-Inverter Graph Simulation Using a Task-graph Computing System. IPDPS Workshops 2023: 923-929 - [c64]Ran-Yu Chang, Yu-Chao Hsu, Tsung-Wei Huang:
Taiwan Student Quantum Computer Society. QCE 2023: 49-57 - 2022
- [j18]Tsung-Wei Huang, Dian-Lun Lin, Yibo Lin, Chun-Xun Lin:
Taskflow: A General-Purpose Parallel and Heterogeneous Task Programming System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(5): 1448-1452 (2022) - [j17]Zizheng Guo, Mingwei Yang, Tsung-Wei Huang, Yibo Lin:
A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(10): 3466-3478 (2022) - [j16]Tsung-Wei Huang, Dian-Lun Lin, Chun-Xun Lin, Yibo Lin:
Taskflow: A Lightweight Parallel and Heterogeneous Task Graph Computing System. IEEE Trans. Parallel Distributed Syst. 33(6): 1303-1320 (2022) - [j15]Dian-Lun Lin, Tsung-Wei Huang:
Accelerating Large Sparse Neural Network Inference Using GPU Task Graph Parallelism. IEEE Trans. Parallel Distributed Syst. 33(11): 3041-3052 (2022) - [c63]Kexing Zhou, Zizheng Guo, Tsung-Wei Huang, Yibo Lin:
Efficient Critical Paths Search Algorithm using Mergeable Heap. ASP-DAC 2022: 190-195 - [c62]Cheng-Hsiang Chiu, Tsung-Wei Huang:
Efficient timing propagation with simultaneous structural and pipeline parallelisms: late breaking results. DAC 2022: 1388-1389 - [c61]Cheng-Hsiang Chiu, Tsung-Wei Huang:
Composing Pipeline Parallelism using Control Taskflow Graph. HPDC 2022: 283-284 - [c60]Tsung-Wei Huang:
Enhancing the Performance Portability of Heterogeneous Circuit Analysis Programs. HPEC 2022: 1-2 - [c59]Tsung-Wei Huang, Leslie Hwang:
Task-Parallel Programming with Constrained Parallelism. HPEC 2022: 1-7 - [c58]Yu-Guang Chen, Chun-Yao Wang, Tsung-Wei Huang, Takashi Sato:
Overview of 2022 CAD Contest at ICCAD. ICCAD 2022: 92:1-92:3 - [c57]Dian-Lun Lin, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Tsung-Wei Huang:
From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus. ICPP 2022: 88:1-88:12 - [c56]Tsung-Wei Huang, Yibo Lin:
Concurrent CPU-GPU Task Programming using Modern C++. IPDPS Workshops 2022: 588-597 - [i4]Cheng-Hsiang Chiu, Tsung-Wei Huang, Zizheng Guo, Yibo Lin:
Pipeflow: An Efficient Task-Parallel Pipeline Programming Framework using Modern C++. CoRR abs/2202.00717 (2022) - [i3]Tsung-Wei Huang, Yibo Lin:
Concurrent CPU-GPU Task Programming using Modern C++. CoRR abs/2203.08395 (2022) - [i2]Tsung-Wei Huang:
qTask: Task-parallel Quantum Circuit Simulation with Incrementality. CoRR abs/2210.01076 (2022) - 2021
- [j14]Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong:
OpenTimer v2: A Parallel Incremental Timing Analysis Engine. IEEE Des. Test 38(2): 62-68 (2021) - [j13]Tsung-Wei Huang, Guannan Guo, Chun-Xun Lin, Martin D. F. Wong:
OpenTimer v2: A New Parallel Incremental Timing Analysis Engine. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(4): 776-789 (2021) - [j12]Tsung-Wei Huang, Yibo Lin, Chun-Xun Lin, Guannan Guo, Martin D. F. Wong:
Cpp-Taskflow: A General-Purpose Parallel Task Programming System at Scale. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(8): 1687-1700 (2021) - [c55]Kuan-Ming Lai, Tsung-Wei Huang, Pei-Yu Lee, Tsung-Yi Ho:
ATM: A High Accuracy Extracted Timing Model for Hierarchical Timing Analysis. ASP-DAC 2021: 278-283 - [c54]Zizheng Guo, Tsung-Wei Huang, Yibo Lin:
A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs. DAC 2021: 715-720 - [c53]Guannan Guo, Tsung-Wei Huang, Yibo Lin, Martin D. F. Wong:
GPU-accelerated Path-based Timing Analysis. DAC 2021: 721-726 - [c52]McKay Mower, Luke Majors, Tsung-Wei Huang:
Taskflow-San: Sanitizing Erroneous Control Flow in Taskflow Graphs. ESPM2@SC 2021: 30-37 - [c51]Dian-Lun Lin, Tsung-Wei Huang:
Efficient GPU Computation Using Task Graph Parallelism. Euro-Par 2021: 435-450 - [c50]Cheng-Hsiang Chiu, Dian-Lun Lin, Tsung-Wei Huang:
An Experimental Study of SYCL Task Graph Parallelism for Large-Scale Machine Learning Workloads. Euro-Par Workshops 2021: 468-479 - [c49]Yasin Zamani, Tsung-Wei Huang:
A High-Performance Heterogeneous Critical Path Analysis Framework. HPEC 2021: 1-7 - [c48]Zizheng Guo, Tsung-Wei Huang, Yibo Lin:
HeteroCPPR: Accelerating Common Path Pessimism Removal with Heterogeneous CPU-GPU Parallelism. ICCAD 2021: 1-9 - [c47]Guannan Guo, Tsung-Wei Huang, Yibo Lin, Martin D. F. Wong:
GPU-accelerated Critical Path Generation with Path Constraints. ICCAD 2021: 1-9 - [c46]Tsung-Wei Huang, Yu-Guang Chen, Chun-Yao Wang, Takashi Sato:
Overview of 2021 CAD Contest at ICCAD. ICCAD 2021: 1-3 - [c45]Tsung-Wei Huang, Guan-Ming Su:
Revertible Guidance Image Based Image Detail Enhancement. ICIP 2021: 1704-1708 - [c44]Tsung-Wei Huang:
TFProf: Profiling Large Taskflow Programs with Modern D3 and C++. ProTools@SC 2021: 1-6 - [c43]Tsung-Wei Huang:
Machine Learning System-Enabled GPU Acceleration for EDA. VLSI-DAT 2021: 1 - 2020
- [j11]Wei-Jia Huang, Wei-Chen Chien, Chien-Hung Cho, Che-Chun Huang, Tsung-Wei Huang, Ching-Ray Chang:
Mermin's inequalities of multiple qubits with orthogonal measurements on IBM Q 53-qubit system. Quantum Eng. 2(2) (2020) - [c42]Guannan Guo, Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong:
An Efficient Critical Path Generation Algorithm Considering Extensive Path Constraints. DAC 2020: 1-6 - [c41]Dian-Lun Lin, Tsung-Wei Huang:
A Novel Inference Algorithm for Large Sparse Neural Network using Task Graph Parallelism. HPEC 2020: 1-7 - [c40]Ing-Chao Lin, Ulf Schlichtmann, Tsung-Wei Huang, Mark Po-Hung Lin:
Overview of 2020 CAD Contest at ICCAD. ICCAD 2020: 67:1-67:3 - [c39]Zizheng Guo, Tsung-Wei Huang, Yibo Lin:
GPU-Accelerated Static Timing Analysis. ICCAD 2020: 147:1-147:9 - [c38]Tsung-Wei Huang:
A General-purpose Parallel and Heterogeneous Task Programming System for VLSI CAD. ICCAD 2020: 169:1-169:2 - [c37]Chun-Xun Lin, Tsung-Wei Huang, Martin D. F. Wong:
An Efficient Work-Stealing Scheduler for Task Dependency Graph. ICPADS 2020: 64-71 - [c36]Tsung-Wei Huang:
Programming Systems for Parallelizing VLSI CAD and Beyond. VLSI-DAT 2020: 1 - [i1]Tsung-Wei Huang, Dian-Lun Lin, Yibo Lin, Chun-Xun Lin:
Cpp-Taskflow v2: A General-purpose Parallel and Heterogeneous Task Programming System at Scale. CoRR abs/2004.10908 (2020)
2010 – 2019
- 2019
- [j10]Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong:
DtCraft: A High-Performance Distributed Execution Engine at Scale. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(6): 1070-1083 (2019) - [j9]Tsung-Wei Huang, Jenq-Neng Hwang, Suzanne Romain, Farron Wallace:
Fish Tracking and Segmentation From Stereo Videos on the Wild Sea Surface for Electronic Monitoring of Rail Fishing. IEEE Trans. Circuits Syst. Video Technol. 29(10): 3146-3158 (2019) - [c35]Hung-Min Hsu, Tsung-Wei Huang, Gaoang Wang, Jiarui Cai, Zhichao Lei, Jenq-Neng Hwang:
Multi-Camera Tracking of Vehicles based on Deep Features Re-ID and Trajectory-Based Camera Link Models. CVPR Workshops 2019: 416-424 - [c34]Tsung-Wei Huang, Jiarui Cai, Hao Yang, Hung-Min Hsu, Jenq-Neng Hwang:
Multi-View Vehicle Re-Identification using Temporal Attention Model and Metadata Re-ranking. CVPR Workshops 2019: 434-442 - [c33]Tsung-Wei Huang, Chun-Xun Lin, Guannan Guo, Martin D. F. Wong:
Essential Building Blocks for Creating an Open-source EDA Project. DAC 2019: 78 - [c32]Kuan-Ming Lai, Tsung-Wei Huang, Tsung-Yi Ho:
A General Cache Framework for Efficient Generation of Timing Critical Paths. DAC 2019: 108 - [c31]Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong:
Distributed Timing Analysis at Scale. DAC 2019: 229 - [c30]Chun-Xun Lin, Tsung-Wei Huang, Guannan Guo, Martin D. F. Wong:
An Efficient and Composable Parallel Task Programming Library. HPEC 2019: 1-7 - [c29]Tsung-Wei Huang, Jenq-Neng Hwang, Suzanne Romain, Farron Wallace:
Recognizing Fish Species Captured Live on Wild Sea Surface in Videos by Deep Metric Learning with a Temporal Constraint. ICIP 2019: 3407-3411 - [c28]Tsung-Wei Huang, Chun-Xun Lin, Guannan Guo, Martin D. F. Wong:
Cpp-Taskflow: Fast Task-Based Parallel Programming Using Modern C++. IPDPS 2019: 974-983 - [c27]Chun-Xun Lin, Tsung-Wei Huang, Guannan Guo, Martin D. F. Wong:
A Modern C++ Parallel Task Programming Library. ACM Multimedia 2019: 2284-2287 - 2018
- [c26]Chun-Xun Lin, Tsung-Wei Huang, Guannan Guo, Martin D. F. Wong:
MtDetector: A High-performance Marine Traffic Detector at Stream Scale. DEBS 2018: 205-208 - [c25]Chun-Xun Lin, Tsung-Wei Huang, Ting Yu, Martin D. F. Wong:
A Distributed Power Grid Analysis Framework from Sequential Stream Graph. ACM Great Lakes Symposium on VLSI 2018: 183-188 - [c24]Chun-Xun Lin, Tsung-Wei Huang, Martin D. F. Wong:
Routing at compile time. ISQED 2018: 169-175 - [c23]Tsung-Wei Huang, Chun-Xun Lin, Guannan Guo, Martin D. F. Wong:
A General-purpose Distributed Programming System using Data-parallel Streams. ACM Multimedia 2018: 1360-1363 - 2017
- [b1]Tsung-Wei Huang:
Distributed timing analysis. University of Illinois Urbana-Champaign, USA, 2017 - [c22]Tin-Yin Lai, Tsung-Wei Huang, Martin D. F. Wong:
LibAbs: An Efficient and Accurate Timing Macro-Modeling Algorithm for Large Hierarchical Designs. DAC 2017: 65:1-65:6 - [c21]Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong:
DtCraft: A distributed execution engine for compute-intensive applications. ICCAD 2017: 757-765 - 2016
- [j8]Tsung-Wei Huang, Martin D. F. Wong:
UI-Timer 1.0: An Ultrafast Path-Based Timing Analysis Algorithm for CPPR. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(11): 1862-1875 (2016) - [c20]Tsung-Wei Huang, Martin D. F. Wong, Debjit Sinha, Kerim Kalafala, Natesan Venkateswaran:
A distributed timing analysis framework for large designs. DAC 2016: 116:1-116:6 - [c19]Tsung-Wei Huang, Jenq-Neng Hwang, Craig S. Rose:
Chute based automated fish length measurement and water drop detection. ICASSP 2016: 1906-1910 - [c18]Tsung-Wei Huang, Jenq-Neng Hwang, Suzanne Romain, Farron Wallace:
Live Tracking of Rail-Based Fish Catching on Wild Sea Surface. CVAUI@ICPR 2016: 25-30 - 2015
- [c17]Tsung-Wei Huang, Martin D. F. Wong:
OpenTimer: A High-Performance Timing Analysis Tool. ICCAD 2015: 895-902 - [c16]Tsung-Wei Huang, Martin D. F. Wong:
Accelerated Path-Based Timing Analysis with MapReduce. ISPD 2015: 103-110 - [c15]Tsung-Wei Huang, Martin D. F. Wong:
On fast timing closure: speeding up incremental path-based timing analysis with mapreduce. SLIP 2015: 1-6 - 2014
- [j7]Sheng-Han Yeh, Jia-Wen Chang, Tsung-Wei Huang, Shang-Tsung Yu, Tsung-Yi Ho:
Voltage-Aware Chip-Level Design for Reliability-Driven Pin-Constrained EWOD Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(9): 1302-1315 (2014) - [c14]Tsung-Wei Huang, Pei-Ci Wu, Martin D. F. Wong:
Fast path-based timing analysis for CPPR. ICCAD 2014: 596-599 - [c13]Tsung-Wei Huang, Pei-Ci Wu, Martin D. F. Wong:
UI-timer: an ultra-fast clock network pessimism removal algorithm. ICCAD 2014: 758-765 - [c12]Tsung-Wei Huang, Pei-Ci Wu, Martin D. F. Wong:
UI-route: An ultra-fast incremental maze routing algorithm. SLIP 2014: 4:1-4:8 - 2013
- [j6]Jia-Wen Chang, Sheng-Han Yeh, Tsung-Wei Huang, Tsung-Yi Ho:
Integrated Fluidic-Chip Co-Design Methodology for Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(2): 216-227 (2013) - [j5]Ying-Han Chen, Chung-Lun Hsu, Li-Chen Tsai, Tsung-Wei Huang, Tsung-Yi Ho:
A Reliability-Oriented Placement Algorithm for Reconfigurable Digital Microfluidic Biochips Using 3-D Deferred Decision Making Technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(8): 1151-1162 (2013) - [j4]Jia-Wen Chang, Sheng-Han Yeh, Tsung-Wei Huang, Tsung-Yi Ho:
An ILP-Based Routing Algorithm for Pin-Constrained EWOD Chips With Obstacle Avoidance. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1655-1667 (2013) - 2012
- [c11]Jia-Wen Chang, Tsung-Wei Huang, Tsung-Yi Ho:
An ILP-based obstacle-avoiding routing algorithm for pin-constrained EWOD chips. ASP-DAC 2012: 67-72 - [c10]Sheng-Han Yeh, Jia-Wen Chang, Tsung-Wei Huang, Tsung-Yi Ho:
Voltage-aware chip-level design for reliability-driven pin-constrained EWOD chips. ICCAD 2012: 353-360 - [c9]Tsung-Wei Huang, Jia-Wen Chang, Tsung-Yi Ho:
Integrated fluidic-chip co-design methodology for digital microfluidic biochips. ISPD 2012: 49-56 - 2011
- [j3]Tsung-Wei Huang, Tsung-Yi Ho:
A Two-Stage Integer Linear Programming-Based Droplet Routing Algorithm for Pin-Constrained Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(2): 215-228 (2011) - [j2]Tsung-Wei Huang, Shih-Yuan Yeh, Tsung-Yi Ho:
A Network-Flow Based Pin-Count Aware Routing Algorithm for Broadcast-Addressing EWOD Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(12): 1786-1799 (2011) - [c8]Tsung-Wei Huang, Hong-Yan Su, Tsung-Yi Ho:
Progressive network-flow based power-aware broadcast addressing for pin-constrained digital microfluidic biochips. DAC 2011: 741-746 - [c7]Tsung-Wei Huang, Tsung-Yi Ho, Krishnendu Chakrabarty:
Reliability-oriented broadcast electrode-addressing for pin-constrained digital microfluidic biochips. ICCAD 2011: 448-455 - [c6]Ping-Hung Yuh, Cliff Chiung-Yu Lin, Tsung-Wei Huang, Tsung-Yi Ho, Chia-Lin Yang, Yao-Wen Chang:
A SAT-based routing algorithm for cross-referencing biochips. SLIP 2011: 1-7 - [c5]Tsung-Wei Huang, Yan-You Lin, Jia-Wen Chang, Tsung-Yi Ho:
Recent research and emerging challenges in design and optimization for digital microfluidic biochips. SoCC 2011: 12-17 - 2010
- [j1]Tsung-Wei Huang, Chun-Hsien Lin, Tsung-Yi Ho:
A Contamination Aware Droplet Routing Algorithm for the Synthesis of Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(11): 1682-1695 (2010) - [c4]Tsung-Wei Huang, Shih-Yuan Yeh, Tsung-Yi Ho:
A network-flow based pin-count aware routing algorithm for broadcast electrode-addressing EWOD chips. ICCAD 2010: 425-431 - [c3]Tsung-Wei Huang, Tsung-Yi Ho:
A two-stage ILP-based droplet routing algorithm for pin-constrained digital microfluidic biochips. ISPD 2010: 201-208
2000 – 2009
- 2009
- [c2]Tsung-Wei Huang, Chun-Hsien Lin, Tsung-Yi Ho:
A contamination aware droplet routing algorithm for digital microfluidic biochips. ICCAD 2009: 151-156 - [c1]Tsung-Wei Huang, Tsung-Yi Ho:
A fast routability- and performance-driven droplet routing algorithm for digital microfluidic biochips. ICCD 2009: 445-450
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2025-01-27 00:44 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
