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2020 – today
- 2024
[j11]Yingjie Li, Mingju Liu, Haoxing Ren, Alan Mishchenko, Cunxi Yu:
DAG-Aware Synthesis Orchestration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(12): 4666-4675 (2024)- [j10]Yi-Chen Lu
, Haoxing Ren, Hao-Hsiang Hsiao, Sung Kyu Lim:
GAN-Place: Advancing Open Source Placers to Commercial-quality Using Generative Adversarial Networks and Transfer Learning. ACM Trans. Design Autom. Electr. Syst. 29(2): 32:1-32:17 (2024) - [c70]Yunda Tsai, Mingjie Liu, Haoxing Ren:
RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Model. DAC 2024: 53:1-53:6 - [c69]Wei Li, Rongjian Liang, Anthony Agnesina, Haoyu Yang, Chia-Tung Ho, Anand Rajaram, Haoxing Ren:
DGR: Differentiable Global Router. DAC 2024: 303:1-303:6 - [c68]Yingjie Li, Anthony Agnesina, Yanqing Zhang, Haoxing Ren, Cunxi Yu:
BoolGebra: Attributed Graph-Learning for Boolean Algebraic Manipulation. DATE 2024: 1-2 - [c67]Haoyu Yang, Haoxing Ren:
ILILT: Implicit Learning of Inverse Lithography Technologies. ICML 2024 - [c66]Rongjian Liang, Anthony Agnesina, Haoxing Ren:
MedPart: A Multi-Level Evolutionary Differentiable Hypergraph Partitioner. ISPD 2024: 3-11 - [c65]Wen-Hao Liu, Anthony Agnesina, Haoxing Mark Ren:
Challenges for Automating PCB Layout. ISPD 2024: 91-92 - [c64]Chia-Tung Ho, Ajay Chandna, David Guan, Alvin Ho, Minsoo Kim, Yaguang Li, Haoxing Ren:
Novel Transformer Model Based Clustering Method for Standard Cell Design Automation. ISPD 2024: 195-203 - [c63]Rongjian Liang, Anthony Agnesina, Wen-Hao Liu, Haoxing Ren:
GPU/ML-Enhanced Large Scale Global Routing Contest. ISPD 2024: 269-274 - [c62]Yunsheng Bai, Atefeh Sohrabizadeh, Zijian Ding, Rongjian Liang, Weikai Li, Ding Wang, Haoxing Ren, Yizhou Sun, Jason Cong:
Learning to Compare Hardware Designs for High-Level Synthesis. MLCAD 2024: 2:1-2:7 - [c61]Rongjian Liang, Chia-Tung Ho, Anthony Agnesina, Wen-Hao Liu, Haoxing Ren:
ReLS: Retrieval Is Efficient Knowledge Transfer For Logic Synthesis. MLCAD 2024: 8:1-8:7 - [c60]Christopher Batten, Nathaniel Ross Pinckney, Mingjie Liu, Haoxing Ren, Brucek Khailany:
PyHDL-Eval: An LLM Evaluation Framework for Hardware Design Using Python-Embedded DSLs. MLCAD 2024: 10:1-10:17 - [c59]Haoyu Yang, Anthony Agnesina, Haoxing Ren:
Optimizing Predictive AI in Physical Design Flows with Mini Pixel Batch Gradient Descent. MLCAD 2024: 34:1-34:7 - [c58]Vidya A. Chhabria, Wenjing Jiang, Andrew B. Kahng, Rongjian Liang, Haoxing Ren, Sachin S. Sapatnekar, Bing-Yue Wu:
OpenROAD and CircuitOps: Infrastructure for ML EDA Research and Education. VTS 2024: 1-4 - [c57]Mingjie Liu, Minwoo Kang, Ghaith Bany Hamad, Syed Suhaib, Haoxing Ren:
Domain-Adapted LLMs for VLSI Design and Verification: A Case Study on Formal Verification. VTS 2024: 1-4 - [i28]Yingjie Li, Anthony Agnesina, Yanqing Zhang, Haoxing Ren, Cunxi Yu:
BoolGebra: Attributed Graph-learning for Boolean Algebraic Manipulation. CoRR abs/2401.10753 (2024) - [i27]Haoyu Yang, Anthony Agnesina, Haoxing Ren:
Optimizing Predictive AI in Physical Design Flows with Mini Pixel Batch Gradient Descent. CoRR abs/2402.06034 (2024) - [i26]Amit Sharma, Teodor-Dumitru Ene, Kishor Kunal, Mingjie Liu, Zafar Hasan, Haoxing Ren:
Assessing Economic Viability: A Comparative Analysis of Total Cost of Ownership for Domain-Adapted Large Language Models versus State-of-the-art Counterparts in Chip Design Coding Assistance. CoRR abs/2404.08850 (2024) - [i25]Haoyu Yang, Haoxing Ren:
ILILT: Implicit Learning of Inverse Lithography Technologies. CoRR abs/2405.03574 (2024) - [i24]Chia-Tung Ho, Haoxing Ren:
Large Language Model (LLM) for Standard Cell Layout Design Optimization. CoRR abs/2406.06549 (2024) - [i23]Anthony Agnesina, Rongjian Liang, Geraldo Pradipta, Anand Rajaram, Haoxing Ren:
GOALPlace: Begin with the End in Mind. CoRR abs/2407.04579 (2024) - [i22]Yun-Da Tsai, Mingjie Liu, Haoxing Ren:
Code Less, Align More: Efficient LLM Fine-tuning for Code Generation with Data Pruning. CoRR abs/2407.05040 (2024) - [i21]Chia-Tung Ho, Haoxing Ren, Brucek Khailany:
VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool. CoRR abs/2408.08927 (2024) - [i20]Guojin Chen, Haoyu Yang, Haoxing Ren, Bei Yu, David Z. Pan:
Differentiable Edge-based OPC. CoRR abs/2408.08969 (2024) - [i19]Nathaniel Ross Pinckney, Christopher Batten, Mingjie Liu, Haoxing Ren, Brucek Khailany:
Revisiting VerilogEval: Newer LLMs, In-Context Learning, and Specification-to-RTL Tasks. CoRR abs/2408.11053 (2024) - [i18]Guojin Chen, Haoyu Yang, Bei Yu, Haoxing Ren:
Intelligent OPC Engineer Assistant for Semiconductor Manufacturing. CoRR abs/2408.12775 (2024) - [i17]Mingjie Liu, Yun-Da Tsai, Wenfei Zhou, Haoxing Ren:
CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair. CoRR abs/2409.12993 (2024) - [i16]Yunsheng Bai, Atefeh Sohrabizadeh, Zijian Ding, Rongjian Liang, Weikai Li, Ding Wang, Haoxing Ren, Yizhou Sun, Jason Cong:
Learning to Compare Hardware Designs for High-Level Synthesis. CoRR abs/2409.13138 (2024) - [i15]Minwoo Kang, Mingjie Liu, Ghaith Bany Hamad, Syed Suhaib, Haoxing Ren:
FVEval: Understanding Language Model Capabilities in Formal Verification of Digital Hardware. CoRR abs/2410.23299 (2024) - 2023
- [j9]Haoxing Ren, Brucek Khailany, Matthew Fojtik, Yanqing Zhang:
Machine Learning and Algorithms: Let Us Team Up for EDA. IEEE Des. Test 40(1): 70-76 (2023) - [j8]Yibo Lin, Avi Ziv, Haoxing Ren:
Introduction to the Special Issue on Machine Learning for CAD/EDA. ACM Trans. Design Autom. Electr. Syst. 28(2): 14:1-14:2 (2023) - [c56]Rongjian Liang, Siddhartha Nath, Anand Rajaram, Jiang Hu, Haoxing Ren:
BufFormer: A Generative ML Framework for Scalable Buffering. ASP-DAC 2023: 264-270 - [c55]Haoyu Yang, Haoxing Ren:
Enabling Scalable AI Computational Lithography with Physics-Inspired Models. ASP-DAC 2023: 715-720 - [c54]Dian-Lun Lin, Yanqing Zhang, Haoxing Ren, Brucek Khailany, Shih-Hsin Wang, Tsung-Wei Huang:
GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple Inputs. DAC 2023: 1-6 - [c53]Rongjian Liang, Anthony Agnesina, Geraldo Pradipta, Vidya A. Chhabria, Haoxing Ren:
Invited Paper: CircuitOps: An ML Infrastructure Enabling Generative AI for VLSI Circuit Optimization. ICCAD 2023: 1-6 - [c52]Mingjie Liu, Nathaniel Ross Pinckney, Brucek Khailany, Haoxing Ren:
Invited Paper: VerilogEval: Evaluating Large Language Models for Verilog Code Generation. ICCAD 2023: 1-8 - [c51]Mingjie Liu, Haoyu Yang, Brucek Khailany, Haoxing Ren:
An Adversarial Active Sampling-Based Data Augmentation Framework for AI-Assisted Lithography Modeling. ICCAD 2023: 1-9 - [c50]Hao Chen, Kai-Chieh Hsu, Walker J. Turner, Po-Hsuan Wei, Keren Zhu, David Z. Pan, Haoxing Ren:
Reinforcement Learning Guided Detailed Routing for Custom Circuits. ISPD 2023: 26-34 - [c49]Chia-Tung Ho, Alvin Ho, Matthew Fojtik, Minsoo Kim, Shang Wei, Yaguang Li, Brucek Khailany, Haoxing Ren:
NVCell 2: Routability-Driven Standard Cell Layout in Advanced Nodes with Lattice Graph Routability Model. ISPD 2023: 44-52 - [c48]Yi-Chen Lu, Haoxing Ren, Hao-Hsiang Hsiao, Sung Kyu Lim:
DREAM-GAN: Advancing DREAMPlace towards Commercial-Quality using Generative Adversarial Learning. ISPD 2023: 141-148 - [c47]Anthony Agnesina, Puranjay Rajvanshi, Tian Yang, Geraldo Pradipta, Austin Jiao, Ben Keller, Brucek Khailany, Haoxing Ren:
AutoDMP: Automated DREAMPlace-based Macro Placement. ISPD 2023: 149-157 - [i14]Mingjie Liu, Nathaniel Ross Pinckney, Brucek Khailany, Haoxing Ren:
VerilogEval: Evaluating Large Language Models for Verilog Code Generation. CoRR abs/2309.07544 (2023) - [i13]Mingjie Liu, Teodor-Dumitru Ene, Robert Kirby, Chris Cheng, Nathaniel Ross Pinckney, Rongjian Liang, Jonah Alben, Himyanshu Anand, Sanmitra Banerjee, Ismet Bayraktaroglu, Bonita Bhaskaran, Bryan Catanzaro, Arjun Chaudhuri, Sharon Clay, Bill Dally, Laura Dang, Parikshit Deshpande, Siddhanth Dhodhi, Sameer Halepete, Eric Hill, Jiashang Hu, Sumit Jain, Brucek Khailany, Kishor Kunal, Xiaowei Li, Hao Liu, Stuart F. Oberman, Sujeet Omar, Sreedhar Pratty, Jonathan Raiman, Ambar Sarkar, Zhengjiang Shao, Hanfei Sun, Pratik P. Suthar, Varun Tej, Kaizhe Xu, Haoxing Ren:
ChipNeMo: Domain-Adapted LLMs for Chip Design. CoRR abs/2311.00176 (2023) - [i12]Yun-Da Tsai, Mingjie Liu, Haoxing Ren:
RTLFixer: Automatically Fixing RTL Syntax Errors with Large Language Models. CoRR abs/2311.16543 (2023) - 2022
- [c46]Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Mark Kilgard, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren:
Generic lithography modeling with dual-band optics-inspired neural networks. DAC 2022: 973-978 - [c45]Yanqing Zhang, Haoxing Ren, Akshay Sridharan, Brucek Khailany:
GATSPI: GPU accelerated gate-level simulation for power improvement. DAC 2022: 1231-1236 - [c44]Siddhartha Nath, Geraldo Pradipta, Corey Hu, Tian Yang, Brucek Khailany, Haoxing Ren:
Generative self-supervised learning for gate sizing: invited. DAC 2022: 1331-1334 - [c43]Hao Chen, Walker J. Turner, David Z. Pan, Haoxing Ren:
Routability-Aware Placement for Advanced FinFET Mixed-Signal Circuits using Satisfiability Modulo Theories. DATE 2022: 160-165 - [c42]Haoxing Ren, Siddhartha Nath, Yanqing Zhang, Hao Chen, Mingjie Liu:
Why are Graph Neural Networks Effective for EDA Problems?: (Invited Paper). ICCAD 2022: 1:1-1:8 - [c41]Keren Zhu, Hao Chen, Walker J. Turner, George F. Kokai, Po-Hsuan Wei, David Z. Pan, Haoxing Ren:
TAG: Learning Circuit Spatial Embedding from Layouts. ICCAD 2022: 66:1-66:9 - [c40]Siddhartha Nath, Geraldo Pradipta, Corey Hu, Tian Yang, Brucek Khailany, Haoxing Ren:
TransSizer: A Novel Transformer-Based Fast Gate Sizer. ICCAD 2022: 74:1-74:9 - [c39]Dian-Lun Lin, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Tsung-Wei Huang:
From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus. ICPP 2022: 88:1-88:12 - [c38]Haoxing Ren:
Embracing Machine Learning in EDA. ISPD 2022: 55-56 - [c37]Hao Chen, Walker J. Turner, Sanquan Song, Keren Zhu, George F. Kokai, Brian Zimmer, C. Thomas Gray, Brucek Khailany, David Z. Pan, Haoxing Ren:
AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies. ISPD 2022: 175-183 - [c36]Yi-Chen Lu, Tian Yang, Sung Kyu Lim, Haoxing Ren:
Placement Optimization via PPA-Directed Graph Clustering. MLCAD 2022: 1-6 - [c35]Vidya A. Chhabria, Ben Keller, Yanqing Zhang, Sandeep Vollala, Sreedhar Pratty, Haoxing Ren, Brucek Khailany:
XT-PRAGGMA: Crosstalk Pessimism Reduction Achieved with GPU Gate-level Simulations and Machine Learning. MLCAD 2022: 63-69 - [i11]Yanqing Zhang, Haoxing Ren, Akshay Sridharan, Brucek Khailany:
GATSPI: GPU Accelerated Gate-Level Simulation for Power Improvement. CoRR abs/2203.06117 (2022) - [i10]Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Mark Kilgard, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren:
Generic Lithography Modeling with Dual-band Optics-Inspired Neural Networks. CoRR abs/2203.08616 (2022) - [i9]Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren:
Large Scale Mask Optimization Via Convolutional Fourier Neural Operator and Litho-Guided Self Training. CoRR abs/2207.04056 (2022) - [i8]Keren Zhu, Hao Chen, Walker J. Turner, George F. Kokai, Po-Hsuan Wei, David Z. Pan, Haoxing Ren:
TAG: Learning Circuit Spatial Embedding From Layouts. CoRR abs/2209.03465 (2022) - [i7]Mingjie Liu, Haoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Selim Dogru, Anima Anandkumar, David Z. Pan, Brucek Khailany, Haoxing Ren:
An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design. CoRR abs/2210.15765 (2022) - 2021
- [j7]Yibo Lin, Zixuan Jiang, Jiaqi Gu, Wuxi Li, Shounak Dhar, Haoxing Ren, Brucek Khailany, David Z. Pan:
DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(4): 748-761 (2021) - [c34]Haoxing Ren, Matthew Fojtik:
Standard Cell Routing with Reinforcement Learning and Genetic Algorithm in Advanced Technology Nodes. ASP-DAC 2021: 684-689 - [c33]Haoxing Ren, Matthew Fojtik:
Invited- NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning. DAC 2021: 1291-1294 - [c32]Mingjie Liu, Walker J. Turner, George F. Kokai, Brucek Khailany, David Z. Pan, Haoxing Ren:
Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization. DATE 2021: 1372-1377 - [c31]Vidya A. Chhabria, Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany, Sachin S. Sapatnekar:
MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification. DATE 2021: 1825-1828 - [c30]Ghasem Pasandi, Sreedhar Pratty, David Brown, Yanqing Zhang, Haoxing Ren, Brucek Khailany:
2021 ICCAD CAD Contest Problem C: GPU Accelerated Logic Rewriting. ICCAD 2021: 1-6 - [c29]Haoxing Ren, Saad Godil, Brucek Khailany, Robert Kirby, Haiguang Liao, Siddhartha Nath, Jonathan Raiman, Rajarshi Roy:
Optimizing VLSI Implementation with Reinforcement Learning - ICCAD Special Session Paper. ICCAD 2021: 1-6 - [i6]Steve Dai, Rangharajan Venkatesan, Haoxing Ren, Brian Zimmer, William J. Dally, Brucek Khailany:
VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference. CoRR abs/2102.04503 (2021) - [i5]Steve Dai, Alicia Klinefelter, Haoxing Ren, Rangharajan Venkatesan, Ben Keller, Nathaniel Ross Pinckney, Brucek Khailany:
Verifying High-Level Latency-Insensitive Designs with Formal Model Checking. CoRR abs/2102.06326 (2021) - [i4]Haoxing Ren, Matthew Fojtik, Brucek Khailany:
NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning. CoRR abs/2107.07044 (2021) - 2020
- [j6]Brucek Khailany, Haoxing Ren, Steve Dai, Saad Godil, Ben Keller, Robert Kirby, Alicia Klinefelter, Rangharajan Venkatesan, Yanqing Zhang, Bryan Catanzaro, William J. Dally:
Accelerating Chip Design With Machine Learning. IEEE Micro 40(6): 23-32 (2020) - [j5]Yibo Lin, Wuxi Li, Jiaqi Gu, Haoxing Ren, Brucek Khailany, David Z. Pan:
ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on Multithreaded CPUs and GPUs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 5083-5096 (2020) - [c28]Zhiyao Xie, Haoxing Ren, Brucek Khailany, Ye Sheng, Santosh Santosh, Jiang Hu, Yiran Chen:
PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network. ASP-DAC 2020: 13-18 - [c27]Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, Erick Carvajal Barboza:
FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning. ASP-DAC 2020: 19-25 - [c26]Haoxing Ren, George F. Kokai, Walker J. Turner, Ting-Sheng Ku:
ParaGraph: Layout Parasitics and Device Parameter Prediction using Graph Neural Networks. DAC 2020: 1-6 - [c25]Yanqing Zhang, Haoxing Ren, Brucek Khailany:
GRANNITE: Graph Neural Network Inference for Transferable Power Estimation. DAC 2020: 1-6 - [c24]Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany:
Problem C: GPU Accelerated Logic Re-simulation : (Invited Talk). ICCAD 2020: 70:1-70:4 - [c23]Yanqing Zhang, Haoxing Ren, Brucek Khailany:
Opportunities for RTL and Gate Level Simulation using GPUs (Invited Talk). ICCAD 2020: 166:1-166:5 - [c22]Raviv Gal, David Z. Pan, Haoxing Ren, Manish Pandey, Marilyn Wolf, Avi Ziv:
ML for CAD - Where is the Treasure Hiding? MLCAD 2020: 137 - [i3]Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, Erick Carvajal Barboza:
FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter Tuning. CoRR abs/2011.13493 (2020) - [i2]Zhiyao Xie, Haoxing Ren, Brucek Khailany, Ye Sheng, Santosh Santosh, Jiang Hu, Yiran Chen:
PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural Network. CoRR abs/2011.13494 (2020) - [i1]Vidya A. Chhabria, Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany, Sachin S. Sapatnekar:
MAVIREC: ML-Aided Vectored IR-DropEstimation and Classification. CoRR abs/2012.10597 (2020)
2010 – 2019
- 2019
- [c21]Yuzhe Ma, Haoxing Ren, Brucek Khailany, Harbinder Sikka, Lijuan Luo, Karthikeyan Natarajan, Bei Yu:
High Performance Graph Convolutional Networks with Applications in Testability Analysis. DAC 2019: 18 - [c20]Yuan Zhou, Haoxing Ren, Yanqing Zhang, Ben Keller, Brucek Khailany, Zhiru Zhang:
PRIMAL: Power Inference using Machine Learning. DAC 2019: 39 - [c19]Yibo Lin, Shounak Dhar, Wuxi Li, Haoxing Ren, Brucek Khailany, David Z. Pan:
DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. DAC 2019: 117 - [c18]Yu-Hung Huang, Zhiyao Xie, Guan-Qi Fang, Tao-Chun Yu, Haoxing Ren, Shao-Yun Fang, Yiran Chen, Jiang Hu:
Routability-Driven Macro Placement with Embedded CNN-Based Prediction Model. DATE 2019: 180-185 - [c17]Haoxing Ren:
Toward Intelligent Physical Design: Deep Learning and GPU Acceleration. ISPD 2019: 91-92 - 2018
- [c16]Zhiyao Xie, Yu-Hung Huang, Guan-Qi Fang, Haoxing Ren, Shao-Yun Fang, Yiran Chen, Nvidia Corporation:
RouteNet: routability prediction for mixed-size designs using convolutional neural network. ICCAD 2018: 80 - 2014
- [c15]Haoxing Ren:
A brief introduction on contemporary High-Level Synthesis. ICICDT 2014: 1-4 - 2013
- [c14]Haoxing Ren, Ruchir Puri, Lakshmi N. Reddy, Smita Krishnaswamy, Cindy Washburn, Joel Earl, Joachim Keinert:
Intuitive ECO synthesis for high performance circuits. DATE 2013: 1002-1007 - [c13]Minsik Cho, Hua Xiang, Haoxing Ren, Matthew M. Ziegler, Ruchir Puri:
LatchPlanner: latch placement algorithm for datapath-oriented high-performance VLSI designs. ICCAD 2013: 342-348 - [c12]Hua Xiang, Minsik Cho, Haoxing Ren, Matthew M. Ziegler, Ruchir Puri:
Network flow based datapath bit slicing. ISPD 2013: 139-146 - 2011
- [j4]Joshua Friedrich, Ruchir Puri, Uwe Brandt, Markus Bühler, Jack DiLullo, Jeremy Hopkins, Mozammel Hossain, Michael A. Kazda, Joachim Keinert, Zahi M. Kurzum, Douglass Lamb, Alice Lee, Frank Musante, Jens Noack, Peter J. Osler, Stephen D. Posluszny, Haifeng Qian, Shyam Ramji, Vasant B. Rao, Lakshmi N. Reddy, Haoxing Ren, Thomas E. Rosser, Benjamin R. Russell, Cliff C. N. Sze, Gustavo E. Téllez:
Design methodology for the IBM POWER7 microprocessor. IBM J. Res. Dev. 55(3): 9 (2011) - 2010
- [c11]Minsik Cho, Haoxing Ren, Hua Xiang, Ruchir Puri:
History-based VLSI legalization using network flow. DAC 2010: 286-291 - [c10]Hua Xiang, Haoxing Ren, Louise Trevillyan, Lakshmi N. Reddy, Ruchir Puri, Minsik Cho:
Logical and physical restructuring of fan-in trees. ISPD 2010: 67-74
2000 – 2009
- 2009
- [c9]Smita Krishnaswamy, Haoxing Ren, Nilesh Modi, Ruchir Puri:
DeltaSyn: An efficient logic difference optimizer for ECO synthesis. ICCAD 2009: 789-796 - [c8]Haoxing Ren, Mary P. Kusko, Victor N. Kravets, Rona Yaari:
Low cost test point insertion without using extra registers for high performance design. ITC 2009: 1-8 - 2008
- [r2]Charles J. Alpert, Nathaniel Hieter, Arjen Mets, Ruchir Puri, Lakshmi N. Reddy, Haoxing Ren, Louise Trevillyan:
Placement-Driven Synthesis Design Closure Tool. Handbook of Algorithms for Physical Design Automation 2008 - [r1]David Z. Pan, Bill Halpin, Haoxing Ren:
Timing-Driven Placement. Handbook of Algorithms for Physical Design Automation 2008 - 2007
- [j3]Charles J. Alpert, Shrirang K. Karandikar, Zhuo Li, Gi-Joon Nam, Stephen T. Quay, Haoxing Ren, Cliff C. N. Sze, Paul G. Villarrubia, Mehmet Can Yildiz:
Techniques for Fast Physical Synthesis. Proc. IEEE 95(3): 573-599 (2007) - [j2]Haoxing Ren, David Z. Pan, Charles J. Alpert, Paul G. Villarrubia, Gi-Joon Nam:
Diffusion-Based Placement Migration With Application on Legalization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(12): 2158-2172 (2007) - [c7]Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia:
Hippocrates: First-Do-No-Harm Detailed Placement. ASP-DAC 2007: 141-146 - [c6]Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Paul Villarrubia, Haoxing Ren, Chris C. N. Chu:
RQL: Global Placement via Relaxed Quadratic Spreading and Linearization. DAC 2007: 453-458 - [c5]Charles J. Alpert, Shrirang K. Karandikar, Zhuo Li, Gi-Joon Nam, Stephen T. Quay, Haoxing Ren, Cliff C. N. Sze, Paul G. Villarrubia, Mehmet Can Yildiz:
The nuts and bolts of physical synthesis. SLIP 2007: 89-94 - 2005
- [j1]Haoxing Ren, David Zhigang Pan, David S. Kung:
Sensitivity guided net weighting for placement-driven synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(5): 711-721 (2005) - [c4]Haoxing Ren, David Zhigang Pan, Charles J. Alpert, Paul Villarrubia:
Diffusion-based placement migration. DAC 2005: 515-520 - [c3]Tao Luo, Haoxing Ren, Charles J. Alpert, David Zhigang Pan:
Computational geometry based placement migration. ICCAD 2005: 41-47 - 2004
- [c2]Haoxing Ren, David Zhigang Pan, Paul Villarrubia:
True crosstalk aware incremental placement with noise map. ICCAD 2004: 402-409 - [c1]Haoxing Ren, David Zhigang Pan, David S. Kung:
Sensitivity guided net weighting for placement driven synthesis. ISPD 2004: 10-17
Coauthor Index
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last updated on 2024-12-12 21:57 CET by the dblp team
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since 2018, dblp has been operated and maintained by:
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