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ORCIDLouise Trevillyan
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2010 – 2019
- 2013
[c8]Hua Xiang, Lakshmi N. Reddy, Louise Trevillyan, Ruchir Puri:
Depth controlled symmetric function fanin tree restructure. ICCAD 2013: 585-591- 2011
- [j10]Nancy Ying Zhou
, Charles J. Alpert, Zhuo Li, Cliff N. Sze, Louise Trevillyan:
Shedding Physical Synthesis Area Bloat. VLSI Design 2011: 503025:1-503025:10 (2011) - 2010
- [c7]Hua Xiang, Haoxing Ren, Louise Trevillyan, Lakshmi N. Reddy, Ruchir Puri, Minsik Cho:
Logical and physical restructuring of fan-in trees. ISPD 2010: 67-74
2000 – 2009
- 2008
- [r1]Charles J. Alpert, Nathaniel Hieter, Arjen Mets, Ruchir Puri, Lakshmi N. Reddy, Haoxing Ren, Louise Trevillyan:
Placement-Driven Synthesis Design Closure Tool. Handbook of Algorithms for Physical Design Automation 2008 - 2004
- [j9]Louise Trevillyan, David S. Kung, Ruchir Puri, Lakshmi N. Reddy, Michael A. Kazda:
An Integrated Environment for Technology Closure of Deep-Submicron IC Designs. IEEE Des. Test Comput. 21(1): 14-22 (2004) - 2000
- [j8]John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan:
LSS: A system for production logic synthesis. IBM J. Res. Dev. 44(1): 157-166 (2000) - [j7]John A. Darringer, Evan E. Davidson, David J. Hathaway, Bernd Koenemann, Mark A. Lavin, Joseph K. Morrell, Khalid Rahmat, Wolfgang Roesner, Erich C. Schanzenbach, Gustavo E. Téllez, Louise Trevillyan:
EDA in IBM: past, present, and future. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(12): 1476-1497 (2000)
1990 – 1999
- 1997
- [j6]Reinaldo A. Bergamaschi, Salil Raje, Indira Nair, Louise Trevillyan:
Control-flow versus data-flow-based scheduling: combining both approaches in an adaptive scheduling system. IEEE Trans. Very Large Scale Integr. Syst. 5(1): 82-100 (1997) - 1996
- [c6]Vijay S. Iyengar, Louise Trevillyan, Pradip Bose:
Representative Traces for Processor Models with Infinite Cache. HPCA 1996: 62-72 - 1992
- [e1]Louise Trevillyan, Michael R. Lightner:
1992 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1992, Santa Clara, CA, USA, November 8-12, 1992. Digest of Technical Papers. IEEE Computer Society / ACM 1992, ISBN 0-8186-3010-8 [contents] - 1991
- [j5]C. Leonard Berman, Louise Trevillyan:
Global flow optimization in automatic logic design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(5): 557-564 (1991)
1980 – 1989
- 1989
- [c5]C. Leonard Berman, Louise Trevillyan:
Functional comparison of logic designs for VLSI circuits. ICCAD 1989: 456-459 - 1988
- [c4]C. Leonard Berman, Louise Trevillyan:
Improved logic optimization using global flow analysis. ICCAD 1988: 102-105 - 1987
- [c3]Louise Trevillyan:
An Overview of Logic Synthesis Systems. DAC 1987: 166-172 - 1986
- [j4]Louise Trevillyan, William H. Joyner Jr., C. Leonard Berman:
Global Flow Analysis in Automatic Logic Design. IEEE Trans. Computers 35(1): 77-81 (1986) - [c2]William H. Joyner Jr., Louise Trevillyan, Daniel Brand, Theresa A. Nix, Steven C. Gundersen:
Technology adaption in logic synthesis. DAC 1986: 94-100 - 1985
- [c1]John A. Darringer, Daniel Brand, William H. Joyner Jr., Louise Trevillyan, John V. Gerbi:
Production logic synthesis. ACM Conference on Computer Science 1985: 13-16 - 1984
- [j3]John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan:
LSS: A System for Production Logic Synthesis. IBM J. Res. Dev. 28(5): 537-545 (1984) - 1981
- [j2]John A. Darringer, William H. Joyner Jr., C. Leonard Berman, Louise Trevillyan:
Logic Synthesis Through Local Transformations. IBM J. Res. Dev. 25(4): 272-280 (1981) - 1980
- [j1]Frances E. Allen, J. Lawrence Carter, Janet Fabri, Jeanne Ferrante, William H. Harrison, Paul G. Loewner, Louise Trevillyan:
The Experimental Compiling System. IBM J. Res. Dev. 24(6): 695-715 (1980)
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