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ORCIDWilliam H. Joyner Jr.
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2000 – 2009
- 2008
[j13]William H. Joyner Jr., David C. Yeh:
Guest Editors' Introduction: System IC Design Challenges beyond 32 nm. IEEE Des. Test Comput. 25(4): 294-295 (2008)- 2007
- [j12]R. Iris Bahar
, Dan W. Hammerstrom, Justin E. Harlow III, William H. Joyner Jr., Clifford Lau, Diana Marculescu, Alex Orailoglu, Massoud Pedram:
Architectures for Silicon Nanoelectronics and Beyond. Computer 40(1): 25-33 (2007) - 2005
- [e1]William H. Joyner Jr., Grant Martin, Andrew B. Kahng:
Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005. ACM 2005, ISBN 1-59593-058-2 [contents] - 2004
- [c10]Shishpal Rawat, William H. Joyner Jr., John A. Darringer, Daniel Gajski, Pat O. Pistilli, Hugo De Man, Carl Harris, James Solomon:
Were the good old days all that good?: EDA then and now. DAC 2004: 543 - 2003
- [j11]Ralph K. Cavin III, William H. Joyner Jr., Virginia C. Wiggins:
A semiconductor industry perspective on future directions in ECE education. IEEE Trans. Educ. 46(4): 463-466 (2003) - 2002
- [j10]Alan Allan, Don Edenfeld, William H. Joyner Jr., Andrew B. Kahng, Mike Rodgers, Yervant Zorian:
2001 Technology Roadmap for Semiconductors. Computer 35(1): 42-53 (2002) - 2001
- [j9]William H. Joyner Jr., Andrew B. Kahng:
Guest Editor's Introduction: Roadmaps and Visions for Design and Test. IEEE Des. Test Comput. 18(6): 4-5 (2001) - 2000
- [j8]John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan:
LSS: A system for production logic synthesis. IBM J. Res. Dev. 44(1): 157-166 (2000)
1990 – 1999
- 1997
- [c9]William H. Joyner Jr.:
Design and Test: The Lost World. ICCD 1997: 328
1980 – 1989
- 1986
- [j7]Louise Trevillyan, William H. Joyner Jr., C. Leonard Berman:
Global Flow Analysis in Automatic Logic Design. IEEE Trans. Computers 35(1): 77-81 (1986) - [c8]William H. Joyner Jr., Louise Trevillyan, Daniel Brand, Theresa A. Nix, Steven C. Gundersen:
Technology adaption in logic synthesis. DAC 1986: 94-100 - 1985
- [c7]John A. Darringer, Daniel Brand, William H. Joyner Jr., Louise Trevillyan, John V. Gerbi:
Production logic synthesis. ACM Conference on Computer Science 1985: 13-16 - 1984
- [j6]John A. Darringer, Daniel Brand, John V. Gerbi, William H. Joyner Jr., Louise Trevillyan:
LSS: A System for Production Logic Synthesis. IBM J. Res. Dev. 28(5): 537-545 (1984) - 1982
- [j5]Daniel Brand, William H. Joyner Jr.:
Verification of HDLC. IEEE Trans. Commun. 30(5): 1136-1142 (1982) - 1981
- [j4]John A. Darringer, William H. Joyner Jr., C. Leonard Berman, Louise Trevillyan:
Logic Synthesis Through Local Transformations. IBM J. Res. Dev. 25(4): 272-280 (1981) - 1980
- [c6]John A. Darringer, William H. Joyner Jr.:
A new look at logic synthesis. DAC 1980: 543-549
1970 – 1979
- 1979
- [c5]William C. Carter, William H. Joyner Jr., Daniel Brand:
Symbolic simulation for correct machine design. DAC 1979: 280-286 - 1978
- [j3]Daniel Brand, William H. Joyner Jr.:
Verification of Protocols Using Symbolic Execution. Comput. Networks 2: 351-360 (1978) - [c4]William C. Carter, William H. Joyner Jr., Daniel Brand:
Microprogram verification considered necessary. AFIPS National Computer Conference 1978: 657-664 - [c3]William H. Joyner Jr., William C. Carter, Daniel Brand:
Using Machine Descriptions in Program Verification. Jerusalem Conference on Information Technology 1978: 515-522 - 1976
- [j2]William H. Joyner Jr.:
Resolution Strategies as Decision Procedures. J. ACM 23(3): 398-417 (1976) - [j1]Alexander Birman, William H. Joyner Jr.:
A Problem-Reduction Approach to Proving Simulation Between Programs. IEEE Trans. Software Eng. 2(2): 87-96 (1976) - [c2]William H. Joyner Jr., William C. Carter, George B. Leeman Jr.:
Automated proofs of microprogram correctness. MICRO 1976: 51-55 - 1973
- [c1]William H. Joyner Jr.:
Automatic Theorem-Proving and the Decision Problem. SWAT 1973: 159-166
Coauthor Index
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