Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID45th ESSCIRC 2019: Cracow, Poland
- 45th IEEE European Solid State Circuits Conference, ESSCIRC 2019, Cracow, Poland, September 23-26, 2019. IEEE 2019, ISBN 978-1-7281-1550-4
- Edoardo Charbon:
Cryo-CMOS Electronics for Quantum Computing Applications. 1-6 - Franck Arnaud, Sébastien Haendler, Sylvain Clerc, Rossella Ranica, Anna Gandolfo, Olivier Weber:
28nm FDSOI Platform with Embedded PCM for IoT, ULP, Digital, Analog, Automotive and others Applications. 7-10 - Jeffrey Abbott, Tianyang Ye, Hongkun Park, Donhee Ham
:
CMOS interface with biological molecules and cells. 13-16 - Jeffrey S. Walling:
The Switched-Capacitor Power Amplifier: A Key Enabler for Future Communications Systems. 18-24 - Pieter Harpe, Hanyue Li, Yuting Shen:
Low-power SAR ADCs: trends, examples and future. 25-28 - Job van Staveren, Carmen García Almudéver, Giordano Scappucci, Menno Veldhorst, Masoud Babaie, Edoardo Charbon, Fabio Sebastiano:
Voltage References for the Ultra-Wide Temperature Range from 4.2K to 300K in 40-nm CMOS. 37-40 - Alessandro Franceschin, Pietro Andreani, Fabio Padovan, Matteo Bassi, Roberto Nonis, Andrea Bevilacqua:
A 19.5 GHz 28 nm CMOS Class-C VCO with Reduced 1/f Noise Upconversion. 45-48 - Markus Scholl, Ralf Wunderlich, Stefan Heinen, Tobias Saalfeld, Christoph Beyerstedt, Fabian Speicher, Jonas Meier, Michael Hanhart, Leo Rolff, Vahid Bonehi, Moritz Schrey:
A 32 MHz Crystal Oscillator with Fast Start-Up Using Dithered Injection and Negative Resistance Boost. 49-52 - Feng-Wei Kuo, Zhirui Zong, Huan-Neng Ron Chen, Lan-Chou Cho, Chewnpu Jou, Mark Chen, Robert Bogdan Staszewski:
A 77/79-GHz Frequency Generator in 16-nm CMOS for FMCW Radar Applications Based on a 26-GHz Oscillator with Co-Generated Third Harmonic. 53-56 - Sachin Taneja, Massimo Alioto:
PUF-based Key Generation with Design Margin Reduction via In-Situ and PVT Sensor Fusion. 61-64 - Matthias Eberlein, Harald Pretl:
A No-Trim, Scaling-Friendly Thermal Sensor in 16nm FinFET Using Bulk Diodes as Sensing Elements. 63-66 - Burak Erbagci, Nail Etkin Can Akkaya, Cagri Erbagci, Ken Mai:
An Inherently Secure FPGA using PUF Hardware-Entanglement and Side-Channel Resistant Logic in 65nm Bulk CMOS. 65-68 - Yong-Tae Lee, Woojun Choi, Taewoong Kim, Seung-Woo Song, Kofi A. A. Makinwa, Youngcheol Chae:
A 5800-μm2 Resistor-Based Temperature Sensor With a One-Point Trimmed Inaccuracy of ±1.2 °C (3σ) From -50 °C to 105 °C in 65-nm CMOS. 68-71 - Robert Giterman, Maoz Wicentowski, Oron Chertkow, Ilan Sever, Ishai Kehati, Yoav Weizman, Osnat Keren, Alexander Fish:
Power Analysis Resilient SRAM Design Implemented with a 1% Area Overhead Impedance Randomization Unit for Security Applications. 69-72 - Roland Van Wegberg, Julien Penders, Chris Van Hoof, Nick Van Helleputte, Wim Sijbers, Shuang Song, Arjan Breeschoten, Peter Vis, Mario Konijnenburg, Hui Jiang, Michiel Rooijakkers, Torfinn Berset:
A 5-Channel Unipolar Fetal-ECG Readout IC for Patch-Based Fetal Monitoring. 71-74 - Marc Pons Solé, Andre Bischof, Lorenzo Bergamini, Philippe Dallemagne, Stéphane Emery, Komail M. H. Badami, Jiang Deng, Themistoklis Mavrogordatos, Erfan Azarkhish, Loïc Zahnd, Costantino Cosentino, Marcin K. Augustyniak, Yingyun Zha:
A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control. 73-76 - Enrico Manuzzato, Eliana Gioscio, Ilaria Mattei, Riccardo Mirabelli, Vincenzo Patera, Alessio Sarti, Angelo Schiavi, Adalberto Sciubba, Serena M. Valle, Giacomo Traini, Michela Marafini, Leonardo Gasparini, Matteo Perenzoni, Yu Zou, Luca Parmesan, Giuseppe Battistoni, M. De Simoni, Y. Dong, M. Fischetti:
A 16 × 8 Digital-SiPM Array With Distributed Trigger Generator for Low SNR Particle Tracking. 75-78 - John P. Uehlin, William Anthony Smith, Venkata Rajesh Pamula, Steve I. Perlmutter, Visvesh Sathe, Jacques Christophe Rudell:
A Bidirectional Brain Computer Interface with 64-Channel Recording, Resonant Stimulation and Artifact Suppression in Standard 65nm CMOS. 77-80 - Mingliang Tan, Eunchul Kang, Jae-Sung An, Zu-Yao Chang, Philippe Vince, Nicolas Sénégond, Michiel A. P. Pertijs:
An Integrated Programmable High-Voltage Bipolar Pulser With Embedded Transmit/Receive Switch for Miniature Ultrasound Probes. 79-82 - Eric Swindlehurst, Hunter Jensen, Alexander Petrie, Yixin Song, Yen-Cheng Kuan, Mau-Chung Frank Chang, Jieh-Tsorng Wu, Shiuh-Hua Wood Chiang:
An 8-bit 10-GHz 21-mW Time-Interleaved SAR ADC With Grouped DAC Capacitors and Dual-Path Bootstrapped Switch. 83-86 - Rafal Kleczek, Piotr Kmon, Piotr Maj, Robert Szczygiel, Pawel Grybos, Yasukazu Nakaye, Takuto Sakumura, Taguchi Takeyoshi:
SPC Pixel IC with 9.4 e- rms Offset Spread, 60 e- rms ENC and 70 kfps Frame Rate. 85-88 - Mohamed A. Mokhtar, Patrick Vogelmann, Michael Haas, Maurits Ortmanns:
A 94.3-dB SFDR, 91.5-dB DR, and 200-kS/s CT Incremental Delta-Sigma Modulator With Differentially Reset FIR Feedback. 87-90 - Francesco Mattioli Della Rocca, Hanning Mai, Sam W. Hutchings, Tarek Al Abbas, Andreas Tsiamis, Peter Lomax, István Gyöngy, Neale A. W. Dutton, Robert K. Henderson:
A 128 × 128 SPAD Dynamic Vision-Triggered Time of Flight Imager. 93-96 - Tetsuo Matsui, Keisaku Sento, Tomohiko Ebata, Atsuhiko Ishibashi:
A Capacitor Dielectric Relaxation Effect Cancellation Circuit in a 12-Bit, 1-MSps, 5.0-V SAR ADC on a 28-nm Embedded Flash Memory Microcontroller. 95-98 - Yu Zou, Massimo Gottardi, Michela Lecca, Matteo Perenzoni:
A Low-Power VGA Vision Sensor with Event Detection through Motion Computation based on Pixel-Wise Double-Threshold Background Subtraction and Local Binary Pattern Coding. 97-100 - Qingjun Fan, Jinghong Chen:
A 1-GS/s 8-Bit 12.01-fJ/conv.-step Two-Step SAR ADC in 28-nm FDSOI Technology. 99-102 - Zheng Sun, Hanli Liu, Dingxin Xu, Hongye Huang, Bangan Liu, Zheng Li, Jian Pang, Teruki Someya, Atsushi Shirane:
A 78 fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO. 101-104 - Mohamed Atef Shehata, Mike Keaveney, Robert Bogdan Staszewski:
A 184.6-dBc/Hz FoM 100-kHz Flicker Phase Noise Corner 30-GHz Rotary Traveling-Wave Oscillator Using Distributed Stubs in 22-nm FD-SOI. 103-106 - Gerasimos Vlachogiannakis, Charis Basetas, Georgia Tsirimokou, Chrysoula Vassou, Konstantinos Vastarouchas, Aidonia Georgiadou, Ioulia Sotiriou, Timothea Korfiati, Savvas Sgourenas:
A Self-Calibrated Fractional-N PLL for WiFi 6 / 802.11ax in 28nm FDSOI CMOS. 105-108 - Matteo Bassi, Giovanni Boi, Fabio Padovan, Jonas Fritzin, Stefano Di Martino, Daniel Knauder, Andrea Bevilacqua:
A 39-GHz Frequency Tripler With >40-dBc Harmonic Rejection for 5G Communication Systems in 28-nm Bulk CMOS. 107-110 - Cheng-Hsueh Tsai, Federico Pepe, Giovanni Mangraviti, Zhiwei Zong, Jan Craninckx, Piet Wambacq:
A 22.5-27.7-GHz Fast-Lock Bang-Bang Digital PLL in 28-nm CMOS for Millimeter-Wave Communication With 220-fs RMS Jitter. 111-114 - Lorenzo Lotti, Greg LaCaille, Ali M. Niknejad:
A 57-74-GHz Tail-Switching Injection-Locked Frequency Tripler in 28-nm CMOS. 115-118 - Deepak Kadetotad, Visar Berisha, Chaitali Chakrabarti, Jae-Sun Seo:
A 8.93-TOPS/W LSTM Recurrent Neural Network Accelerator Featuring Hierarchical Coarse-Grain Sparsity With All Parameters Stored On-Chip. 119-122 - Benjamin J. Fletcher, Terrence S. T. Mak, Shidhartha Das:
A 10.8pJ/bit Pulse-Position Inductive Transceiver for Low-Energy Wireless 3D Integration. 121-124 - Van Loi Le, Taegeun Yoo, Ju Eon Kim, Kwang-Hyun Baek, Tony Tae-Hyoung Kim:
A 213.7-µW Gesture Sensing System-On-Chip With Self-Adaptive Motion Detection and Noise-Tolerant Outermost-Edge-Based Feature Extraction in 65 nm. 123-126 - Imran Bashir, Krzysztof Pomorski, Robert Bogdan Staszewski, Mike Asker, Cagri Cetintepe, Dirk Leipold, Ali Esmailiyan, Hongying Wang, Teerachot Siriburanon, Panagiotis Giounanlis, Elena Blokhina:
A Mixed-Signal Control Core for a Fully Integrated Semiconductor Quantum Computer System-on-Chip. 125-128 - Charles Jeon, Oscar Castañeda, Christoph Studer:
A 354 Mb/s 0.37 mm2 151 mW 32-User 256-QAM Near-MAP Soft-Input Soft-Output Massive MU-MIMO Data Detector in 28nm CMOS. 127-130 - Zhewei Jiang, Shihui Yin, Jae-Sun Seo, Mingoo Seok:
C3SRAM: In-Memory-Computing SRAM Macro Based on Capacitive-Coupling Computing. 131-134 - Wanyuan Qu, Donglie Gu, Haixiao Cao, Xu Yang, Jianxiong Xi, Lenian He, Shuo Dong:
A 95.3% Peak Efficiency 38mV overshoot and 5mV/A load regulation Hysteretic Boost Converter with Anti-Phase Emulate Current Control. 133-136 - Marcella Carissimi, Ritesh Mukherjee, Vivek Tyagi, Fabio Disegni, Davide Manfrè, Cesare Torti, Daniele Gallinari, Sandro Rossi, Andrea Gambero, Donatella Brambilla, Paola Zuliani, Riccardo Zurla, Alessandro Cabrini, Guido Torelli, Marco Pasotti, Chantal Auricchio, Emanuela Calvetti, Laura Capecchi, Luigi Croce, Stefano Zanchi, Vikas Rana, Preeti Mishra:
2-Mb Embedded Phase Change Memory With 16-ns Read Access Time and 5-Mb/s Write Throughput in 90-nm BCD Technology for Automotive Applications. 135-138 - Qin Kuai, Qiping Wan, Philip K. T. Mok:
A Dual-Frequency Dual-Input-Dual-Output Interface for Thermoelectric Energy Harvesting and Recycling With 82.9% Efficiency. 137-140 - Jacob Göppert, Simon Braun, David Pellhammer, Mohammad Amayreh, Joachim Leicht, Matthias Keller, Yiannos Manoli:
Area Constrained Multi-Source Power Management for Thermoelectric Energy Harvesting. 141-144 - Gönenç Berkol, Peter G. M. Baltus, Pieter J. A. Harpe, Eugenio Cantatore:
A -81.6dBm Sensitivity Ultrasound Transceiver in 65nm CMOS for Symmetrical Data-Links. 145-148 - Wouter Diels, Michiel Steyaert, Filip Tavernier:
Optical Receiver with Schottky Photodiode and TIA with High Gain Amplifier in 28nm Bulk CMOS. 149-152 - Todd Joseph Smith, Anna Broome, Daniel Stanley, Jonas Westberg, Gerard Wysocki, Kaushik Sengupta:
A Hybrid THz Imaging System With a 100-Pixel CMOS Imager and a 3.25-3.50 THz Quantum Cascade Laser Frequency Comb. 151-154 - Mario Auer, Timuçin Karaca:
A Class-D Amplifier with Digital PWM and Digital Loop-Filter using a Mixed-Signal Feedback Loop. 153-156 - Farshad Piri, Elham Rahimi, Matteo Bassi, Francesco Svelto, Andrea Mazzanti:
70-90-GHz Self-Tuned Polyphase Filter for Wideband I/Q LO Generation in a 55-nm BiCMOS Transmitter. 155-158 - Yong Qu, Wei Shu, Yang Kang, Joseph S. Chang:
A 30V 2A Real-Time Programmable Solid-State Circuit Breaker with Improved Detection-Speed and Enhanced Power-Efficiency. 157-160 - Gholamreza Nikandish, Robert Bogdan Staszewski, Anding Zhu:
Broadband Fully Integrated GaN Power Amplifier With Embedded Minimum Inductor Bandpass Filter and AM-PM Compensation. 159-162 - Haoming Xin, Martin Andraud, Peter G. M. Baltus, Eugenio Cantatore, Pieter Harpe:
A 0.34-571nW All-Dynamic Versatile Sensor Interface for Temperature, Capacitance, and Resistance Sensing. 161-164 - Yifan Lyu, Filip Tavernier:
A 4-GS/s 39.9-dB SNDR 11.7-mW Hybrid Voltage-Time Two-Step ADC With Feed-Forward Ring Oscillator-Based TDCs. 163-166 - Athanasios T. Ramkaj, Michiel S. J. Steyaert, Filip Tavernier:
A 13.5-Gb/s 5-mV-Sensitivity 26.8-ps-CLK-OUT Delay Triple-Latch Feedforward Dynamic Comparator in 28-nm CMOS. 167-170 - Bart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta:
A 0.06-3.4-MHz 92-μW Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers. 171-174 - Yorgos Palaskas, Peter Plechinger, Ashoke Ravi, Ofir Degani, Rotem Banin, Eshel Gordon, Zdravko Boos, Paolo Madoglio, Jörn Angel, Jakob M. Tomasik, Sven Hampel, Petra Schubert, Peter Preyler, Thomas Mayer, Thomas Bauernfeind:
A Cellular Multiband DTC-Based Digital Polar Transmitter With -153 dBc/Hz Noise in 14-nm FinFET. 179-182 - Reza Bagger, Henrik Sjöland:
An 11 GHz-Bandwidth Variable Gain Ka-Band Power Amplifier for 5G Applications. 181-184 - Giacomo Pini, Danilo Manstretta, Rinaldo Castello:
A 260-MHz RF Bandwidth Mixer-First Receiver With Third-Order Current-Mode Filtering TIA. 183-186 - Farhad Bozorgi, Melchiorre Bruccoleri, Matteo Repossi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto:
A 26-Gb/s 3-D-Integrated Silicon Photonic Receiver in BiCMOS-55 nm and PIC25G With - 15.2-dBm OMA Sensitivity. 187-190 - Tianli Zhang, Yuefeng Cao, Shumin Zhang, Chixiao Chen, Fan Ye, Junyan Ren:
Machine Learning Based Prior-Knowledge-Free Calibration for Split Pipelined-SAR ADCs with Open-Loop Amplifiers Achieving 93.7-dB SFDR. 189-192 - Li-Yang Chen, Chih-Kong Ken Yang:
A 19-GHz Pulsed-Coherent ToF Receiver With 40-μm Precision for Laser Ranging Systems. 191-194 - Qingjun Fan, Runxi Zhang, Phaneendra Bikkina, Esko Mikkola, Jinghong Chen:
A 500 MS/s 10-Bit Single-Channel SAR ADC with A Double-Rate Comparator. 193-196 - Hao Ding, Xuqiang Zheng, DanYu Wu, Lei Zhou, Jin Wu, Fangxu Lv, Jianye Wang, Xinyu Liu:
A 112-Gb/s PAM-4 Transmitter With a 2-Tap Fractional-Spaced FFE in 65-nm CMOS. 195-198 - Yongzhen Chen, Xingchen Shen, Zhekan Ni, Jingchao Lan, Chixiao Chen, Fan Ye, Junyan Ren:
A 625MS/s, 12-Bit, SAR Assisted Pipeline ADC with Effective Gain Analysis for Inter-stage Ringamps. 197-200 - Shang-Hsien Yang, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai:
A Temperature Compensated 61-W Class-E Soft-Switching GaN-Based Active Diode Rectifier for Wireless Power Transfer Applications. 203-206 - Mahmoud R. Elhebeary, Li-Yang Chen, Sudhakar Pamarti, Chih-Kong Ken Yang:
An 8.5pJ/bit Ultra-Low Power Wake-Up Receiver Using Schottky Diodes for IoT Applications. 205-208 - Nishit Shah, Pedram Lajevardi, Ken Wojciechowski, Christoph Lang, Boris Murmann:
An Energy Harvester Using Image Sensor Pixels With Cold Start and Over 96% MPPT Efficiency. 207-210 - Keun-Mok Kim, Eui-Rim Jeong, Kyung-Sik Choi, Subin Kim, Byeonghun Yun, Hyunki Jung, Wonkab Oh, Jinho Ko, Sang-Gug Lee:
A 915 MHz, 499 μW, -99 dBm, and 100 kbps BFSK Direct Conversion Receiver. 209-212 - Alberto Gatti, Giorgio Spiazzi, Andrea Gerosa, Andrea Neviani, Andrea Bevilacqua:
A 130-nm CMOS Dual Input-Polarity DC-DC Converter for Low-Power Applications. 211-214 - Rehman Akbar, Eric A. M. Klumperink, Nuutti Tervo, Muhammad Yasir Javed, Kari Stadius, Timo Rahkonen, Aarno Pärssinen:
A Wideband IF Receiver Module for Flexibly Scalable mmWave Beamforming Combining and Interference Cancellation. 213-216 - Mahmoud Mahdipour Pirbazari, Federico Pepe, Andrea Mazzanti:
40GHz Frequency Tripler with High Fundamental and Harmonics Rejection in 55nm SiGe-BiCMOS. 229-232 - Yun-Chen Lo, Yu-Chun Kuo, Yun-Sheng Chang, Jian-Hao Huang, Jun-Shen Wu, Wen-Chien Ting, Tai-Hsing Wen, Ren-Shuo Liu:
Physically Tightly Coupled, Logically Loosely Coupled, Near-Memory BNN Accelerator (PTLL-BNN). 241-244 - Federico Fary, Luca Mangiagalli, Elia A. Vallicelli, Marcello De Matteis, Andrea Baschirotto:
A 28nm bulk-CMOS 50MHz 18 dBm-IIP3 Active-RC Analog Filter based on 7 GHz UGB OTA. 253-256 - Thije Rooijers, Johan H. Huijsing, Kofi A. A. Makinwa:
An Auto-Zero Stabilized Voltage Buffer with a Trimmed Input Current of 0.2pA. 257-260 - Seung-Woo Song, Changuk Lee, Moon Hyung Jang, Youngcheol Chae:
A 185 μW -105.1 dB THD 88.6 dB SNDR Negative-R Stabilized Audio Preamplifier. 261-264 - Yusang Chun, Ashwin Ramachandran, Tejasvi Anand:
A PAM-8 Wireline Transceiver with Receiver Side PWM (Time-Domain) Feed Forward Equalization Operating from 12-to-39.6Gb/s in 65nm CMOS. 269-272 - Nicholas Sutardja, Jaeduk Han, Nathan Narevsky, Elad Alon:
A 2-tap switched capacitor FFE transmitter achieving 1-20 Gb/s at 0.72-0.62 pJ/bit. 273-276 - Yasu Lu, Feng Chen, Philip K. T. Mok:
A Single-Controller-Four-Output Analog-Assisted Digital LDO with Adaptive-Time-Multiplexing Control in 65-nm CMOS. 289-292 - Qingjun Fan, Jinghong Chen:
A 2.4 GS/s 10-Bit Time-Interleaved SAR ADC with a Bypass Window and Opportunistic Offset Calibration. 301-304 - Xi Yang, Seung-Jun Bae, Hae-Seung Lee:
An 8-bit 2.8 GS/s Flash ADC with Time-based Offset Calibration and Interpolation in 65 nm CMOS. 305-308 - Young-Ha Hwang, Jonghyun Oh, Jiheon Park, Yoonho Song, Jung-Hun Park, Jun-Eun Park, Deog-Kyoon Jeong:
An Always-On 0.53-to-13.4 mW Power-Scalable Touchscreen Controller for Ultrathin Touchscreen Displays With Current-Mode Filter and Incremental Hybrid ΔΣ ADC. 313-316 - Peishuo Li, Tom R. Molderez, Frederik Ceyssens, Korneel Rabaey, Marian Verhelst:
A 64-channel, 1.1-pA-accurate On-chip Potentiostat for Parallel Electrochemical Monitoring. 317-320 - Mahdi Rajabzadeh, Matthias Häberle, Ankesh Jain, Maurits Ortmanns:
An Integrated Readout for Current Sensing based on a Σ∆ Modulator with Switched Capacitor Feedback. 321-324 - Dongfang Pan, Zongming Duan, Liguo Sun, Shita Guo, Lin Cheng, Ping Gui:
A 76-81 GHz CMOS PA with 16-dBm PSAT and 30-dB Amplitude Control for MIMO Automotive Radars. 329-332 - Maciej Kucharski, Herman Jalli Ng, Dietmar Kissinger:
An 18 dBm 155-180 GHz SiGe Power Amplifier Using a 4-Way T-Junction Combining Network. 333-336 - Akshay Visweswaran, Bastien Vignon, Xinyan Tang, Steven Brebels, Björn Debaillie, Piet Wambacq:
A 112-142GHz Power Amplifier with Regenerative Reactive Feedback achieving 17dBm peak Psat at 13% PAE. 337-340 - Hyunjoon Kim, Qian Chen, Taegeun Yoo, Tony Tae-Hyoung Kim, Bongjin Kim:
A 1-16b Precision Reconfigurable Digital In-Memory Computing Macro Featuring Column-MAC Architecture and Bit-Serial Computation. 345-348 - R. S. Ashwin Kumar, Nagendra Krishnapura:
A 2-Channel ADC Using a Delta-Sigma Modulator Without Reset & a Modulated-Sinc-Sum Filter. 365-368 - Paul Stärke, Xin Xu, Corrado Carta, Frank Ellinger:
Direct-Conversion I-Q Transmitter Front-End for 180 GHz with 80 GHz Bandwidth in 130 nm SiGe. 373-376 - Omar Abdelatty, Henry L. Bishop, Yao Shi, Xing Chen, Abdullah Mohammed Alghaihab, Benton H. Calhoun, David D. Wentzloff:
A Low Power Bluetooth Low-Energy Transmitter with a 10.5nJ Startup-Energy Crystal Oscillator. 377-380 - Sher Jiun Fang, Frank Zhang, Abdellatif Bellaouar, Sherif H. K. Embabi:
A 28GHz Sliding-IF Receiver in 22nm FDSOI. 385-388 - Yury Antonov, Mikko Valkama, Marko Kosunen, Jussi Ryynänen, Mahwish Zahra, Kari Stadius, Zahra Khonsari, Ilia Kempi, Toni Miilunpalo, Juha Inkinen, Vishnu Unnikrishnan, Lauri Anttila:
A Delay-Based LO Phase-Shifting Generator for a 2-5GHz Beamsteering Receiver in 28nm CMOS. 389-392 - Jongmin Lee, Minsun Kim, Gicheol Shin, Yoonmyung Lee:
A 20F2 Area-Efficient Differential nand-Structured Physically Unclonable Function for Low-Cost IoT Security. 1-4 - Suyoung Bang, Minki Cho, Pascal Meinerzhagen, Andres Malavasi, Muhammad M. Khellah, James W. Tschanz, Vivek De:
An All-Digital, VMAX-Compliant, and Stable Distributed Charge Injection Scheme for Fast Mitigation of Voltage Droop. 1-4 - Philex Ming-Yan Fan, Anand Savanth, Benoît Labbé, Pranay Prabhat, James Myers:
A 0.98-nW/kHz 33-kHz Fully Integrated Subthreshold-Region Operation RC Oscillator With Forward-Body-Biasing. 1-4 - Pavel Horsky, Jan Plojhar, Jiri Daniel:
Adaptive Peak Average Current Control LED Driver for Automotive Lighting. 1-4 - John Bell, Michael P. Flynn:
A Simultaneous Multiband Continuous-Time ΔΣ ADC With 90-MHz Aggregate Bandwidth in 40-nm CMOS. 1-4 - Pascal Andreas Meinerzhagen, Sandip Kundu, Andres Malavasi, Trang Nguyen, Muhammad M. Khellah, James W. Tschanz, Vivek De:
Min-Delay Margin/Error Detection and Correction for Flip-Flops and Pulsed Latches in 10-nm CMOS. 1-4
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2024-05-31 18:49 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
