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2020 – today
- 2024
[j6]R. S. Ashwin Kumar
:
Analysis of Stability, Noise, and Design Guidelines for a Cascaded Floating-Inverter Amplifier. IEEE Trans. Circuits Syst. II Express Briefs 71(9): 4126-4130 (2024)- [c4]R. S. Ashwin Kumar:
Flip-Around Level-Shifting For Switched-Capacitor Amplifiers to Improve the Closed-Loop Settling of Floating-Inverter Amplifiers. ISCAS 2024: 1-5 - 2022
- [j5]R. S. Ashwin Kumar, Nagendra Krishnapura, Paramita Banerjee:
Analysis and Design of a Discrete-Time Delta-Sigma Modulator Using a Cascoded Floating-Inverter-Based Dynamic Amplifier. IEEE J. Solid State Circuits 57(11): 3384-3395 (2022) - [j4]R. S. Ashwin Kumar, Nagendra Krishnapura:
Multi-Channel Analog-to-Digital Conversion Using a Delta-Sigma Modulator Without Reset and a Modulated-Sinc-Sum Filter. IEEE Trans. Circuits Syst. I Regul. Pap. 69(1): 186-195 (2022) - [c3]R. S. Ashwin Kumar:
Using the Miller Theorem to Analyze Two-Stage Miller-Compensated Opamps. ISCAS 2022: 2938-2942 - 2021
- [j3]Chithra, Aditya Narayanan, R. S. Ashwin Kumar, Nagendra Krishnapura:
Auto-Zeroing Static Phase Offset in DLLs Using a Digitally Programmable Sensing Circuit. IEEE Trans. Circuits Syst. II Express Briefs 68(6): 1788-1792 (2021) - [c2]R. S. Ashwin Kumar:
A Discrete-Time Delta-Sigma Modulator with Relaxed Driving Requirements And Improved Anti-Aliasing. ISCAS 2021: 1-5 - 2020
- [j2]R. S. Ashwin Kumar, Nagendra Krishnapura:
Multi-Channel Analog-to-Digital Conversion Techniques Using a Continuous-Time Delta-Sigma Modulator Without Reset. IEEE Trans. Circuits Syst. 67-I(11): 3693-3703 (2020)
2010 – 2019
- 2019
- [c1]R. S. Ashwin Kumar, Nagendra Krishnapura:
A 2-Channel ADC Using a Delta-Sigma Modulator Without Reset & a Modulated-Sinc-Sum Filter. ESSCIRC 2019: 365-368 - 2018
- [j1]R. S. Ashwin Kumar, Debasish Behera, Nagendra Krishnapura:
Reset-Free Memoryless Delta-Sigma Analog-to-Digital Conversion. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3651-3661 (2018)
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