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2020 – today
- 2024
[j46]Mohammadreza Zeinali
, Szu-Yao Hung, Sudhakar Pamarti:
Design and Analysis of a Fractional Frequency Synthesizer With <90-fs Jitter and <-103-dBc Spurious Tones Using Digital Spur Cancellation. IEEE J. Solid State Circuits 59(10): 3417-3431 (2024)- [j45]Wojciech Romaszkan, Jiyue Yang, Alexander Graening, Vinod Kurian Jacob, Jishnu Sen, Sudhakar Pamarti, Puneet Gupta:
SCIMITAR: Stochastic Computing In-Memory In-Situ Tracking ARchitecture for Event-Based Cameras. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(11): 4214-4225 (2024) - [j44]Shi Bu, Vinod Kurian Jacob, Sudhakar Pamarti:
Digital Residual Alias Cancellation for Filtering-by-Aliasing Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 71(4): 1544-1557 (2024) - [j43]Abdulaziz Alshaya, Sudhakar Pamarti, Christos Papavassiliou:
FPGA Crystal Oscillator Circuit Emulation Based on Wave Digital Filter. IEEE Trans. Very Large Scale Integr. Syst. 32(1): 103-115 (2024) - [c51]Christopher Chen, Yan Zhang, Hao-Yu Chien, Jiazhang Song, Jia Zhou, Chao-Jen Tien, Sudhakar Pamarti, Chih-Kong Ken Yang, Mau-Chung Frank Chang:
A Sub-Sampling 35GHz PLL in 45nm PDSOI BiCMOS with 37fs Integrated Jitter and a FoM of -252dB. BCICTS 2024: 203-206 - [c50]Soumitra Pal, Jiyue Yang, Stephen Bauer, Puneet Gupta, Sudhakar Pamarti:
Novel Energy-Efficient and Latency-Improved PVT Tolerant Read Scheme for SRAM Design in Video Processing and Machine Learning Applications. MWSCAS 2024: 460-463 - [c49]Ali H. Hassan, Puneet Gupta, Sudhakar Pamarti, Chih-Kong Ken Yang:
Cryogenic Alternative: CMOS Versus Dynamic-Based Logic. MWSCAS 2024: 1007-1010 - [c48]Jiyue Yang, Alexander Graening, Wojciech Romaszkan, Vinod K. Jacob, Puneet Gupta, Sudhakar Pamarti:
A 278-514M Event/s ADC-Less Stochastic Compute-In-Memory Convolution Accelerator for Event Camera. VLSI Technology and Circuits 2024: 1-2 - [i3]Yang Cheng, Qingyuan Shu, Albert Lee, Haoran He, Ivy Zhu, Haris Suhail, Minzhang Chen, Renhe Chen, Zirui Wang, Hantao Zhang, Chih-Yao Wang, Shan-Yi Yang, Yu-Chen Hsin, Cheng-Yi Shih, Hsin-Han Lee, Ran Cheng, Sudhakar Pamarti, Xufeng Kou, Kang L. Wang:
Voltage-Controlled Magnetoelectric Devices for Neuromorphic Diffusion Process. CoRR abs/2407.12261 (2024) - 2023
- [j42]Tianmu Li, Wojciech Romaszkan, Sudhakar Pamarti, Puneet Gupta:
REX-SC: Range-Extended Stochastic Computing Accumulation for Neural Network Acceleration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4423-4435 (2023) - [c47]Haris Suhail, Jiyue Yang, Haoran He, Kang L. Wang, Sudhakar Pamarti:
Analytical Array-Level Comparison of Read/Write Performance Between Voltage Controlled-MRAM and STT-MRAM. MWSCAS 2023: 326-330 - [c46]Jarrah Bergeron, Sudhakar Pamarti:
A Spur-free Dynamic Element Matching Scheme for Bandpass DACs. NEWCAS 2023: 1-5 - 2022
- [j41]Shi Bu, Sudhakar Pamarti:
A Dual-Channel High-Linearity Filtering-by-Aliasing Receiver Front-End Supporting Carrier Aggregation. IEEE J. Solid State Circuits 57(5): 1457-1469 (2022) - [c45]Shi Bu, Vinod Kurian Jacob, Sudhakar Pamarti:
A Digital Alias Cancellation Technique for Filtering-by-Aliasing Receivers. ISCAS 2022: 232-233 - [c44]Jiazhang Song, Li-Yang Chen, Mau-Chung Frank Chang, Sudhakar Pamarti, Chih-Kong Ken Yang:
A 14-bit 1-GS/s SiGe Bootstrap Sampler for High Resolution ADC with 250-MHz Input. ISCAS 2022: 2047-2051 - 2021
- [j40]Shi Bu, Sameed Hameed, Sudhakar Pamarti:
Periodically Time-Varying Noise Cancellation for Filtering-by-Aliasing Receiver Front Ends. IEEE J. Solid State Circuits 56(3): 928-939 (2021) - [c43]Saptadeep Pal, Jingyang Liu, Irina Alam, Nicholas Cebry, Haris Suhail, Shi Bu, Subramanian S. Iyer, Sudhakar Pamarti, Rakesh Kumar, Puneet Gupta:
Designing a 2048-Chiplet, 14336-Core Waferscale Processor. DAC 2021: 1183-1188 - [c42]Tianmu Li, Wojciech Romaszkan, Sudhakar Pamarti, Puneet Gupta:
GEO: Generation and Execution Optimized Stochastic Computing Accelerator for Neural Networks. DATE 2021: 689-694 - [c41]Jiyue Yang, Di Wu, Albert Lee, Seyed Armin Razavi, Puneet Gupta, Kang L. Wang, Sudhakar Pamarti:
A Calibration-Free In-Memory True Random Number Generator Using Voltage-Controlled MRAM. ESSCIRC 2021: 115-118 - [c40]Yan Zhang, Chia-Jen Liang, Christopher Chen, Andrew Liu, Jason Woo, Sudhakar Pamarti, Chih-Kong Ken Yang, Mau-Chung Frank Chang:
A Sub-50fs-Jitter Sub-Sampling PLL with a Harmonic-Enhanced 30-GHz-Fundemental Class-C VCO in 0.18µm SiGe BiCMOS. ESSCIRC 2021: 435-438 - [c39]Jiyue Yang, Di Wu, Albert Lee, Seyed Armin Razavi, Puneet Gupta, Kang L. Wang, Sudhakar Pamarti:
A Calibration-Free In-Memory True Random Number Generator Using Voltage-Controlled MRAM. ESSDERC 2021: 115-118 - [c38]Yiwu Tang, Yuan-Hung Chung, Sudhakar Pamarti:
Session 6 Overview: High-Performance Receivers and Transmitters for Sub-6GHz Radios Wireless Subcommittee. ISSCC 2021: 88-89 - [c37]Shi Bu, Sudhakar Pamarti:
6.3 A 0.9V Dual-Channel Filtering-by-Aliasing Receiver Front-End Achieving +35dBm IIP3 and <-81dBm LO Leakage Supporting Intra-and Inter-Band Carrier Aggregation. ISSCC 2021: 94-96 - 2020
- [j39]David T. Blaauw, Hoi Lee, John P. Keane, Jaehyouk Choi, Sudhakar Pamarti:
Introduction to the Special Issue on the 2020 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits 55(12): 3127-3130 (2020) - [c36]Wojciech Romaszkan, Tianmu Li, Tristan Melton, Sudhakar Pamarti, Puneet Gupta:
ACOUSTIC: Accelerating Convolutional Neural Networks through Or-Unipolar Skipped Stochastic Computing. DATE 2020: 768-773
2010 – 2019
- 2019
- [j38]Hani Esmaeelzadeh, Sudhakar Pamarti:
A Sub-nW 32-kHz Crystal Oscillator Architecture Based on a DC-Only Sustaining Amplifier. IEEE J. Solid State Circuits 54(12): 3247-3256 (2019) - [c35]Shi Bu, Sameed Hameed, Sudhakar Pamarti:
An LPTV Noise Cancellation Technique for a 0.9-V Filtering-by-Aliasing Receiver Front-End with >67-dB Stopband Rejection. CICC 2019: 1-4 - [c34]Mahmoud R. Elhebeary, Li-Yang Chen, Sudhakar Pamarti, Chih-Kong Ken Yang:
An 8.5pJ/bit Ultra-Low Power Wake-Up Receiver Using Schottky Diodes for IoT Applications. ESSCIRC 2019: 205-208 - [c33]Szu-Yao Hung, Sudhakar Pamarti:
A 0.5-to-2.5GHz Multi-Output Fractional Frequency Synthesizer with 90fs Jitter and -106dBc Spurious Tones Based on Digital Spur Cancellation. ISSCC 2019: 262-264 - [c32]Hani Esmaeelzadeh, Sudhakar Pamarti:
A 0.55nW/0.5V 32kHz Crystal Oscillator Based on a DC-Only Sustaining Amplifier for IoT. ISSCC 2019: 300-301 - 2018
- [j37]Hani Esmaeelzadeh, Sudhakar Pamarti:
A Quick Startup Technique for High-Q Oscillators Using Precisely Timed Energy Injection. IEEE J. Solid State Circuits 53(3): 692-702 (2018) - [j36]Jeffrey Lee, Ray Gomez, Sudhakar Pamarti:
A Broadband Class-AB Power Amplifier With Instantaneous Supply-Switching Efficiency Enhancement for Cable TV Application. IEEE J. Solid State Circuits 53(3): 762-771 (2018) - [j35]Sameed Hameed, Sudhakar Pamarti:
Design and Analysis of a Programmable Receiver Front End Based on Baseband Analog-FIR Filtering Using an LPTV Resistor. IEEE J. Solid State Circuits 53(6): 1592-1606 (2018) - [j34]Sameed Hameed, Sudhakar Pamarti:
Errata for "Design and Analysis of a Programmable Receiver Front End Based on Baseband Analog-FIR Filtering Using an LPTV Resistor". IEEE J. Solid State Circuits 53(9): 2733 (2018) - [j33]Sameed Hameed, Sudhakar Pamarti:
Design and Analysis of a Programmable Receiver Front End With Time-Interleaved Baseband Analog-FIR Filtering. IEEE J. Solid State Circuits 53(11): 3197-3207 (2018) - [j32]Neha Sinha, Sudhakar Pamarti:
Theoretical Analysis of Circuit Non-Idealities in a Passive Spectrum Scanner Based on Periodically Time-Varying Circuit Components. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(8): 2403-2410 (2018) - [j31]Sameed Hameed, Sudhakar Pamarti:
Impedance Matching and Reradiation in LPTV Receiver Front-Ends: An Analysis Using Conversion Matrices. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(9): 2842-2855 (2018) - 2017
- [j30]Meisam Heidarpour Roshan, Samira Zaliasl, Kimo Joo, Kamran Souri, Rajkumar Palwai, Lijun Will Chen, Amanpreet Singh, Sudhakar Pamarti, Nicholas Miller, Joseph C. Doll, Carl Arft, Sassan Tabatabaei, Carl Sechen, Aaron Partridge, Vinod Menon:
A MEMS-Assisted Temperature Sensor With 20-µK Resolution, Conversion Rate of 200 S/s, and FOM of 0.04 pJK2. IEEE J. Solid State Circuits 52(1): 185-197 (2017) - [j29]Yousr Ismail, Haechang Lee, Sudhakar Pamarti, Chih-Kong Ken Yang:
A 36-V 49% Efficient Hybrid Charge Pump in Nanometer-Scale Bulk CMOS Technology. IEEE J. Solid State Circuits 52(3): 781-798 (2017) - [j28]Neha Sinha, Mansour Rachid, Shanthi Pavan, Sudhakar Pamarti:
Design and Analysis of an 8 mW, 1 GHz Span, Passive Spectrum Scanner With >+31 dBm Out-of-Band IIP3 Using Periodically Time-Varying Circuit Components. IEEE J. Solid State Circuits 52(8): 2009-2025 (2017) - [j27]Med Nariman, Farid Shirinfar, Sudhakar Pamarti, Ahmadreza Rofougaran, Franco De Flaviis:
High-Efficiency Millimeter-Wave Energy-Harvesting Systems With Milliwatt-Level Output Power. IEEE Trans. Circuits Syst. II Express Briefs 64-II(6): 605-609 (2017) - [c31]Hani Esmaeelzadeh, Sudhakar Pamarti:
A precisely-timed energy injection technique achieving 58/10/2μs start-up in 1.84/10/50MHz crystal oscillators. CICC 2017: 1-4 - [c30]Jeffrey Lee, Sudhakar Pamarti, Ramon A. Gomez:
A 10-to-650MHz 1.35W class-AB power amplifier with instantaneous supply-switching efficiency enhancement. CICC 2017: 1-4 - [c29]Sudhakar Pamarti, Nan Sun:
Session 3 - Clocking techniques. CICC 2017: 1 - [c28]Sameed Hameed, Sudhakar Pamarti:
24.6 A time-interleaved filtering-by-aliasing receiver front-end with >70dB suppression at <4× bandwidth frequency offset. ISSCC 2017: 418-419 - 2016
- [j26]Sameed Hameed, Mansour Rachid, Babak Daneshrad, Sudhakar Pamarti:
Frequency-Domain Analysis of N-Path Filters Using Conversion Matrices. IEEE Trans. Circuits Syst. II Express Briefs 63-II(1): 74-78 (2016) - [c27]Wei Wu, Yen-Lung Chen, Yue Ma, Chien-Nan Jimmy Liu, Jing-Yang Jou, Sudhakar Pamarti, Lei He:
Wave digital filter based analog circuit emulation on FPGA. ISCAS 2016: 1286-1289 - [c26]Sudhakar Pamarti, N. Sinha, Sameed Hameed, Mansour Rachid:
Time-varying circuit approaches for software defined and cognitive radio applications. ISOCC 2016: 155-156 - [c25]Meisam Heidarpour Roshan, Samira Zali Asl, Kimo Joo, Kamran Souri, Rajkumar Palwai, Lijun Will Chen, Sudhakar Pamarti, Joseph C. Doll, Nicholas Miller, Carl Arft, Sassan Tabatabaei, Carl Sechen, Aaron Partridge, Vinod Menon:
11.1 Dual-MEMS-resonator temperature-to-digital converter with 40 K resolution and FOM of 0.12pJK2. ISSCC 2016: 200-201 - [c24]Sameed Hameed, Neha Sinha, Mansour Rachid, Sudhakar Pamarti:
26.6 A programmable receiver front-end achieving >17dBm IIP3 at <1.25×BW frequency offset. ISSCC 2016: 446-447 - 2015
- [j25]Samira Zali Asl, James C. Salvia, Ginel C. Hill, Lijun Will Chen, Kimo Joo, Rajkumar Palwai, Niveditha Arumugam, Meghan Phadke, Shouvik Mukherjee, Haechang Lee, Charles Grosjean, Paul M. Hagelin, Sudhakar Pamarti, Terri S. Fiez, Kofi A. A. Makinwa, Aaron Partridge, Vinod Menon:
A 3 ppm 1.5 × 0.8 mm 2 1.0 µA 32.768 kHz MEMS-Based Oscillator. IEEE J. Solid State Circuits 50(1): 291-302 (2015) - [j24]Abhishek Ghosh, Sudhakar Pamarti:
Linearization Through Dithering: A 50 MHz Bandwidth, 10-b ENOB, 8.2 mW VCO-Based ADC. IEEE J. Solid State Circuits 50(9): 2012-2024 (2015) - [c23]Wei Wu, Peng Gu, Yen-Lung Chen, Chien-Nan Liu, Sudhakar Pamarti, Chang Wu, Lei He:
Toward Wave Digital Filter based Analog Circuit Emulation on FPGA (Abstract Only). FPGA 2015: 276 - [c22]Sameed Hameed, Mansour Rachid, Babak Daneshrad, Sudhakar Pamarti:
Frequency-domain analysis of a mixer-first receiver using conversion matrices. ISCAS 2015: 541-544 - [c21]Neha Sinha, Mansour Rachid, Sudhakar Pamarti:
A sharp programmable passive filter based on filtering by Aliasing. VLSIC 2015: 58- - 2014
- [c20]Samira Zali Asl, Shouvik Mukherjee, Lijun Will Chen, Kimo Joo, Rajkumar Palwai, Niveditha Arumugam, P. Galle, Meghan Phadke, Charles Grosjean, Jim Salvia, Haechang Lee, Sudhakar Pamarti, Terri S. Fiez, Kofi A. A. Makinwa, Aaron Partridge, Vinod Menon:
12.9 A 1.55×0.85mm2 3ppm 1.0μA 32.768kHz MEMS-based oscillator. ISSCC 2014: 226-227 - [c19]Yousr Ismail, Haechang Lee, Sudhakar Pamarti, Chih-Kong Ken Yang:
23.8 A 34V charge pump in 65nm bulk CMOS technology. ISSCC 2014: 408-409 - [c18]Hojat Parta, Milos D. Ercegovac, Sudhakar Pamarti:
RF digital predistorter implementation using polynomial optimization. MWSCAS 2014: 981-984 - 2013
- [j23]Michael H. Perrott, James C. Salvia, Fred S. Lee, Aaron Partridge, Shouvik Mukherjee, Carl Arft, Jin-Tae Kim, Niveditha Arumugam, Pavan Gupta, Sassan Tabatabaei, Sudhakar Pamarti, Haechang Lee, Fari Assaderaghi:
A Temperature-to-Digital Converter for a MEMS-Based Programmable Oscillator With < ±0.5-ppm Frequency Stability and < 1-ps Integrated Jitter. IEEE J. Solid State Circuits 48(1): 276-291 (2013) - [j22]Minyoung Song, Inhwa Jung, Sudhakar Pamarti, Chulwoo Kim:
A 2.4 GHz 0.1-Fref-Bandwidth All-Digital Phase-Locked Loop With Delay-Cell-Less TDC. IEEE Trans. Circuits Syst. I Regul. Pap. 60-I(12): 3145-3151 (2013) - [j21]Mansour Rachid, Sudhakar Pamarti, Babak Daneshrad:
Filtering by Aliasing. IEEE Trans. Signal Process. 61(9): 2319-2327 (2013) - [c17]Abhishek Ghosh, Sudhakar Pamarti:
A 50MHz bandwidth, 10-b ENOB, 8.2mW VCO-based ADC enabled by filtered-dithering based linearization. CICC 2013: 1-4 - [c16]Abhishek Ghosh, Sudhakar Pamarti:
Filtering of subtractive discrete dither in quantizers: Some new results. ICASSP 2013: 5790-5794 - [c15]Abhishek Ghosh, Sudhakar Pamarti:
Adaptive signal conditioning algorithms to enable wideband signal digitization. ICC 2013: 4566-4570 - [c14]Abhishek Ghosh, Sudhakar Pamarti:
Mitigating timing errors in time-interleaved ADCs: A signal conditioning approach. ISCAS 2013: 357-360 - [c13]Abhishek Ghosh, Sudhakar Pamarti:
Enabling high-speed, high-resolution ADCs using signal conditioning algorithms. MWSCAS 2013: 856-859 - 2012
- [j20]Woogeun Rhee, Antonio Liscidini, Jae-Yoon Sim, Kenichi Okada, Sudhakar Pamarti:
Clock/Frequency Generation Circuits and Systems. J. Electr. Comput. Eng. 2012: 941653:1-941653:2 (2012) - [j19]Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti:
Worst-Case Estimation for Data-Dependent Timing Jitter and Amplitude Noise in High-Speed Differential Link. IEEE Trans. Very Large Scale Integr. Syst. 20(1): 89-97 (2012) - [c12]Chiranjib Choudhuri, Abhishek Ghosh, Urbashi Mitra, Sudhakar Pamarti:
Robustness of xampling-based RF receivers against analog mismatches. ICASSP 2012: 2965-2968 - [c11]Michael H. Perrott, Jim Salvia, Fred S. Lee, Aaron Partridge, Shouvik Mukherjee, Carl Arft, Jin-Tae Kim, Niveditha Arumugam, Pavan Gupta, Sassan Tabatabaei, Sudhakar Pamarti, Haechang Lee, Fari Assaderaghi:
A temperature-to-digital converter for a MEMS-based programmable oscillator with better than ±0.5ppm frequency stability. ISSCC 2012: 206-208 - [i2]Abhishek Ghosh, Sudhakar Pamarti:
Dithered quantizers with negligible in-band dither power. CoRR abs/1202.0936 (2012) - [i1]Abhishek Ghosh, Sudhakar Pamarti:
Mitigating Timing Errors in Time-Interleaved ADCs: a signal conditioning approach. CoRR abs/1204.0844 (2012) - 2011
- [j18]Nitin Nidhi, Pin-En Su, Sudhakar Pamarti:
Open-Loop Wide-Bandwidth Phase Modulation Techniques. J. Electr. Comput. Eng. 2011: 507381:1-507381:12 (2011) - [j17]Pin-En Su, Sudhakar Pamarti:
A 2.4 GHz Wideband Open-Loop GFSK Transmitter With Phase Quantization Noise Cancellation. IEEE J. Solid State Circuits 46(3): 615-626 (2011) - [j16]Brian Fitzgibbon, Sudhakar Pamarti, Michael Peter Kennedy:
A Spur-Free MASH DDSM With High-Order Filtered Dither. IEEE Trans. Circuits Syst. II Express Briefs 58-II(9): 585-589 (2011) - [c10]Sandeep D'Souza, Mau-Chung Frank Chang, Sudhakar Pamarti, Bipul Agarwal, Hossein Zarei, Tirdad Sowlati, Roc Berenguer:
A progammable baseband anti-alias filter for a passive-mixer-based, SAW-less, multi-band, multi-mode WEDGE transmitter. ISCAS 2011: 450-453 - [c9]Mansour Rachid, Sudhakar Pamarti, Babak Daneshrad:
A novel reconfigurable alias interference cancellation technique for A-to-D conversion. ISCAS 2011: 1656-1659 - 2010
- [j15]Tzu-Chien Hsueh, Pin-En Su, Sudhakar Pamarti:
A 3 , ˟, 3.8 Gb/s Four-Wire High Speed I/O Link Based on CDMA-Like Crosstalk Cancellation. IEEE J. Solid State Circuits 45(8): 1522-1532 (2010) - [j14]Michael H. Perrott, Sudhakar Pamarti, Eric G. Hoffman, Fred S. Lee, Shouvik Mukherjee, Cathy Lee, Vadim Tsinker, Sathi Perumal, Benjamin Soto, Niveditha Arumugam, Bruno W. Garlepp:
A Low Area, Switched-Resistor Based Fractional-N Synthesizer Applied to a MEMS-Based Programmable Oscillator. IEEE J. Solid State Circuits 45(12): 2566-2581 (2010) - [j13]Nitesh Singhal, Sudhakar Pamarti:
A Digital Envelope Combiner for Switching Power Amplifier Linearization. IEEE Trans. Circuits Syst. II Express Briefs 57-II(4): 270-274 (2010) - [j12]Pin-En Su, Sudhakar Pamarti:
Mismatch Shaping Techniques to Linearize Charge Pump Errors in Fractional-N PLLs. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(6): 1221-1230 (2010) - [c8]Tzu-Chien Hsueh, Sudhakar Pamarti:
A 16 Gb/s four-wire CDMA-based high speed I/O link with transmitter timing adjustment. CICC 2010: 1-4 - [c7]Nitesh Singhal, Nitin Nidhi, Sudhakar Pamarti:
A power amplifier with minimal efficiency degradation under back-off. ISCAS 2010: 1851-1854 - [c6]Michael H. Perrott, Sudhakar Pamarti, Eric G. Hoffman, Fred S. Lee, Shouvik Mukherjee, Cathy Lee, Vadim Tsinker, Sathi Perumal, Benjamin Soto, Niveditha Arumugam, Bruno W. Garlepp:
A low-area switched-resistor loop-filter technique for fractional-N synthesizers applied to a MEMS-based programmable oscillator. ISSCC 2010: 244-245
2000 – 2009
- 2009
- [j11]Sudhakar Pamarti:
Digital techniques for integrated frequency synthesizers: A tutorial. IEEE Commun. Mag. 47(4): 126-133 (2009) - [j10]Pin-En Su, Sudhakar Pamarti:
Fractional-N Phase-Locked-Loop-Based Frequency Synthesis: A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs 56-II(12): 881-885 (2009) - [c5]Tzu-Chien Hsueh, Pin-En Su, Sudhakar Pamarti:
A 3×3.8Gb/s four-wire high speed I/O link based on CDMA-like crosstalk cancellation. CICC 2009: 121-124 - [c4]Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti:
Joint design-time and post-silicon optimization for digitally tuned analog circuits. ICCAD 2009: 725-730 - [c3]Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti, Yu Hu:
Worst case timing jitter and amplitude noise in differential signaling. ISQED 2009: 40-46 - 2008
- [j9]Sudhakar Pamarti:
A Theoretical Study of the Quantization Noise in Split Delta-Sigma ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(5): 1267-1278 (2008) - [j8]Sudhakar Pamarti:
The Effect of Noise Cross-Coupling on Time-Interleaved Delta-Sigma ADCs. IEEE Trans. Circuits Syst. II Express Briefs 55-II(6): 532-536 (2008) - [j7]Sudhakar Pamarti, Siamak Delshadpour:
A Spur Elimination Technique for Phase Interpolation-Based Fractional-N PLLs. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(6): 1639-1647 (2008) - 2007
- [j6]Sudhakar Pamarti, Jared Welz, Ian Galton:
Statistics of the Quantization Noise in 1-Bit Dithered Single-Quantizer Digital Delta-Sigma Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(3): 492-503 (2007) - [j5]Sudhakar Pamarti, Ian Galton:
LSB Dithering in MASH Delta-Sigma D/A Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(4): 779-790 (2007) - [c2]Sudhakar Pamarti:
A Theoretical Analysis of Split Delta-Sigma ADCs. ISCAS 2007: 493-496 - 2006
- [j4]Elad Alon, Jaeha Kim, Sudhakar Pamarti, Ken Chang, Mark Horowitz:
Replica compensated linear regulators for supply-regulated phase-locked loops. IEEE J. Solid State Circuits 41(2): 413-424 (2006) - [c1]Changbo Long, Sasank Reddy, Sudhakar Pamarti, Lei He, Tanay Karnik:
Power-efficient pulse width modulation DC/DC converters with zero voltage switching control. ISLPED 2006: 326-329 - 2005
- [j3]Sudhakar Pamarti, Lars C. Jansson, Ian Galton:
Addition to "A Wideband 2.4-GHz Delta-Sigma Fractional-$N$PLL With 1-Mb/s In-Loop Modulation". IEEE J. Solid State Circuits 40(2): 559 (2005) - 2004
- [j2]Sudhakar Pamarti, Lars C. Jansson, Ian Galton:
A wideband 2.4-GHz delta-sigma fractional-NPLL with 1-Mb/s in-loop modulation. IEEE J. Solid State Circuits 39(1): 49-62 (2004) - 2003
- [j1]Sudhakar Pamarti, Ian Galton:
Phase-noise cancellation design tradeoffs in delta-sigma fractional-N PLLs. IEEE Trans. Circuits Syst. II Express Briefs 50(11): 829-838 (2003)
Coauthor Index
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last updated on 2024-12-02 22:34 CET by the dblp team
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