"A Sub-Sampling 35GHz PLL in 45nm PDSOI BiCMOS with 37fs Integrated Jitter ..."

Christopher Chen et al. (2024)

> Home

Details and statistics

DOI: 10.1109/BCICTS59662.2024.10745671

access: closed

type: Conference or Workshop Paper

metadata version: 2024-11-28

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/bcicts/Chen0CSZTPYC24
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/bcicts/Chen0CSZTPYC24
Christopher Chen, Yan Zhang, Hao-Yu Chien, Jiazhang Song, Jia Zhou, Chao-Jen Tien, Sudhakar Pamarti, Chih-Kong Ken Yang, Mau-Chung Frank Chang:
A Sub-Sampling 35GHz PLL in 45nm PDSOI BiCMOS with 37fs Integrated Jitter and a FoM of -252dB. BCICTS 2024: 203-206

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.