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2020 – today
- 2024
[c9]Gönenç Berkol, Matt Whitney:
Circuit Design Techniques for High-Voltage Comparators and Amplifiers. CICC 2024: 1-8- 2021
- [j4]Gönenç Berkol
, Peter G. M. Baltus, Pieter J. A. Harpe, Eugenio Cantatore:
A 1.25 μJ per Measurement Ultrasound Rangefinder System in 65 nm CMOS for Explorations With a Swarm of Sensor Nodes. IEEE Trans. Circuits Syst. I Regul. Pap. 68(4): 1409-1420 (2021)
2010 – 2019
- 2019
- [c8]Gönenç Berkol, Peter G. M. Baltus, Pieter J. A. Harpe, Eugenio Cantatore:
A -81.6dBm Sensitivity Ultrasound Transceiver in 65nm CMOS for Symmetrical Data-Links. ESSCIRC 2019: 145-148 - [c7]Engin Afacan, Gönenç Berkol, Günhan Dündar:
Post-Silicon Validation of Yield-Aware Analog Circuit Synthesis. SMACD 2019: 245-248 - 2018
- [c6]Gönenç Berkol, Peter G. M. Baltus, Pieter J. A. Harpe, Eugenio Cantatore:
Design of a Low-power Ultrasound Transceiver for Underwater Sensor Networks. PRIME 2018: 129-132 - 2017
- [c5]Martin Andraud, Gönenç Berkol, Jaro De Roose, Santosh Gannavarapu, Haoming Xin, Eugenio Cantatore, Pieter J. A. Harpe, Marian Verhelst, Peter G. M. Baltus:
Exploring the unknown through successive generations of low power and low resource versatile agents. DATE 2017: 290-293 - 2016
- [j3]Engin Afacan, Gönenç Berkol, Günhan Dündar, Ali Emre Pusane, I. Faik Baskaya:
A lifetime-aware analog circuit sizing tool. Integr. 55: 349-356 (2016) - [j2]Muharrem Orkun Saglamdemir, Gönenç Berkol, Günhan Dündar, Alper Sen:
An analog behavioral equivalence boundary search methodology for simulink models and circuit level designs utilizing evolutionary computation. Integr. 55: 366-375 (2016) - [j1]Engin Afacan, Gönenç Berkol, Günhan Dündar, Ali Emre Pusane, I. Faik Baskaya:
An analog circuit synthesis tool based on efficient and reliable yield estimation. Microelectron. J. 54: 14-22 (2016) - [c4]Gönenç Berkol, Engin Afacan, Günhan Dündar, E. V. Fernandez:
A hierarchical design automation concept for analog circuits. ICECS 2016: 133-136 - 2015
- [c3]Engin Afacan, Gönenç Berkol, Ali Emre Pusane, Günhan Dündar, I. Faik Baskaya:
A hybrid Quasi Monte Carlo method for yield aware analog circuit sizing tool. DATE 2015: 1225-1228 - [c2]Gönenç Berkol, Engin Afacan, Günhan Dündar, Ali Emre Pusane, I. Faik Baskaya:
A novel yield aware multi-objective analog circuit optimization tool. ISCAS 2015: 2652-2655 - [c1]Gönenç Berkol, Ahmet Unutulmaz, Engin Afacan, Günhan Dündar, Francisco V. Fernández, Ali Emre Pusane, I. Faik Baskaya:
A two-step layout-in-the-loop design automation tool. NEWCAS 2015: 1-4
Coauthor Index
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