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2020 – today
- 2023
[c29]Suhwan Kim, Harish K. Krishnamurthy, Sergey Sofer, Sheldon Weng, Shahar Wolf, Ashoke Ravi, Krishnan Ravichandran, Ofir Degani, James W. Tschanz, Vivek De:
A 1.8W High-Frequency SIMO Converter Featuring Digital Sensor-Less Computational Zero-Current Operation and Non-Linear Duty-Boost. ISSCC 2023: 186-187- 2022
- [c28]Bassam Khamaisi, David Ben-Haim, Anna Nazimov, Assaf Ben Bassat, Shahar Gross, N. Shay, G. Asa, V. Spector, Yishai Eilat, A. Azam, Eli Borokhovich, I. Shternberg, Phillip Skliar, Elad Solomon, A. Beidas, T. A. Hazira, Aaron Lane, Eyal Shaviv, G. Nudelman, E. Dahan, M. S. Shemer, Nahum Kimiagarov, Ashoke Ravi, Ofir Degani:
A 16nm, +28dBm Dual-Band All-Digital Polar Transmitter Based on 4-core Digital PA for Wi-Fi6E Applications. ISSCC 2022: 324-326 - 2021
- [c27]Edwin Thaller, Run Levinger, Evgeny Shumaker, Aryeh Farber, Sergey Bershansky, Nir Geron, Ashoke Ravi, Rotem Banin, Jasmin Kadry, Gil Horovitz, Christian Krassnitzer, Christoph Duller, Patrick Torta, Mark Elzinga, Kamran Azadet:
A K-Band 12.1-to-16.6GHz Subsampling ADPLL with 47.3fsrms Jitter Based on a Stochastic Flash TDC and Coupled Dual-Core DCO in 16nm FinFET CMOS. ISSCC 2021: 451-453 - 2020
- [j13]Paolo Madoglio
, Yorgos Palaskas, Jörn Angel, Jakob M. Tomasik, Sven Hampel, Petra Schubert, Peter Preyler, Thomas Mayer, Thomas Bauernfeind, Peter Plechinger, Ashoke Ravi, Ofir Degani, Rotem Banin, Eshel Gordon, Dimo Martev, Timo Gossmann, Andreas Holm, Zdravko Boos:
A Cellular Multiband DTC-Based Digital Polar Transmitter With -153-dBc/Hz Noise in 14-nm FinFET. IEEE J. Solid State Circuits 55(7): 1830-1841 (2020) - [j12]Assaf Ben Bassat, Shahar Gross, Aaron Lane, Anna Nazimov, Bassam Khamaisi, Elad Solomon, Elan Banin, Eli Borokhovich, Nahum Kimiagorov, Nati Dinur, Phillip Skliar, Roi Cohen, Rotem Banin, Sarit Zur, Sebastian Reinhold, Smadar Breuer-Bruker, Tomer Abuhazira, Tom Livneh, Tzvi Maimon, Uri Parker, Ashoke Ravi, Ofir Degani:
A Fully Integrated 27-dBm Dual-Band All-Digital Polar Transmitter Supporting 160 MHz for Wi-Fi 6 Applications. IEEE J. Solid State Circuits 55(12): 3414-3425 (2020) - [c26]Assaf Ben Bassat, Shahar Gross, Anna Nazimov, Ashoke Ravi, Bassam Khamaisi, Elan Banin, Eli Borokhovich, Nahum Kimiagarov, Phillip Skliar, Rotem Banin, Sarit Zur, Sebastian Reinhold, Smadar Bruker, Tzvi Maimon, Uri Parker, Ofir Degani:
10.5 A Fully Integrated 27dBm Dual-Band All-Digital Polar Transmitter Supporting 160MHz for WiFi 6 Applications. ISSCC 2020: 180-182
2010 – 2019
- 2019
- [c25]Yorgos Palaskas, Peter Plechinger, Ashoke Ravi, Ofir Degani, Rotem Banin, Eshel Gordon, Zdravko Boos, Paolo Madoglio, Jörn Angel, Jakob M. Tomasik, Sven Hampel, Petra Schubert, Peter Preyler, Thomas Mayer, Thomas Bauernfeind:
A Cellular Multiband DTC-Based Digital Polar Transmitter With -153 dBc/Hz Noise in 14-nm FinFET. ESSCIRC 2019: 179-182 - 2018
- [j11]Erkan Alpman, Ahmad Khairi, Richard Dorrance, Minyoung Park, V. Srinivasa Somayazulu, Jeffrey R. Foerster, Ashoke Ravi, Jeyanandh Paramesh, Stefano Pellerano:
802.11g/n Compliant Fully Integrated Wake-Up Receiver With -72-dBm Sensitivity in 14-nm FinFET CMOS. IEEE J. Solid State Circuits 53(5): 1411-1422 (2018) - [c24]Amy Whitcombe, Borivoje Nikolic, Farhana Sheikh, Erkan Alpman, Ashoke Ravi:
A Dual-Mode Configurable RF-to-Digital Receiver in 16NM FinFET. VLSI Circuits 2018: 23-24 - 2017
- [c23]William Y. Li, Hyung Seok Kim, Kailash Chandrashekar, Khoa Minh Nguyen, Ashoke Ravi:
A 32nm, 0.65-10GHz, 0.9/0.3 ps/σ TX/RX jitter single inductor digital fractional-n clock generator for reconfigurable serial I/O. ISLPED 2017: 1-6 - [c22]Paolo Madoglio, Hongtao Xu, Kailash Chandrashekar, Luis Cuellar, Muhammad Faisal, Yee William Li, Hyung Seok Kim, Khoa Minh Nguyen, Yulin Tan, Brent R. Carlton, Vaibhav A. Vaidya, Yanjie Wang, Thomas Tetzlaff, Satoshi Suzuki, Amr Fahim, Parmoon Seddighrad, Jianyong Xie, Zhichao Zhang, Divya Shree Vemparala, Ashoke Ravi, Stefano Pellerano, Yorgos Palaskas:
13.6 A 2.4GHz WLAN digital polar transmitter with synthesized digital-to-time converter in 14nm trigate/FinFET technology for IoT and wearable applications. ISSCC 2017: 226-227 - 2016
- [j10]Sebastian Sievert, Ofir Degani, Assaf Ben Bassat, Rotem Banin, Ashoke Ravi, Wolfgang Thomann, Bernd-Ulrich Klepser, Zdravko Boos, Doris Schmitt-Landsiedel:
A 2 GHz 244 fs-Resolution 1.2 ps-Peak-INL Edge Interpolator-Based Digital-to-Time Converter in 28 nm CMOS. IEEE J. Solid State Circuits 51(12): 2992-3004 (2016) - [c21]Sebastian Sievert, Ofir B. Degani, Assaf Ben Bassat, Rotem Banin, Ashoke Ravi, Bernd-Ulrich Klepser, Zdravko Boos, Doris Schmitt-Landsiedel:
2.9 A 2GHz 244fs-resolution 1.2ps-Peak-INL edge-interpolator-based digital-to-time converter in 28nm CMOS. ISSCC 2016: 52-54 - 2015
- [c20]Vamsi Talla, Stefano Pellerano, Hongtao Xu, Ashoke Ravi, Yorgos Palaskas:
Wi-Fi RF energy harvesting for battery-free wearable radio platforms. IEEE RFID 2015: 47-54 - 2013
- [j9]Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Khoa Minh Nguyen, Hyung-Jin Lee, Ashoke Ravi, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Satish Venkatesan, Durgesh Srivastava, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Sunder Ramamurthy, Raj Yavatkar, Krishnamurthy Soumyanath:
A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver. IEEE J. Solid State Circuits 48(1): 91-103 (2013) - [j8]Hyung Seok Kim, Carlos Ornelas, Kailash Chandrashekar, Dan Shi, Pin-en Su, Paolo Madoglio, Yee William Li, Ashoke Ravi:
A Digital Fractional-N PLL With a PVT and Mismatch Insensitive TDC Utilizing Equivalent Time Sampling Technique. IEEE J. Solid State Circuits 48(7): 1721-1729 (2013) - 2012
- [j7]Wei Tai, Hongtao Xu, Ashoke Ravi, Hasnain Lakdawala, Ofir B. Degani, L. Richard Carley, Yorgos Palaskas:
A Transformer-Combined 31.5 dBm Outphasing Power Amplifier in 45 nm LP CMOS With Dynamic Power Control for Back-Off Power Efficiency Enhancement. IEEE J. Solid State Circuits 47(7): 1646-1658 (2012) - [j6]Ashoke Ravi, Paolo Madoglio, Hongtao Xu, Kailash Chandrashekar, Marian Verhelst, Stefano Pellerano, Luis Cuellar, Mariano Aguirre-Hernandez, Masoud Sajadieh, J. E. Zarate-Roldan, Ofir Bochobza-Degani, Hasnain Lakdawala, Yorgos Palaskas:
A 2.4-GHz 20-40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS. IEEE J. Solid State Circuits 47(12): 3184-3196 (2012) - [c19]Hyung Seok Kim, Carlos Ornelas, Kailash Chandrashekar, Pin-en Su, Paolo Madoglio, Yee William Li, Ashoke Ravi:
A digital fractional-N PLL with a 3mW 0.004mm2 6-bit PVT and mismatch insensitive TDC. ESSCIRC 2012: 193-196 - [c18]Y. William Li, Carlos Ornelas, Hyung Seok Kim, Hasnain Lakdawala, Ashoke Ravi, Krishnamurthy Soumyanath:
A reconfigurable distributed all-digital clock generator core with SSC and skew correction in 22nm high-k tri-gate LP CMOS. ISSCC 2012: 70-72 - [c17]Paolo Madoglio, Ashoke Ravi, Hongtao Xu, Kailash Chandrashekar, Marian Verhelst, Stefano Pellerano, Luis Cuellar, Mariano Aguirre, Masoud Sajadieh, Ofir B. Degani, Hasnain Lakdawala, Yorgos Palaskas:
A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS. ISSCC 2012: 168-170 - [c16]Kailash Chandrashekar, Stefano Pellerano, Paolo Madoglio, Ashoke Ravi, Yorgos Palaskas:
A 32nm CMOS all-digital reconfigurable fractional frequency divider for LO generation in multistandard SoC radios with on-the-fly interference management. ISSCC 2012: 352-354 - [c15]Yulin Tan, Jon Duster, Chang-Tsung Fu, Erkan Alpman, Ajay Balankutty, Chun C. Lee, Ashoke Ravi, Stefano Pellerano, Kailash Chandrashekar, Hyung Seok Kim, Brent R. Carlton, Satoshi Suzuki, M. Shafi, Yorgos Palaskas, Hasnain Lakdawala:
A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS. VLSIC 2012: 76-77 - 2011
- [j5]Hongtao Xu, Yorgos Palaskas, Ashoke Ravi, Masoud Sajadieh, Mohammed A. El-Tanani, Krishnamurthy Soumyanath:
A Flip-Chip-Packaged 25.3 dBm Class-D Outphasing Power Amplifier in 32 nm CMOS for WLAN Application. IEEE J. Solid State Circuits 46(7): 1596-1605 (2011) - [c14]Wei Tai, Hongtao Xu, Ashoke Ravi, Hasnain Lakdawala, Ofir B. Degani, L. Richard Carley, Yorgos Palaskas:
A 31.5dBm outphasing class-D power amplifier in 45nm CMOS with back-off efficiency enhancement by dynamic power control. ESSCIRC 2011: 131-134 - 2010
- [j4]Paolo Madoglio, Ashoke Ravi, Luis Cuellar, Stefano Pellerano, Parmoon Seddighrad, Ismael Lomeli, Yorgos Palaskas:
A 2.5-GHz, 6.9-mW, 45-nm-LP CMOS, ΔΣ Modulator Based on Standard Cell Design With Time-Interleaving. IEEE J. Solid State Circuits 45(7): 1410-1420 (2010) - [c13]Hongtao Xu, Yorgos Palaskas, Ashoke Ravi, Krishnamurthy Soumyanath:
A highly linear 25dBm outphasing power amplifier in 32nm CMOS for WLAN application. ESSCIRC 2010: 306-309
2000 – 2009
- 2009
- [j3]Jeffrey S. Walling, Hasnain Lakdawala, Yorgos Palaskas, Ashoke Ravi, Ofir Degani, Krishnamurthy Soumyanath, David J. Allstot:
A Class-E PA With Pulse-Width and Pulse-Position Modulation in 65 nm CMOS. IEEE J. Solid State Circuits 44(6): 1668-1678 (2009) - [c12]Paolo Madoglio, Ashoke Ravi, Luis Cuellar, Stefano Pellerano, Parmoon Seddighrad, Ismael Lomeli, Yorgos Palaskas:
A 2.5GHz, 6.9mW ΔΣ modulator with standard cell design in 45nm-LP CMOS using time-interleaving. ESSCIRC 2009: 152-155 - 2008
- [c11]Yorgos Palaskas, Ashoke Ravi, Stefano Pellerano:
MIMO techniques for high data rate radio communications. CICC 2008: 141-148 - [c10]Hiroyuki Ito, Hasnain Lakdawala, Ashoke Ravi, Stefano Pellerano, Rick Ruby, Krishnamurthy Soumyanath, Kazuya Masu:
A 1.7-GHz 1.5-mW digitally-controlled FBAR oscillator with 0.03-ppb resolution. ESSCIRC 2008: 98-101 - [c9]Parmoon Seddighrad, Ashoke Ravi, Masoud Sajadieh, Hasnain Lakdawala, Krishnamurthy Soumyanath:
A 3.6GHz, 16mW ΣΔ DAC for a 802.11n / 802.16e transmitter with 30dB digital power control in 90nm CMOS. ESSCIRC 2008: 202-205 - [c8]Stefano Pellerano, Rajarshi Mukhopadhyay, Ashoke Ravi, Joy Laskar, Yorgos Palaskas:
A 39.1-to-41.6GHz ΔΣ Fractional-N Frequency Synthesizer in 90nm CMOS. ISSCC 2008: 484-485 - [c7]Jeffrey S. Walling, Hasnain Lakdawala, Yorgos Palaskas, Ashoke Ravi, Ofir Degani, Krishnamurthy Soumyanath, David J. Allstot:
A 28.6dBm 65nm Class-E PA with Envelope Restoration by Pulse-Width and Pulse-Position Modulation. ISSCC 2008: 566-567 - 2006
- [j2]Yorgos Palaskas, Stewart S. Taylor, Stefano Pellerano, Ian A. Rippke, Ralph E. Bishop, Ashoke Ravi, Hasnain Lakdawala, Krishnamurthy Soumyanath:
A 5-GHz 20-dBm Power Amplifier With Digitally Assisted AM-PM Correction in a 90-nm CMOS Process. IEEE J. Solid State Circuits 41(8): 1757-1763 (2006) - [j1]Yorgos Palaskas, Ashoke Ravi, Stefano Pellerano, Brent R. Carlton, Mostafa A. Elmala, Ralph E. Bishop, Gaurab Banerjee, Rich B. Nicholls, Stanley K. Ling, Nati Dinur, Stewart S. Taylor, Krishnamurthy Soumyanath:
A 5-GHz 108-Mb/s 2 $\times$2 MIMO Transceiver RFIC With Fully Integrated 20.5-dBm ${\rm P}_{\rm 1dB}$ Power Amplifiers in 90-nm CMOS. IEEE J. Solid State Circuits 41(12): 2746-2756 (2006) - [c6]Sunghyun Park, Yorgos Palaskas, Ashoke Ravi, Ralph E. Bishop, Michael P. Flynn:
A 3.5 GS/s 5-b Flash ADC in 90 nm CMOS. CICC 2006: 489-492 - [c5]Yorgos Palaskas, Ashoke Ravi, Stefano Pellerano, Brent R. Carlton, Mostafa A. Elmala, Ralph E. Bishop, Gaurab Banerjee, Rich B. Nicholls, Stanley K. Ling, Stewart S. Taylor, Krishnamurthy Soumyanath:
A 5GHz 108Mb/s 2x2 MIMO Transceiver with Fully Integrated +16dBm PAs in 90nm CMOS. ISSCC 2006: 1420-1429 - 2005
- [c4]Yorgos Palaskas, Ralph E. Bishop, Ashoke Ravi, Krishnamurthy Soumyanath:
A 90-nm MOS-only 3-11GHz transmitter for UWB. CICC 2005: 165-168 - [c3]Yorgos Palaskas, Stewart S. Taylor, Stefano Pellerano, Ian A. Rippke, Ralph E. Bishop, Ashoke Ravi, Hasnain Lakdawala, Krishnamurthy Soumyanath:
A 5 GHz class-AB power amplifier in 90 nm CMOS with digitally-assisted AM-PM correction. CICC 2005: 813-816 - [c2]Charles T. Peach, Ashoke Ravi, Rosie Bishop, Krishnamurthy Soumyanath, David J. Allstot:
A 9-b 400 Msample/s pipelined analog-to digital converter in 90nm CMOS. ESSCIRC 2005: 535-538 - 2004
- [c1]Ashoke Ravi, Ralph E. Bishop, L. Richard Carley, Krishnamurthy Soumyanath:
8 GHz, 20mW, fast locking, fractional-N frequency synthesizer with optimized 3rd order, 3/5-bit IIR and 3rd order 3-bit-FIR noise shapers in 90nm CMOS. CICC 2004: 625-628
Coauthor Index
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