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ORCIDMelchiorre Bruccoleri
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2020 – today
- 2024
[c9]Guglielmo De Filippi, Lorenzo Piotto, Melchiorre Bruccoleri, Andrea Mazzanti:
A 170GHz 5.5dB NF Low-Noise Amplifier in 55nm SiGe BiCMOS. PRIME 2024: 1-4- 2022
- [j3]Farhad Bozorgi
, Melchiorre Bruccoleri, Elham Rahimi, Matteo Repossi, Francesco Svelto, Andrea Mazzanti:
Analog Front End of 50-Gb/s SiGe BiCMOS Opto-Electrical Receiver in 3-D-Integrated Silicon Photonics Technology. IEEE J. Solid State Circuits 57(1): 312-322 (2022)
2010 – 2019
- 2019
- [c8]Farhad Bozorgi, Melchiorre Bruccoleri, Matteo Repossi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto:
A 26-Gb/s 3-D-Integrated Silicon Photonic Receiver in BiCMOS-55 nm and PIC25G With - 15.2-dBm OMA Sensitivity. ESSCIRC 2019: 187-190 - 2016
- [j2]Matteo Bassi, Francesco Radice, Melchiorre Bruccoleri, Simone Erba, Andrea Mazzanti:
A High-Swing 45 Gb/s Hybrid Voltage and Current-Mode PAM-4 Transmitter in 28 nm CMOS FDSOI. IEEE J. Solid State Circuits 51(11): 2702-2715 (2016) - [c7]Matteo Bassi, Francesco Radice, Melchiorre Bruccoleri, Simone Erba, Andrea Mazzanti:
3.6 A 45Gb/s PAM-4 transmitter delivering 1.3Vppd output swing with 1V supply in 28nm CMOS FDSOI. ISSCC 2016: 66-67 - 2015
- [c6]Francesco Radice, Melchiorre Bruccoleri, Enrico Mammei, Matteo Bassi, Andrea Mazzanti:
A low-noise programmable-gain amplifier for 25 Gb/s multi-mode fiber receivers in 28nm CMOS FDSOI. ESSCIRC 2015: 160-163 - 2014
- [j1]Enrico Mammei, Fabrizio Loi, Francesco Radice, Angelo Dati, Melchiorre Bruccoleri, Matteo Bassi, Andrea Mazzanti:
Analysis and Design of a Power-Scalable Continuous-Time FIR Equalizer for 10 Gb/s to 25 Gb/s Multi-Mode Fiber EDC in 28 nm LP CMOS. IEEE J. Solid State Circuits 49(12): 3130-3140 (2014) - [c5]Enrico Mammei, Fabrizio Loi, Francesco Radice, Angelo Dati, Melchiorre Bruccoleri, Matteo Bassi, Andrea Mazzanti:
8.3 A power-scalable 7-tap FIR equalizer with tunable active delay line for 10-to-25Gb/s multi-mode fiber EDC in 28nm LP-CMOS. ISSCC 2014: 142-143 - 2013
- [c4]Francesco Radice, Melchiorre Bruccoleri, Marcello Ganzerli, Giorgio Spelgatti, Davide Sanzogni, Massimo Pozzoni, Andrea Mazzanti:
A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS. ESSCIRC 2013: 129-132
2000 – 2009
- 2002
- [c3]Andrea Xotta, Daniele Vogrig, Andrea Gerosa, Andrea Neviani, Alexandre Graell i Amat, Guido Montorsi, Melchiorre Bruccoleri, Giorgio Betti:
An all-analog CMOS implementation of a turbo decoder for hard-disk drive read channels. ISCAS (5) 2002: 69-72 - 2000
- [c2]Giacomino Bollati, Angelo Dati, Giorgio Betti, Ivan Bietti, Francesco Brianti, Melchiorre Bruccoleri, M. Coltella, P. Demartini, Marco Demicheli, Paolo Gadducci, Stefano Marchese, Daniele Ottini, Valerio Pisati, Francesco Rezzi, A. Rossi, P. Savo, C. Tonci, Rinaldo Castello:
A 450 Mbit/s parallel read/write channel with parity check and 16-state time variant Viterbi. CICC 2000: 319-322
1990 – 1999
- 1999
- [c1]Marco Demicheli, Giacomino Bollati, Paolo Gadducci, L. Affortunati, Roberto Alini, G. Betti, I. Bietti, F. Brianti, Melchiorre Bruccoleri, M. Coltella, P. Demartini, Stefano Marchese, D. Ottini, Valerio Pisati, Salvatore Portaluri, A. Rossi, P. Savo, C. Tonci, Rinaldo Castello:
A 450 Mbit/s EPR4 PRML read/write channel. CICC 1999: 317-320
Coauthor Index
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