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ORCIDEnrico Temporiti
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2020 – today
- 2024
[c17]Claudio Nani, Enrico Monaco, Nicola Ghittori, Alessandro Bosi, D. Albano, C. Asero, Nicola Codega, Alessio Di Pasquo, Ivan Fabiano, Marco Garampazzi, Fabio Giunco, D. Burgos, Gabriele Minoia, P. Rossi, Marco Sosio, L. Vignoli, Enrico Temporiti, S. Scouten, S. Jantzi:
A 5nm 60GS/s 7b 64-Way Time Interleaved Partial Loop Unrolled SAR ADC Achieving 34dB SNDR up to 32GHz. VLSI Technology and Circuits 2024: 1-2
2010 – 2019
- 2019
- [j8]Emanuele Depaoli
, Hongyang Zhang, Marco Mazzini, Walter Audoglio, Augusto Andrea Rossi, Guido Albasini, Massimo Pozzoni, Simone Erba, Enrico Temporiti, Andrea Mazzanti:
A 64 Gb/s Low-Power Transceiver for Short-Reach PAM-4 Electrical Links in 28-nm FDSOI CMOS. IEEE J. Solid State Circuits 54(1): 6-17 (2019) - [c16]Farhad Bozorgi, Melchiorre Bruccoleri, Matteo Repossi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto:
A 26-Gb/s 3-D-Integrated Silicon Photonic Receiver in BiCMOS-55 nm and PIC25G With - 15.2-dBm OMA Sensitivity. ESSCIRC 2019: 187-190 - 2016
- [j7]Enrico Temporiti, Andrea Ghilioni, Gabriele Minoia, Piero Orlandi, Matteo Repossi, Daniele Baldi, Francesco Svelto:
Insights Into Silicon Photonics Mach-Zehnder-Based Optical Transmitter Architectures. IEEE J. Solid State Circuits 51(12): 3178-3191 (2016) - [c15]Dan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Enrico Temporiti, Francesco Svelto:
A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links. ISCAS 2016: 2334-2337 - [c14]Enrico Temporiti, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Francesco Svelto:
23.4 A 56Gb/s 300mW silicon-photonics transmitter in 3D-integrated PIC25G and 55nm BiCMOS technologies. ISSCC 2016: 404-405 - 2015
- [c13]Silvio Abrate, Roberto Gaudino, Benoît Charbonnier, Sylvie Menezo, Enrico Temporiti, Guang-Hua Duan, Peter O'Brien, Guido Giuliani:
Power consumption estimation for the silicon-photonics reflective ONU conceived within the FABULOUS European project. ICTON 2015: 1-4 - [c12]Marco Cignoli, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Enrico Temporiti, Francesco Svelto:
22.9 A 1310nm 3D-integrated silicon photonics Mach-Zehnder-based transmitter with 275mW multistage CMOS driver achieving 6dB extinction ratio at 25Gb/s. ISSCC 2015: 1-3 - [c11]Silvio Abrate, Roberto Gaudino, Guido Giuliani, Enrico Temporiti, Peter O'Brien, Guang-Hua Duan, Sylvie Menezo, Benoît Charbonnier:
Silicon photonics and FDMA-PON: Insights from the EU FP7 FABULOUS project. OFC 2015: 1-3 - [c10]Frédéric Boeuf, Sebastien Cremer, Enrico Temporiti, Massimo Fere, Mark Shaw, Nathalie Vulliet, Bastien Orlando, Delia Ristoiu, Alexis Farcy, Thierry Pinguet, Attila Mekis, Gianlorenzo Masini, Peng Sun, Yuemeng Chi, Herve Petiton, Sebastien Jan, Jean-Robert Manouvrier, Charles Baudot, Patrick Le Maitre, Jean Francois Carpentier, Laurent Salager, Matteo Traldi, Luca Maggi, Danilo Rigamonti, Chiara Zaccherini, Carolina Elemi, Bernard Sautreuil, Luigi Verga:
Recent progress in Silicon Photonics R&D and manufacturing on 300mm wafer platform. OFC 2015: 1-3 - 2014
- [j6]Dan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto:
A Low-Noise Design Technique for High-Speed CMOS Optical Receivers. IEEE J. Solid State Circuits 49(6): 1437-1447 (2014) - [c9]Enrico Temporiti, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Andrea Ghilioni, Francesco Svelto:
A 3D-integrated 25Gbps silicon photonics receiver in PIC25G and 65nm CMOS technologies. ESSCIRC 2014: 131-134 - [c8]Nicolo Sabatino, Gabriele Minoia, M. Roche, Daniele Baldi, Enrico Temporiti, Andrea Mazzanti:
A 5th order gm-C low-pass filter with ±3% cut-off frequency accuracy and 220MHz to 3.3GHz tuning-range in 28nm LP CMOS. ESSCIRC 2014: 351-354 - [c7]Silvio Abrate, Roberto Gaudino, Benoît Charbonnier, Sylvie Menezo, Enrico Temporiti, Guang-Hua Duan, Peter O'Brien:
FDMA-PON and NG-PON2: Performance and cost comparison. ICTON 2014: 1-4 - 2012
- [c6]Dan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto:
A 25Gb/s low noise 65nm CMOS receiver tailored to 100GBASE-LR4. ESSCIRC 2012: 221-224 - 2011
- [j5]Federico Vecchi, Stefano Bozzola, Enrico Temporiti, Davide Guermandi, Massimo Pozzoni, Matteo Repossi, Marco Cusmai, Ugo Decanis, Andrea Mazzanti, Francesco Svelto:
A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS. IEEE J. Solid State Circuits 46(3): 551-561 (2011) - 2010
- [j4]Enrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Marco Cusmai, Francesco Svelto:
A 3.5 GHz Wideband ADPLL With Fractional Spur Suppression Through TDC Dithering and Feedforward Compensation. IEEE J. Solid State Circuits 45(12): 2723-2736 (2010) - [j3]Colin Weltin-Wu, Enrico Temporiti, Marco Cusmai, Daniele Baldi, Francesco Svelto:
Insights Into Wideband Fractional ADPLLs: Modeling and Calibration of Nonlinearity Induced Fractional Spurs. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2259-2268 (2010) - [c5]Federico Vecchi, Stefano Bozzola, Massimo Pozzoni, Davide Guermandi, Enrico Temporiti, Matteo Repossi, Ugo Decanis, Andrea Mazzanti, Francesco Svelto:
A wideband mm-Wave CMOS receiver for Gb/s communications employing interstage coupled resonators. ISSCC 2010: 220-221 - [c4]Colin Weltin-Wu, Enrico Temporiti, Daniele Baldi, Marco Cusmai, Francesco Svelto:
A 3.5GHz wideband ADPLL with fractional spur suppression through TDC dithering and feedforward compensation. ISSCC 2010: 468-469
2000 – 2009
- 2009
- [j2]Enrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Riccardo Tonietto, Francesco Svelto:
A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing Spur Reduction Techniques. IEEE J. Solid State Circuits 44(3): 824-834 (2009) - [c3]Enrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Riccardo Tonietto, Francesco Svelto:
Insights into wideband fractional All-Digital PLLs for RF applications. CICC 2009: 37-44 - 2008
- [c2]Colin Weltin-Wu, Enrico Temporiti, Daniele Baldi, Francesco Svelto:
A 3GHz Fractional-N All-Digital PLL with Precise Time-to-Digital Converter Calibration and Mismatch Correction. ISSCC 2008: 344-345 - 2004
- [j1]Enrico Temporiti, Guido Albasini, Ivan Bietti, Rinaldo Castello, Matteo Colombo:
A 700-kHz bandwidth ΣΔ fractional synthesizer with spurs compensation and linearization techniques for WCDMA applications. IEEE J. Solid State Circuits 39(9): 1446-1454 (2004) - 2003
- [c1]Ivan Bietti, Enrico Temporiti, Guido Albasini, Rinaldo Castello:
An UMTS ΣΔ fractional synthesizer with 200 kHz bandwidth and -128 dBc/Hz @ 1 MHz using spurs compensation and linearization techniques. CICC 2003: 463-466
Coauthor Index
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