default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDRobert Giterman
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2021
[j17]Yoav Weizman, Robert Giterman
, Oron Chertkow, Maoz Wicentowski, Itamar Levi, Ilan Sever, Ishai Kehati, Osnat Keren, Alexander Fish:
Low-Cost Side-Channel Secure Standard 6T-SRAM-Based Memory With a 1% Area and Less Than 5% Latency and Power Overheads. IEEE Access 9: 91764-91776 (2021)- [j16]Roman Golman, Netanel Nachum, Tomer Cohen, Robert Giterman, Adam Teman:
Refresh Algorithm for Ensuring 100% Memory Availability in Gain-Cell Embedded DRAM Macros. IEEE Access 9: 105831-105840 (2021) - 2020
- [j15]Odem Harel, Yarden Nachum, Robert Giterman:
Replica Bit-Line Technique for Internal Refresh in Logic-Compatible Gain-Cell Embedded DRAM. Microelectron. J. 101: 104781 (2020) - [j14]Robert Giterman, Andrea Bonetti, Ester Vicario Bravo, Tzachi Noy, Adam Teman, Andreas Burg:
Current-Based Data-Retention-Time Characterization of Gain-Cell Embedded DRAMs Across the Design and Variations Space. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(4): 1207-1217 (2020) - [j13]Andrea Bonetti, Roman Golman, Robert Giterman, Adam Teman, Andreas Burg:
Gain-Cell Embedded DRAMs: Modeling and Design Space. IEEE Trans. Very Large Scale Integr. Syst. 28(3): 646-659 (2020) - [c16]Andreas Toftegaard Kristensen, Robert Giterman, Alexios Balatsoukas-Stimming, Andreas Burg:
Lupulus: A Flexible Hardware Accelerator for Neural Networks. ICASSP 2020: 1608-1612 - [c15]Andrea Bonetti, Roman Golman, Robert Giterman, Adam Teman, Andreas Burg:
Gain-Cell Embedded DRAMs: Modeling and Design Space. ISCAS 2020: 1 - [c14]Robert Giterman, Andrea Bonetti, Andreas Burg, Adam Teman:
GC-eDRAM with Body-Bias Compensated Readout and Error Detection in 28nm FD-SOI. ISCAS 2020: 1 - [c13]Roman Golman, Robert Giterman, Odem Harel, Adam Teman:
Improved Read Access in GC-eDRAM Memory by Dual-Negative Word-Line Technique. ISCAS 2020: 1-5 - [i1]Andreas Toftegaard Kristensen, Robert Giterman, Alexios Balatsoukas-Stimming, Andreas Burg:
Lupulus: A Flexible Hardware Accelerator for Neural Networks. CoRR abs/2005.01016 (2020)
2010 – 2019
- 2019
- [j12]Robert Giterman, Roman Golman, Adam Teman:
Improving Energy-Efficiency in Dynamic Memories Through Retention Failure Detection. IEEE Access 7: 27641-27649 (2019) - [j11]Robert Giterman, Osnat Keren, Alexander Fish:
A 7T Security Oriented SRAM Bitcell. IEEE Trans. Circuits Syst. II Express Briefs 66-II(8): 1396-1400 (2019) - [j10]Robert Giterman, Andrea Bonetti, Andreas Burg, Adam Teman:
GC-eDRAM With Body-Bias Compensated Readout and Error Detection in 28-nm FD-SOI. IEEE Trans. Circuits Syst. II Express Briefs 66-II(12): 2042-2046 (2019) - [c12]Jonathan Narinx, Robert Giterman, Andrea Bonetti, Nicolas Frigerio, Cosimo Aprile, Andreas Burg, Yusuf Leblebici:
A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications. A-SSCC 2019: 219-222 - [c11]Robert Giterman, Maoz Wicentowski, Oron Chertkow, Ilan Sever, Ishai Kehati, Yoav Weizman, Osnat Keren, Alexander Fish:
Power Analysis Resilient SRAM Design Implemented with a 1% Area Overhead Impedance Randomization Unit for Security Applications. ESSCIRC 2019: 69-72 - 2018
- [j9]Robert Giterman, Alexander Fish, Narkis Geuli, Elad Mentovich, Andreas Burg, Adam Teman:
An 800-MHz Mixed- VT 4T IFGC Embedded DRAM in 28-nm CMOS Bulk Process for Approximate Storage Applications. IEEE J. Solid State Circuits 53(7): 2136-2148 (2018) - [j8]Robert Giterman, Alexander Fish, Andreas Burg, Adam Teman:
A 4-Transistor nMOS-Only Logic-Compatible Gain-Cell Embedded DRAM With Over 1.6-ms Retention Time at 700 mV in 28-nm FD-SOI. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(4): 1245-1256 (2018) - [j7]Robert Giterman, Yoav Weizman, Adam Teman:
Gain-Cell Embedded DRAM-Based Physical Unclonable Function. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(12): 4208-4218 (2018) - [j6]Robert Giterman, Maoz Vicentowski, Itamar Levi, Yoav Weizman, Osnat Keren, Alexander Fish:
Leakage Power Attack-Resilient Symmetrical 8T SRAM Cell. IEEE Trans. Very Large Scale Integr. Syst. 26(10): 2180-2184 (2018) - [c10]Amir Shalom, Robert Giterman, Adam Teman:
High Density GC-eDRAM Design in 16nm FinFET. ICECS 2018: 585-588 - [c9]Roman Golman, Robert Giterman, Adam Teman:
Configurable Multi-Port Dynamic Bitcell with Internal Refresh Mechanism. ICECS 2018: 589-592 - [c8]Robert Giterman, Roman Golman, Amir Shalom, Or Maltabashi, Alexander Fish, Adam Teman:
Live Demonstration: An 800 Mhz Gain-Cell Embedded DRAM in 28 nm CMOS Bulk Process for Approximate Computing Applications. ISCAS 2018: 1- - [c7]Or Maltabashi, Hanan Marinberg, Robert Giterman, Adam Teman:
A 5-Transistor Ternary Gain-Cell eDRAM with Parallel Sensing. ISCAS 2018: 1-5 - 2017
- [j5]Robert Giterman, Adam Teman, Pascal Meinerzhagen:
Hybrid GC-eDRAM/SRAM Bitcell for Robust Low-Power Operation. IEEE Trans. Circuits Syst. II Express Briefs 64-II(12): 1362-1366 (2017) - [j4]Robert Giterman, Lior Atias, Adam Teman:
Area and Energy-Efficient Complementary Dual-Modular Redundancy Dynamic Memory for Space Applications. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 502-509 (2017) - [c6]Robert Giterman, Alexander Fish, Narkis Geuli, Elad Mentovich, Andreas Burg, Adam Teman:
An 800 Mhz mixed-VT 4T gain-cell embedded DRAM in 28 nm CMOS bulk process for approximate computing applications. ESSCIRC 2017: 308-311 - [c5]Natan Vinshtok-Melnik, Robert Giterman, Joseph Shor:
Ultra miniature offset cancelled bandgap reference with ±0.534% inaccuracy from -10°C to 110°C. ISCAS 2017: 1-4 - 2016
- [j3]Robert Giterman, Adam Teman, Pascal Andreas Meinerzhagen, Lior Atias, Andreas Burg, Alexander Fish:
Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 358-362 (2016) - [j2]Lior Atias, Adam Teman, Robert Giterman, Pascal Meinerzhagen, Alexander Fish:
A Low-Voltage Radiation-Hardened 13T SRAM Bitcell for Ultralow Power Space Applications. IEEE Trans. Very Large Scale Integr. Syst. 24(8): 2622-2633 (2016) - [c4]Robert Giterman, Adam Teman, Pascal Meinerzhagen, Alexander Fish, Andreas Burg:
A process compensated gain cell embedded-DRAM for ultra-low-power variation-aware design. ISCAS 2016: 1006-1009 - 2015
- [c3]Adam Teman, Georgios Karakonstantis, Robert Giterman, Pascal Andreas Meinerzhagen, Andreas Peter Burg:
Energy versus data integrity trade-offs in embedded high-density logic compatible dynamic memories. DATE 2015: 489-494 - [c2]Shrikanth Ganapathy, Adam Teman, Robert Giterman, Andreas Burg, Georgios Karakonstantis:
Approximate computing with unreliable dynamic memories. NEWCAS 2015: 1-4 - 2014
- [j1]Adam Teman, Pascal Andreas Meinerzhagen, Robert Giterman, Alexander Fish, Andreas Burg:
Replica Technique for Adaptive Refresh Timing of Gain-Cell-Embedded DRAM. IEEE Trans. Circuits Syst. II Express Briefs 61-II(4): 259-263 (2014) - [c1]Robert Giterman, Adam Teman, Pascal Andreas Meinerzhagen, Andreas Burg, Alexander Fish:
4T Gain-Cell with internal-feedback for ultra-low retention power at scaled CMOS nodes. ISCAS 2014: 2177-2180
Coauthor Index
aka: Andreas Burg
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2025-01-21 00:23 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
