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2020 – today
- 2024
[j12]Shan Lu
, Danyu Wu, Xuan Guo, Hanbo Jia, Yong Chen, Xinyu Liu:
A 28-nm Dual-Mode Explicit Class-F₂₃ VCO With Low-Loss CM Return Path Achieving 70-400-kHz 1/f³ PN Corner Over 4.9-7.3-GHz TR. IEEE Trans. Very Large Scale Integr. Syst. 32(9): 1749-1753 (2024)- 2023
- [j11]Heng Zhang, Ben He, Xuan Guo, Danyu Wu, Xinyu Liu:
A 1-GS/s 12-bit Single-Channel Pipelined ADC in 28-nm CMOS With Input-Split Fully Differential Ring Amplifier. IEEE Trans. Very Large Scale Integr. Syst. 31(12): 1931-1938 (2023) - [c7]Da Fu, Danyu Wu, Xuan Guo, Hanbo Jia, Jie Fu, Shan Lu, Xinyu Liu:
A 64Gbps 1.36 Vppd 1.44pJ/b Fully CMOS-Style Transmitter with Active Hybrid Driver in 28nm CMOS. MWSCAS 2023: 541-545 - 2021
- [c6]Jian Luan, Danyu Wu, Xuqiang Zheng, Chen Cai, Linzhen Wu, Lei Zhou, Jin Wu, Xinyu Liu:
A Real-Time Output 50-GS/s 8-bit TI-ADC with Dedicated Calibration Techniques and Deterministic Latency. ESSCIRC 2021: 487-490 - [c5]Chen Cai, Xuqiang Zheng, Yong Chen, Danyu Wu, Jian Luan, Lei Zhou, Jin Wu, Xinyu Liu:
A 1.4-Vppd 64-Gb/s PAM-4 Transmitter with 4-Tap Hybrid FFE Employing Fractionally-Spaced Pre-Emphasis and Baud-Spaced De-Emphasis in 28-nm CMOS. ESSCIRC 2021: 527-530 - 2020
- [j10]Ming Luo, Danyu Wu, Weizhong Li, Tao Zeng, Lei Zhou, Lingheng Meng, Xiang Li, Shaohua Yu:
100 Gb/s (4 × 25 Gb/s) real-time coherent UDWDM-PON with a large power budget. JOCN 12(2): A204-A213 (2020) - [j9]Xuqiang Zheng, Fangxu Lv, Lei Zhou, DanYu Wu, Jin Wu, Chun Zhang, Woogeun Rhee, Xinyu Liu:
Frequency-Domain Modeling and Analysis of Injection-Locked Oscillators. IEEE J. Solid State Circuits 55(6): 1651-1664 (2020) - [j8]Xuqiang Zheng, Hao Ding, Feng Zhao, DanYu Wu, Lei Zhou, Jin Wu, Fangxu Lv, Jianye Wang, Xinyu Liu:
A 50-112-Gb/s PAM-4 Transmitter With a Fractional-Spaced FFE in 65-nm CMOS. IEEE J. Solid State Circuits 55(7): 1864-1876 (2020)
2010 – 2019
- 2019
- [j7]Huasen Liu, DanYu Wu, Lei Zhou, Yinkun Huang, Jian Luan, Xuan Guo, Dong Wang, Xuqiang Zheng, Jin Wu, Xinyu Liu:
A 10-GS/s 8-bit 4-way interleaved folding ADC in 0.18 µm SiGe-BiCMOS. IEICE Electron. Express 16(3): 20181079 (2019) - [j6]Huasen Liu, DanYu Wu, Lei Zhou, Jian Luan, Xuan Guo, Dong Wang, Jin Wu, Xinyu Liu:
A 1 GS/s 12-bit pipelined folding ADC with a novel encoding algorithm. IEICE Electron. Express 16(7): 20181150 (2019) - [j5]Dong Wang, Lei Zhou, DanYu Wu, Chonghe Ma, Jinxin Xue, Xuan Guo, Jian Luan, Huasen Liu, Jin Wu, Xinyu Liu:
An 8 GSps 14 bit RF DAC With IM3<-62 dBc up to 3.6 GHz. IEEE Trans. Circuits Syst. II Express Briefs 66-II(5): 768-772 (2019) - [c4]Hao Ding, Xuqiang Zheng, DanYu Wu, Lei Zhou, Jin Wu, Fangxu Lv, Jianye Wang, Xinyu Liu:
A 112-Gb/s PAM-4 Transmitter With a 2-Tap Fractional-Spaced FFE in 65-nm CMOS. ESSCIRC 2019: 195-198 - [c3]DanYu Wu, Lei Zhou, Huasen Liu, Yinkun Huang, Jian Luan, Xuan Guo, Jin Wu, Xinyu Liu:
A 10-GS/s 8-bit SiGe ADC with Isolated 4×4 Analog Input Multiplexer. ISCAS 2019: 1-4 - [c2]Ming Luo, Danyu Wu, Weizhong Li, Tao Zeng, Lei Zhou, Lingheng Meng, Zhixue He, Cai Li, Xiang Li:
Demonstration of Bidirectional Real-Time 100 Gb/s (4×25 Gb/s) Coherent UDWDM-PON with Power Budget of 44 dB. OFC 2019: 1-3 - 2017
- [j4]Xiaoge Zhu, DanYu Wu, Lei Zhou, Yinkun Huang, Jin Wu, Xinyu Liu:
A four-channel time-interleaved 30-GS/s 6-bit ADC in 0.18 μm SiGe BiCMOS technology. Sci. China Inf. Sci. 60(12): 129401 (2017) - [j3]Xiaoge Zhu, Lei Zhou, DanYu Wu, Jin Wu, Xinyu Liu:
A 400-MS/s 10-b 8 interleaved SAR ADC in 0.13 um CMOS. IEICE Electron. Express 14(5): 20170067 (2017) - [j2]Xiaoge Zhu, DanYu Wu, Lei Zhou, Chonghe Ma, Dandan Wang, Jian Luan, Yinkun Huang, Jin Wu, Xinyu Liu:
A 6 mW 325 MS/s 8 bit SAR ADC with background offset calibration. IEICE Electron. Express 14(11): 20170329 (2017) - 2016
- [c1]Lei Zhou, Weizhong Li, DanYu Wu, Fan Jiang, Daojun Xue, Jin Wu, Xinyu Liu:
A 30Gsps 6bit DAC in SiGe BiCMOS technology. ICECS 2016: 37-40 - 2014
- [j1]Fan Jiang, DanYu Wu, Lei Zhou, Jin Wu, Zhi Jin, Xinyu Liu:
A 4-GS/s 8-bit two-channel time-interleaved folding and interpolating ADC. Sci. China Inf. Sci. 57(1): 1-6 (2014)
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