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Fernanda Lima Kastensmidt
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- affiliation: Federal University of Rio Grande do Sul, Porto Alegre, Brazil
Other persons with the same name
- Fernanda Lima — disambiguation page
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2020 – today
- 2024
- [c151]Victor O. Costa, Fabio Benevenuti, Renan Menezes, Lidia Shibuya Sato, Luis Loures, Fernanda Lima Kastensmidt, Nemitala Added, Saulo G. Alberton, Vitor A. P. Aguiar, Nilberto H. Medina:
Heavy Ion-Induced Faults on Programmable UART Controllers Embedded into SRAM-Based FPGA. LATS 2024: 1-6 - [c150]Leonardo R. Gobatto, Fabio Benevenuti, Nemitala Added, Saulo G. Alberton, Eduardo L. A. Macchione, Vitor A. P. Aguiar, Nilberto H. Medina, Fernanda Lima Kastensmidt, José Rodrigo Azambuja:
Reliability Assessment of Arm Cortex-M Processors under Heavy Ions and Emulated Fault Injection. LATS 2024: 1-6 - [c149]Eduardo Marañon Aguilar, Fabio Benevenuti, Fernanda Lima Kastensmidt:
Hardening a RISC-V Softcore for Embedded Aerospace Applications in SRAM-based FPGA. SBCCI 2024: 1-5 - [c148]Arthur F. Ely, Fabio Benevenuti, Guilherme Korol, Antonio Carlos S. Beck, José Rodrigo Azambuja, Fernanda Lima Kastensmidt:
Image Classification CNNs using the FINN Engine for SRAM-based APSoC in Satellite Applications. SBCCI 2024: 1-5 - [c147]Leonardo R. Gobatto, Fabio Benevenuti, Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, José Rodrigo Azambuja:
Early Neutron Reliability Assessment of an Arm Cortex-M4 through Emulated Fault Injection. SBCCI 2024: 1-5 - [c146]Ian Kersz, Henry Piceni, Michael Guilherme Jordan, José Rodrigo Azambuja, Fernanda Lima Kastensmidt, Antonio Carlos S. Beck:
ADARE: Adaptive Resource Provisioning in Multi-FPGA Edge Environments. SBCCI 2024: 1-5 - 2023
- [c145]Bernardo Borges Sandoval, Leonardo Heitich Brendler, Fernanda Lima Kastensmidt, Ricardo Reis, Alexandra L. Zimpeck, Rafael B. Schvittz, Cristina Meinhardt:
Impact on Radiation Robustness of Gate Mapping in FinFET Circuits under Work-function Fluctuation. ISCAS 2023: 1-5 - [i2]José Rodrigo Azambuja, Fernando Sousa, Lucas Rosa, Fernanda Lima Kastensmidt:
Evaluating the Efficiency of Software-only Techniques to Detect SEU and SET in Microprocessors. CoRR abs/2309.16876 (2023) - 2021
- [j36]Carlos J. González, Bruno L. Costa, Diego N. Machado, Rafael Galhardo Vaz, Alexis C. Vilas Bôas, Odair Lelis Gonçalez, Helmut Puchner, Fernanda Lima Kastensmidt, Nilberto H. Medina, Marcilei Aparecida Guazzelli, Tiago Roberto Balen:
Failure Mechanism and Sampling Frequency Dependency on TID Response of SAR ADCs. J. Electron. Test. 37(3): 329-343 (2021) - [c144]Leonardo Heitich Brendler, Alexandra L. Zimpeck, Fernanda Lima Kastensmidt, Cristina Meinhardt, Ricardo A. L. Reis:
Voltage Scaling Influence on the Soft Error Susceptibility of a FinFET-based Circuit. LASCAS 2021: 1-4 - [c143]Augusto W. Hoppe, Jürgen Becker, Fernanda Lima Kastensmidt:
High-speed Hardware Accelerator for Trace Decoding in Real-Time Program Monitoring. LASCAS 2021: 1-4 - [c142]Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Alberto Bosio:
Approximate Computing for Safety-Critical Applications. LATS 2021: 1-3 - [c141]Bernardo Borges Sandoval, Leonardo Heitich Brendler, Alexandra L. Zimpeck, Fernanda Lima Kastensmidt, Ricardo Reis, Cristina Meinhardt:
Exploring Gate Mapping and Transistor Sizing to Improve Radiation Robustness: A C17 Benchmark Case-study. LATS 2021: 1-6 - [c140]Emmanuel Casseau, Petr Dobiás, Oliver Sinnen, Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Alessandro Savino, Stefano Di Carlo, Maurizio Rebaudengo, Alberto Bosio:
Special Session: Operating Systems under test: an overview of the significance of the operating system in the resiliency of the computing continuum. VTS 2021: 1-10 - 2020
- [c139]Marcio M. Gonçalves, Fabio Benevenuti, Hector Gerardo Muñoz Hernandez, Marcelo Brandalero, Michael Hübner, Fernanda Lima Kastensmidt, José Rodrigo Azambuja:
Investigating Floating-Point Implementations in a Softcore GPU under Radiation-Induced Faults. ICECS 2020: 1-4 - [c138]Augusto W. Hoppe, Jürgen Becker, Fernanda Lima Kastensmidt:
Fine Grained Control Flow Checking with Dedicated FPGA Monitors. SoCC 2020: 219-224
2010 – 2019
- 2019
- [j35]Gennaro Severino Rodrigues, Ádria Barros de Oliveira, Fernanda Lima Kastensmidt, Vincent Pouget, Alberto Bosio:
Assessing the Reliability of Successive Approximate Computing Algorithms under Fault Injection. J. Electron. Test. 35(3): 367-381 (2019) - [c137]Alberto Bosio, Ian O'Connor, Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Elena I. Vatajelu, Giorgio Di Natale, Lorena Anghel, Surya Nagarajan, Moritz Fieback, Said Hamdioui:
Rebooting Computing: The Challenges for Test and Reliability. DFT 2019: 8138-8143 - [c136]Alexandra L. Zimpeck, Cristina Meinhardt, Laurent Artola, Guillaume Hubert, Fernanda Lima Kastensmidt, Ricardo Augusto da Luz Reis:
Sleep Transistors to Improve the Process Variability and Soft Error Susceptibility. ICECS 2019: 582-585 - [c135]Fabio Benevenuti, Eduardo Chielle, Jorge L. Tonfat, Lucas A. Tambara, Fernanda Lima Kastensmidt, Carlos Alberto Zaffari, João Baptista dos Santos Martins, Otávio Santos Cupertino Durão:
Experimental Applications on SRAM-Based FPGA for the NanosatC-BR2 Scientific Mission. IPDPS Workshops 2019: 140-146 - [c134]Fabio Benevenuti, Fernanda Lima Kastensmidt:
Comparing Exhaustive and Random Fault Injection Methods for Configuration Memory on SRAM-based FPGAs. LATS 2019: 1-6 - [c133]Gennaro Severino Rodrigues, Juan Fonseca, Fabio Benevenuti, Fernanda Lima Kastensmidt, Alberto Bosio:
Exploiting approximate computing for low-cost fault tolerant architectures. SBCCI 2019: 3 - [c132]Alexandra L. Zimpeck, Cristina Meinhardt, Laurent Artola, Guillaume Hubert, Fernanda Lima Kastensmidt, Ricardo Augusto da Luz Reis:
Circuit-Level Techniques to Mitigate Process Variability and Soft Errors in FinFET Designs. VLSI-SoC 2019: 240-241 - 2018
- [j34]Alexandra L. Zimpeck, Cristina Meinhardt, Laurent Artola, Guillaume Hubert, Fernanda Lima Kastensmidt, Ricardo Augusto da Luz Reis:
Impact of different transistor arrangements on gate variability. Microelectron. Reliab. 88-90: 111-115 (2018) - [j33]Iuri Albandes Cunha Gomes, Alejandro Serrano-Cases, Mayler G. A. Martins, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi, Fernanda Lima Kastensmidt:
Design of approximate-TMR using approximate library and heuristic approaches. Microelectron. Reliab. 88-90: 898-902 (2018) - [c131]Antonio Sanchez-Clemente, Luis Entrena, Fernanda Lima Kastensmidt:
Approximate TMR for selective error mitigation in FPGAs based on testability analysis. AHS 2018: 112-119 - [c130]Fabio Benevenuti, Fernanda Lima Kastensmidt:
Analyzing AXI Streaming Interface for Hardware Acceleration in AP-SoC Under Soft Errors. ARC 2018: 243-254 - [c129]Augusto W. Hoppe, Fernanda Lima Kastensmidt, Jürgen Becker:
Control Flow Analysis for Embedded Multi-core Hybrid Systems. ARC 2018: 485-496 - [c128]Gennaro Severino Rodrigues, Ádria Barros de Oliveira, Fernanda Lima Kastensmidt, Alberto Bosio:
Analyzing the Use of Taylor Series Approximation in Hardware and Embedded Software for Good Cost-Accuracy Tradeoffs. ARC 2018: 647-658 - [c127]Gennaro Severino Rodrigues, Ádria Barros de Oliveira, Alberto Bosio, Fernanda Lima Kastensmidt, Edison Pignaton de Freitas:
ARFT: An Approximative Redundant Technique for Fault Tolerance. DCIS 2018: 1-6 - [c126]Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Vincent Pouget, Alberto Bosio:
Performances VS Reliability: how to exploit Approximate Computing for Safety-Critical applications. IOLTS 2018: 291-294 - [c125]Fabio Benevenuti, Fernanda Lima Kastensmidt:
Reliability evaluation on interfacing with AXI and AXI-S on Xilinx Zynq-7000 AP-SoC. LATS 2018: 1-6 - [c124]Luis Alberto Contreras Benites, Fernanda Lima Kastensmidt:
Automated design flow for applying Triple Modular Redundancy (TMR) in complex digital circuits. LATS 2018: 1-4 - [c123]Iuri Albandes Cunha Gomes, Alejandro Serrano-Cases, Antonio J. Sanchez-Clemente, Mayler G. A. Martins, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi, Fernanda Lima Kastensmidt:
Improving approximate-TMR using multi-objective optimization genetic algorithm. LATS 2018: 1-6 - [c122]Israel C. Lopes, Fabio Benevenuti, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Paolo Rech:
Reliability analysis on case-study traffic sign convolutional neural network on APSoC. LATS 2018: 1-6 - [c121]Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Vincent Pouget, Alberto Bosio:
Exploring the inherent fault tolerance of successive approximation algorithms under laser fault injection. LATS 2018: 1-6 - [c120]Fabio Benevenuti, Fabiano Libano, Vincent Pouget, Fernanda Lima Kastensmidt, Paolo Rech:
Comparative Analysis of Inference Errors in a Neural Network Implemented in SRAM-Based FPGA Induced by Neutron Irradiation and Fault Injection Methods. SBCCI 2018: 1-6 - 2017
- [j32]Jorge L. Tonfat, Lucas A. Tambara, André Santos, Fernanda Lima Kastensmidt:
Soft error susceptibility analysis methodology of HLS designs in SRAM-based FPGAs. Microprocess. Microsystems 51: 209-219 (2017) - [j31]Lucas A. Tambara, Eduardo Chielle, Fernanda Lima Kastensmidt, Georgios Tsiligiannis, Salvatore Danzeca, Markus Brugger, A. Masi:
Analyzing the impact of radiation-induced failures in flash-based APSoC with and without fault tolerance techniques at CERN environment. Microelectron. Reliab. 76-77: 640-643 (2017) - [j30]Y. Q. de Aguiar, Laurent Artola, Guillaume Hubert, Cristina Meinhardt, Fernanda Lima Kastensmidt, Ricardo Augusto da Luz Reis:
Evaluation of radiation-induced soft error in majority voters designed in 7 nm FinFET technology. Microelectron. Reliab. 76-77: 660-664 (2017) - [j29]Marcio Gonçalves, Mateus Saquetti, Fernanda Lima Kastensmidt, José Rodrigo Azambuja:
A low-level software-based fault tolerance approach to detect SEUs in GPUs' register files. Microelectron. Reliab. 76-77: 665-669 (2017) - [c119]Ádria Barros de Oliveira, Lucas Antunes Tambara, Fernanda Lima Kastensmidt:
Exploring Performance Overhead Versus Soft Error Detection in Lockstep Dual-Core ARM Cortex-A9 Processor Embedded into Xilinx Zynq APSoC. ARC 2017: 189-201 - [c118]André Flores dos Santos, Lucas Antunes Tambara, Fabio Benevenuti, Jorge L. Tonfat, Fernanda Lima Kastensmidt:
Applying TMR in Hardware Accelerators Generated by High-Level Synthesis Design Flow for Mitigating Multiple Bit Upsets in SRAM-Based FPGAs. ARC 2017: 202-213 - [c117]Y. Q. de Aguiar, Fernanda Lima Kastensmidt, Cristina Meinhardt, Ricardo A. L. Reis:
SET response of FinFET-based majority voter circuits under work-function fluctuation. ICECS 2017: 282-285 - [c116]Gennaro Severino Rodrigues, Felipe Rosa, Fernanda Lima Kastensmidt, Ricardo Reis, Luciano Ost:
Investigating parallel TMR approaches and thread disposability in Linux. ICECS 2017: 393-396 - [c115]Vicente Carvalho, Fernanda Lima Kastensmidt:
Enhancing I2C robustness to soft errors. LASCAS 2017: 1-4 - [c114]Ádria Barros de Oliveira, Lucas Antunes Tambara, Fernanda Lima Kastensmidt:
Applying lockstep in dual-core ARM Cortex-A9 to mitigate radiation-induced soft errors. LASCAS 2017: 1-4 - [c113]André Flores dos Santos, Lucas Antunes Tambara, Fernanda Lima Kastensmidt:
Evaluating the efficiency of using TMR in the high-level synthesis design flow of SRAM-based FPGA. LASCAS 2017: 1-4 - [c112]Fabio Benevenuti, Fernanda Lima Kastensmidt:
Evaluation of fault attack detection on SRAM-based FPGAs. LATS 2017: 1-6 - [c111]Luis Alberto Contreras Benites, Fernanda Lima Kastensmidt:
Fault injection methodology for single event effects on clock-gated ASICs. LATS 2017: 1-4 - [c110]Israel C. Lopes, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin:
SEU susceptibility analysis of a feedforward neural network implemented in a SRAM-based FPGA. LATS 2017: 1-6 - [c109]Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt:
Evaluating the behavior of successive approximation algorithms under soft errors. LATS 2017: 1-6 - [c108]Ádria Barros de Oliveira, Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt:
Analyzing lockstep dual-core ARM cortex-A9 soft error mitigation in freeRTOS applications. SBCCI 2017: 84-89 - 2016
- [j28]Anderson L. Sartor, Arthur Francisco Lorenzon, Luigi Carro, Fernanda Lima Kastensmidt, Stephan Wong, Antonio C. S. Beck:
Exploiting Idle Hardware to Provide Low Overhead Fault Tolerance for VLIW Processors. ACM J. Emerg. Technol. Comput. Syst. 13(2): 13:1-13:21 (2016) - [c107]Jorge L. Tonfat, Lucas A. Tambara, André Flores dos Santos, Fernanda Gusmão de Lima Kastensmidt:
Method to Analyze the Susceptibility of HLS Designs in SRAM-Based FPGAs Under Soft Errors. ARC 2016: 132-143 - [c106]Anelise Kologeski, Henrique Colao Zanuz, Fernanda Lima Kastensmidt:
Using traffic monitoring to tolerate multiple faults in 3D NoCs. LATS 2016: 63-68 - [c105]Werner Nedel, Fernanda Lima Kastensmidt, José Rodrigo Azambuja:
Evaluating the effects of single event upsets in soft-core GPGPUs. LATS 2016: 93-98 - [c104]Eduardo Chielle, Boyang Du, Fernanda Lima Kastensmidt, Sergio Cuenca-Asensi, Luca Sterpone, Matteo Sonza Reorda:
Hybrid soft error mitigation techniques for COTS processor-based systems. LATS 2016: 99-104 - [c103]Luiz Gustavo Casagrande, Fernanda Lima Kastensmidt:
Soft error analysis in embedded software developed with & without operating system. LATS 2016: 147-152 - [c102]Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt:
Soft error analysis at sequential and parallel applications in ARM Cortex-A9 dual-core. LATS 2016: 179 - 2015
- [j27]Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez, Eduardo Chielle, Fernanda Lima Kastensmidt:
Application-Based Analysis of Register File Criticality for Reliability Assessment in Embedded Microprocessors. J. Electron. Test. 31(2): 139-150 (2015) - [j26]Felipe Rosa, Raphael Martins Brum, Gilson I. Wirth, Fernanda Gusmão de Lima Kastensmidt, Luciano Ost, Ricardo Reis:
Impact of dynamic voltage scaling and thermal factors on SRAM reliability. Microelectron. Reliab. 55(9-10): 1486-1490 (2015) - [j25]Iuri A. C. Gomes, Mayler G. A. Martins, André Inácio Reis, Fernanda Lima Kastensmidt:
Exploring the use of approximate TMR to mask transient faults in logic with low area overhead. Microelectron. Reliab. 55(9-10): 2072-2076 (2015) - [j24]Cristiano P. Chenet, Lucas A. Tambara, Gabriel de M. Borges, Fernanda Lima Kastensmidt, Marcelo Soares Lubaszewski, Tiago R. Balen:
Exploring design diversity redundancy to improve resilience in mixed-signal systems. Microelectron. Reliab. 55(12): 2833-2844 (2015) - [c101]Jorge L. Tonfat, Fernanda Lima Kastensmidt, Ricardo Reis:
Energy efficient frame-level redundancy scrubbing technique for SRAM-based FPGAs. AHS 2015: 1-8 - [c100]Lucas A. Tambara, Felipe Almeida, Paolo Rech, Fernanda Lima Kastensmidt, Giovanni Bruni, Christopher Frost:
Measuring Failure Probability of Coarse and Fine Grain TMR Schemes in SRAM-based FPGAs Under Neutron-Induced Effects. ARC 2015: 331-338 - [c99]Felipe Rosa, Fernanda Lima Kastensmidt, Ricardo Reis, Luciano Ost:
A fast and scalable fault injection framework to evaluate multi/many-core soft error reliability. DFTS 2015: 211-214 - [c98]Anderson Luiz Sartor, Arthur Francisco Lorenzon, Luigi Carro, Fernanda Gusmão de Lima Kastensmidt, Stephan Wong, Antonio Carlos Schneider Beck:
A Novel Phase-Based Low Overhead Fault Tolerance Approach for VLIW Processors. ISVLSI 2015: 485-490 - [c97]Alexandra L. Zimpeck, Fernanda Lima Kastensmidt, Ricardo Reis:
Analyzing the Impact of Frequency and Diverse Path Delays in the Time Vulnerability Factor of Master-Slave D Flip-Flops. ISVLSI 2015: 521-526 - [c96]Thiago Berticelli Lo, Fernanda Lima Kastensmidt, Antonio Carlos Schneider Beck:
Using Configurable Bit-Width Voters to Mask Multiple Errors in Integrated Circuits. ISVLSI 2015: 533-538 - [c95]Iuri A. C. Gomes, Mayler G. A. Martins, André Inácio Reis, Fernanda Lima Kastensmidt:
Using only redundant modules with approximate logic to reduce drastically area overhead in TMR. LATS 2015: 1-6 - [c94]Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez, Fernanda Lima Kastensmidt:
Considerations on application of selective hardening based on software fault tolerance techniques. LATS 2015: 1-6 - [c93]Jimmy Tarrillo, Jorge L. Tonfat, Lucas A. Tambara, Fernanda Lima Kastensmidt, Ricardo Reis:
Multiple fault injection platform for SRAM-based FPGA based on ground-level radiation experiments. LATS 2015: 1-6 - [c92]Anelise Kologeski, Henrique Colao Zanuz, Fernanda Lima Kastensmidt:
Latency Improvement with Traffic Flow Analysis in a 3D NoC under Multiple Faulty TSVs Scenario. SBCCI 2015: 29:1-29:6 - 2014
- [j23]José Rodrigo Azambuja, Gustavo Brown, Fernanda Lima Kastensmidt, Luigi Carro:
Algorithm transformation methods to reduce the overhead of software-based fault tolerance techniques. Microelectron. Reliab. 54(5): 1050-1055 (2014) - [j22]Fernanda Lima Kastensmidt, Jorge L. Tonfat, Thiago Hanna Both, Paolo Rech, Gilson I. Wirth, Ricardo Reis, Florent Bruguier, Pascal Benoit, Lionel Torres, Christopher Frost:
Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs. Microelectron. Reliab. 54(9-10): 2344-2348 (2014) - [c91]Lucas A. Tambara, Fernanda Lima Kastensmidt, Paolo Rech, Christopher Frost:
Decreasing FIT with diverse triple modular redundancy in SRAM-based FPGAs. DFT 2014: 153-158 - [c90]Thiago Berticelli Lo, Fernanda Lima Kastensmidt, Antonio Carlos Schneider Beck:
Towards an adaptable bit-width NMR voter for multiple error masking. DFT 2014: 258-263 - [c89]Fernanda Lima Kastensmidt, Jorge L. Tonfat, Thiago Hanna Both, Paolo Rech, Gilson I. Wirth, Ricardo Reis, Florent Bruguier, Pascal Benoit, Lionel Torres, Christopher Frost:
Aging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAs. ETS 2014: 1-2 - [c88]Raul Chipana, Fernanda Gusmão de Lima Kastensmidt:
SET Susceptibility Analysis of Clock Tree and Clock Mesh Topologies. ISVLSI 2014: 559-564 - [c87]Jimmy Tarrillo, Fernando A. Escobar, Fernanda Lima Kastensmidt, Carlos Valderrama:
Dynamic partial reconfiguration manager. LASCAS 2014: 1-4 - [c86]Filipe de Aguiar Geissler, Fernanda Lima Kastensmidt, Jose Eduardo Pereira Souza:
Soft error injection methodology based on QEMU software platform. LATW 2014: 1-5 - [c85]Iuri A. C. Gomes, Mayler G. A. Martins, Fernanda Lima Kastensmidt, André Inácio Reis, Renato P. Ribas, Sylvain P. Novales:
Methodology for achieving best trade-off of area and fault masking coverage in ATMR. LATW 2014: 1-6 - [c84]Werner Nedel, Fernanda Lima Kastensmidt, José Rodrigo Azambuja:
Implementation and experimental evaluation of a CUDA core under single event effects. LATW 2014: 1-4 - [c83]Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez, Eduardo Chielle, Fernanda Lima Kastensmidt:
Efficient metric for register file criticality in processor-based systems. LATW 2014: 1-6 - [c82]Lucas A. Tambara, Jorge L. Tonfat, Ricardo Reis, Fernanda Lima Kastensmidt, Evaldo Carlos Fonseca Pereira, Rafael Galhardo Vaz, Odair Lelis Goncalez:
Soft error rate in SRAM-based FPGAs under neutron-induced and TID effects. LATW 2014: 1-6 - [c81]Anelise Kologeski, Fernanda Lima Kastensmidt, Vianney Lapotre, Abdoulaye Gamatié, Gilles Sassatelli, Aida Todri-Sanial:
Performance exploration of partially connected 3D NoCs under manufacturing variability. NEWCAS 2014: 61-64 - [c80]Eduardo Chielle, Fernanda Lima Kastensmidt, Sergio Cuenca-Asensi:
Tuning software-based fault-tolerance techniques for power optimization. PATMOS 2014: 1-7 - [c79]Jimmy Tarrillo, Fernanda Lima Kastensmidt:
Estimating power consumption of multiple modular redundant designs in SRAM-based FPGAs for high dependable applications. PATMOS 2014: 1-7 - [c78]Giovanni Bruni, Paolo Rech, Lucas A. Tambara, Gabriel L. Nazar, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis, Alessandro Paccagnella:
Power dissipation effects on 28nm FPGA-based System on Chips neutron sensitivity. VLSI-SoC 2014: 1-6 - 2013
- [j21]Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Márcio Eduardo Kreutz, Fernanda Gusmão de Lima Kastensmidt, Altamiro Amadeu Susin:
A NOC closed-loop performance monitor and adapter. Microprocess. Microsystems 37(6-7): 661-671 (2013) - [c77]Anelise Kologeski, Caroline Concatto, Debora Matos, Daniel Grehs, Tiago Motta, Felipe Almeida, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Ricardo Reis:
Combining fault tolerance and serialization effort to improve yield in 3D Networks-on-Chip. ICECS 2013: 125-128 - [c76]José Rodrigo Azambuja, Gustavo Brown, Fernanda Lima Kastensmidt, Luigi Carro:
Algorithm transformation methods to reduce software-only fault tolerance techniques' overhead. IOLTS 2013: 1-6 - [c75]Fernanda Lima Kastensmidt, Ricardo Reis, Leandro Soares Indrusiak, Gilles Sassatelli:
Message from the general and program chairs. ISVLSI 2013 - [c74]Jimmy Tarrillo, Jorge L. Tonfat, Fernanda Lima Kastensmidt, Ricardo Reis, Florent Bruguier, Morgan Bourree, Pascal Benoit, Lionel Torres:
Using electromagnetic emanations for variability characterization in Flash-based FPGAs. ISVLSI 2013: 109-114 - [c73]Lucas A. Tambara, Fernanda Lima Kastensmidt, Paolo Rech, Tiago R. Balen, Marcelo Lubaszewski:
Neutron-induced single event effects analysis in a SAR-ADC architecture embedded in a mixed-signal SoC. ISVLSI 2013: 188-193 - [c72]Eduardo Chielle, José Rodrigo Azambuja, Raul S. Barth, Fernanda Lima Kastensmidt:
Improving error detection with selective redundancy in software-based techniques. LATW 2013: 1-6 - [c71]Iuri A. C. Gomes, Fernanda Gusmão de Lima Kastensmidt:
Reducing TMR overhead by combining approximate circuit, transistor topology and input permutation approaches. SBCCI 2013: 1-6 - 2012
- [c70]Raul Chipana, Eduardo Chielle, Fernanda Lima Kastensmidt, Jorge L. Tonfat, Ricardo Reis:
Soft-Error Probability Due to SET in Clock Tree Networks. ISVLSI 2012: 338-343 - [c69]Walter E. Calienes Bartra, Fernanda Lima Kastensmidt, Ricardo Reis:
Simulation of SET faults in a voltage controlled oscillator. LATW 2012: 1-6 - [c68]Eduardo Chielle, Raul Sergio Barth, Angelo Cardoso Lapolli, Fernanda Lima Kastensmidt:
Configurable tool to protect processors against SEE by software-based detection techniques. LATW 2012: 1-6 - [c67]Raul Chipana, Fernanda Lima Kastensmidt, Jorge L. Tonfat, Ricardo Reis:
SET susceptibility estimation of clock tree networks from layout extraction. LATW 2012: 1-6 - [c66]Jose Eduardo Pereira Souza, Fernanda Lima Kastensmidt:
Applying adaptive temporal filtering for SET mitigation based on the propagation-delay of every logical path. LATW 2012: 1-6 - [c65]Anelise Kologeski, Caroline Concatto, Fernanda Lima Kastensmidt, Luigi Carro:
ATARDS: An adaptive fault-tolerant strategy to cope with massive defects in Network-on-Chip interconnections. VLSI-SoC 2012: 24-29 - [c64]Anelise Kologeski, Caroline Concatto, Fernanda Lima Kastensmidt, Luigi Carro:
Fault-Tolerant Techniques to Manage Yield and Power Constraints in Network-on-Chip Interconnections. VLSI-SoC (Selected Papers) 2012: 144-161 - 2011
- [j20]José Rodrigo Azambuja, Samuel Pagliarini, Lucas Rosa, Fernanda Lima Kastensmidt:
Exploring the Limitations of Software-based Techniques in SEE Fault Coverage. J. Electron. Test. 27(4): 541-550 (2011) - [j19]Marcos Barcellos Hervé, Marcelo de Souza Moraes, Pedro Almeida, Marcelo Lubaszewski, Fernanda Lima Kastensmidt, Érika F. Cota:
Functional Test of Mesh-Based NoCs with Deterministic Routing: Integrating the Test of Interconnects and Routers. J. Electron. Test. 27(5): 635-646 (2011) - [j18]Víctor H. Champac, Fernanda Gusmão de Lima Kastensmidt, Letícia Maria Veiras Bolzani Poehls, Fabian Vargas, Yervant Zorian:
12th "IEEE Latin-American Test Workshop" Porto de Galinhas, Brazil, 27-30 March 2011. J. Low Power Electron. 7(4): 529-530 (2011) - [j17]Caroline Concatto, João Almeida, Guilherme Fachini, Marcos Hervé, Fernanda Lima Kastensmidt, Érika F. Cota, Marcelo Lubaszewski:
Improving the yield of NoC-based systems through fault diagnosis and adaptive routing. J. Parallel Distributed Comput. 71(5): 664-674 (2011) - [j16]Debora Matos, Caroline Concatto, Márcio Eduardo Kreutz, Fernanda Lima Kastensmidt, Luigi Carro, Altamiro Amadeu Susin:
Reconfigurable Routers for Low Power and High Performance. IEEE Trans. Very Large Scale Integr. Syst. 19(11): 2045-2057 (2011) - [c63]Anelise Kologeski, Caroline Concatto, Luigi Carro, Fernanda Lima Kastensmidt:
Improving Reliability in NoCs by Application-Specific Mapping Combined with Adaptive Fault-Tolerant Method in the Links. ETS 2011: 123-128 - [c62]José Rodrigo Azambuja, Angelo Cardoso Lapolli, Maurício Altieri, Fernanda Lima Kastensmidt:
Evaluating the efficiency of data-flow software-based techniques to detect SEEs in microprocessors. LATW 2011: 1-6 - [c61]Anelise Kologeski, Caroline Concatto, Luigi Carro, Fernanda Lima Kastensmidt:
Adaptive approach to tolerate multiple faulty links in Network-on-Chip. LATW 2011: 1-6 - [c60]Samuel Nascimento Pagliarini, Paulo André Haacke, Fernanda Lima Kastensmidt:
Evaluating coverage collection using the VEasy functional verification tool suite. LATW 2011: 1-6 - [c59]Jimmy Tarrillo, Raul Chipana, Eduardo Chielle, Fernanda Lima Kastensmidt:
Designing and analyzing a SpaceWire router IP for soft errors detection. LATW 2011: 1-6 - [c58]Samuel Nascimento Pagliarini, Fernanda Lima Kastensmidt:
VEasy: A tool suite for teaching VLSI functional verification. MSE 2011: 94-97 - [c57]José Rodrigo Azambuja, Samuel Pagliarini, Maurício Altieri, Fernanda Lima Kastensmidt, Michael Hübner, Jürgen Becker:
Using dynamic partial reconfiguration to detect sees in microprocessors through non-intrusive hybrid technique. SBCCI 2011: 161-166 - [c56]Anelise Kologeski, Caroline Concatto, Fernanda Lima Kastensmidt, Luigi Carro:
AdNoC case-study for Mpeg4 benchmark: improving performance and saving energy with an adaptive NoC. SBCCI 2011: 209-214 - [c55]Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Lima Kastensmidt, Gianluca Palermo, Cristina Silvano:
Two-levels of adaptive buffer for virtual channel router in NoCs. VLSI-SoC 2011: 302-307 - 2010
- [j15]Rodrigo Possamai Bastos, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis:
Asynchronous circuits as alternative for mitigation of long-duration transient faults in deep-submicron technologies. Microelectron. Reliab. 50(9-11): 1241-1246 (2010) - [c54]Rodrigo Possamai Bastos, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis:
Evaluating transient-fault effects on traditional C-element's implementations. IOLTS 2010: 35-40 - [c53]Matheus Braga, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski:
Efficiently using data splitting and retransmission to tolerate faults in networks-on-chip interconnects. ISCAS 2010: 4101-4104 - [c52]José Rodrigo Azambuja, Fernando Sousa, Lucas Rosa, Fernanda Lima Kastensmidt:
The limitations of software signature and basic block sizing in soft error fault coverage. LATW 2010: 1-8 - [c51]Marcos Hervé, Pedro Almeida, Fernanda Lima Kastensmidt, Érika F. Cota, Marcelo Lubaszewski:
Concurrent test of Network-on-Chip interconnects and routers. LATW 2010: 1-6 - [c50]Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Márcio Eduardo Kreutz:
Monitor-adapter coupling for NOC performance tuning. ICSAMOS 2010: 193-199 - [c49]Mariza Botelho, Fernanda Lima Kastensmidt, Marcelo Lubaszewski, Érika F. Cota, Luigi Carro:
A broad strategy to detect crosstalk faults in network-on-chip interconnects. VLSI-SoC 2010: 298-303
2000 – 2009
- 2009
- [j14]Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis:
Design of a soft-error robust microprocessor. Microelectron. J. 40(7): 1062-1068 (2009) - [c48]Debora Matos, Caroline Concatto, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin:
The Need for Reconfigurable Routers in Networks-on-Chip. ARC 2009: 275-280 - [c47]Francesco Abate, Luca Sterpone, Massimo Violante, Fernanda Lima Kastensmidt:
A study of the Single Event Effects impact on functional mapping within Flash-based FPGAs. DATE 2009: 1226-1229 - [c46]Rodrigo Possamai Bastos, Yannick Monnet, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis:
Comparing transient-fault effects on synchronous and on asynchronous circuits. IOLTS 2009: 29-34 - [c45]Caroline Concatto, Pedro Almeida, Fernanda Lima Kastensmidt, Érika F. Cota, Marcelo Lubaszewski, Marcos Hervé:
Improving yield of torus nocs through fault-diagnosis-and-repair of interconnect faults. IOLTS 2009: 61-66 - [c44]José Rodrigo Azambuja, Fernando Sousa, Lucas Rosa, Fernanda Lima Kastensmidt:
Evaluating large grain TMR and selective partial reconfiguration for soft error mitigation in SRAM-based FPGAs. IOLTS 2009: 101-106 - [c43]Caroline Concatto, Debora Matos, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Márcio Eduardo Kreutz:
NoC Power Optimization Using a Reconfigurable Router. ISVLSI 2009: 235-240 - [c42]Thiago Assis, Fernanda Lima Kastensmidt, Gilson I. Wirth, Ricardo Reis:
Measuring the effectiveness of symmetric and asymmetric transistor sizing for Single Event Transient mitigation in CMOS 90nm technologies. LATW 2009: 1-6 - [c41]Marcos Barcellos Hervé, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski:
NoC interconnection functional testing: Using boundary-scan to reduce the overall testing time. LATW 2009: 1-6 - [c40]Debora Matos, Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Márcio Eduardo Kreutz:
Adaptive router architecture based on traffic behavior observability. NoCArc@MICRO 2009: 17-22 - [c39]Marcos Hervé, Érika F. Cota, Fernanda Lima Kastensmidt, Marcelo Lubaszewski:
Diagnosis of interconnect shorts in mesh NoCs. NOCS 2009: 256-265 - [c38]Caroline Concatto, Debora Matos, Luigi Carro, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Érika F. Cota, Márcio Eduardo Kreutz:
Fault tolerant mechanism to improve yield in NoCs using a reconfigurable router. SBCCI 2009 - 2008
- [j13]Lorenzo Petroli, Carlos Arthur Lang Lisbôa, Fernanda Lima Kastensmidt, Luigi Carro:
Majority Logic Mapping for Soft Error Dependability. J. Electron. Test. 24(1-3): 83-92 (2008) - [j12]Egas Henes Neto, Gilson I. Wirth, Fernanda Lima Kastensmidt:
Mitigating Soft Errors in SRAM Address Decoders Using Built-in Current Sensors. J. Electron. Test. 24(5): 425-437 (2008) - [j11]Gilson I. Wirth, Michele G. Vieira, Egas Henes Neto, Fernanda Lima Kastensmidt:
Modeling the sensitivity of CMOS circuits to radiation induced single event transients. Microelectron. Reliab. 48(1): 29-36 (2008) - [j10]Érika F. Cota, Fernanda Gusmão de Lima Kastensmidt, Maico Cassel, Marcos Hervé, Pedro Almeida, Paulo Meirelles, Alexandre M. Amory, Marcelo Lubaszewski:
A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip. IEEE Trans. Computers 57(9): 1202-1215 (2008) - [c37]Carlos Arthur Lang Lisbôa, Fernanda Gusmão de Lima Kastensmidt, Luigi Carro:
Analyzing the effects of the granularity of recomputation based techniques to cope with radiation induced soft errors. WREFT@CF 2008: 329-338 - [c36]Conrado Pilotto, José Rodrigo Azambuja, Fernanda Lima Kastensmidt:
Synchronizing triple modular redundant designs in dynamic partial reconfiguration applications. SBCCI 2008: 199-204 - [e1]Fernanda Lima Kastensmidt, Greg Bronevetsky:
Proceedings of the 2008 Workshop on Radiation Effects and Fault Tolerance in Nanometer Technologies, WREFT '08, Ischia, Italy, May 5-7, 2008. ACM 2008, ISBN 978-1-60558-092-0 [contents] - 2007
- [j9]Arthur Pereira Frantz, Maico Cassel, Fernanda Lima Kastensmidt, Érika F. Cota, Luigi Carro:
Crosstalk- and SEU-Aware Networks on Chips. IEEE Des. Test Comput. 24(4): 340-350 (2007) - [j8]Luca Sterpone, Matteo Sonza Reorda, Massimo Violante, Fernanda Lima Kastensmidt, Luigi Carro:
Evaluating Different Solutions to Design Fault Tolerant Systems with SRAM-based FPGAs. J. Electron. Test. 23(1): 47-54 (2007) - [j7]Gilson I. Wirth, Michele G. Vieira, Fernanda Gusmão de Lima Kastensmidt:
Accurate and computer efficient modelling of single event transients in CMOS circuits. IET Circuits Devices Syst. 1(2): 137-142 (2007) - [c35]Henrique C. Freitas, Dalton M. Colombo, Fernanda Lima Kastensmidt, Philippe Olivier Alexandre Navaux:
Evaluating Network-on-Chip for Homogeneous Embedded Multiprocessors in FPGAs. ISCAS 2007: 3776-3779 - [c34]Tiago R. Balen, Fernanda Lima Kastensmidt, Marcelo Lubaszewski, Michel Renovell:
Single Event Upset in SRAM-based Field Programmable Analog Arrays: Effects and Mitigation. ISVLSI 2007: 192-197 - [c33]Érika F. Cota, Fernanda Lima Kastensmidt, Maico Cassel, Paulo Meirelles, Alexandre M. Amory, Marcelo Lubaszewski:
Redefining and testing interconnect faults in Mesh NoCs. ITC 2007: 1-10 - [c32]Carlos Arthur Lang Lisbôa, Fernanda Lima Kastensmidt, Egas Henes Neto, Gilson I. Wirth, Luigi Carro:
Using built-in sensors to cope with long duration transient faults in future technologies. ITC 2007: 1-10 - [c31]Egas Henes Neto, Fernanda Lima Kastensmidt, Gilson I. Wirth:
A built-in current sensor for high speed soft errors detection robust to process and temperature variations. SBCCI 2007: 190-195 - [c30]Lorenzo Petroli, Carlos Arthur Lang Lisbôa, Fernanda Lima Kastensmidt, Luigi Carro:
Using majority logic to cope with long duration transient faults. SBCCI 2007: 354-359 - [c29]Gustavo Neuberger, Gilson I. Wirth, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis:
Statistical Analysis of Normality of Systematic and Random Variability of Flip-Flop Race Immunity in 130nm and 90nm CMOS Technologies. VLSI-SoC (Selected Papers) 2007: 1-16 - [c28]Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis, Gilson I. Wirth, Ralf Brederlow, Christian Pacha:
Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies. VLSI-SoC 2007: 78-83 - [c27]Jean Carlo Hamerski, Everton Reckziegel, Fernanda Lima Kastensmidt:
Evaluating memory sharing data size and TCP connections in the performance of a reconfigurable hardware-based architecture for TCP/IP stack. VLSI-SoC 2007: 212-217 - [i1]Fernanda Lima Kastensmidt, Luca Sterpone, Luigi Carro, Matteo Sonza Reorda:
On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs. CoRR abs/0710.4688 (2007) - 2006
- [j6]Egas Henes Neto, Ivandro Ribeiro, Michele G. Vieira, Gilson I. Wirth, Fernanda Lima Kastensmidt:
Using Bulk Built-in Current Sensors to Detect Soft Errors. IEEE Micro 26(5): 10-18 (2006) - [c26]Gilson I. Wirth, Michele G. Vieira, Egas Henes Neto, Fernanda Gusmão de Lima Kastensmidt:
Generation and Propagation of Single Event Transients in CMOS Circuits. DDECS 2006: 198-203 - [c25]Álisson Michels, Lorenzo Petroli, Carlos Arthur Lang Lisbôa, Fernanda Gusmão de Lima Kastensmidt, Luigi Carro:
SET Fault Tolerant Combinational Circuits Based on Majority Logic. DFT 2006: 345-352 - [c24]Maico Cassel, Fernanda Lima Kastensmidt:
Evaluating One-Hot Encoding Finite State Machines for SEU Reliability in SRAM-based FPGAs. IOLTS 2006: 139-144 - [c23]Arthur Pereira Frantz, Luigi Carro, Érika F. Cota, Fernanda Lima Kastensmidt:
Evaluating SEU and Crosstalk Effects in Network-on-Chip Routers. IOLTS 2006: 191-192 - [c22]Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis:
Design of a Robust 8-Bit Microprocessor to Soft Errors. IOLTS 2006: 195-196 - [c21]Arthur Pereira Frantz, Fernanda Lima Kastensmidt, Luigi Carro, Érika F. Cota:
Dependable Network-on-Chip Router Able to Simultaneously Tolerate Soft Errors and Crosstalk. ITC 2006: 1-9 - [c20]Arthur Pereira Frantz, Fernanda Lima Kastensmidt:
SEU Effects Evaluation on a NoC Router Architecture. LATW 2006: 117-122 - [c19]Gilson I. Wirth, Ivandro Ribeiro, Michele G. Vieira, Fernanda Gusmão de Lima Kastensmidt:
Single event transients in dynamic logic. SBCCI 2006: 184-189 - [c18]Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis:
Design at high level of a robust 8-bit microprocessor to soft errors by using only standard gates. SBCCI 2006: 196-201 - [c17]Arthur Pereira Frantz, Fernanda Lima Kastensmidt, Luigi Carro, Érika F. Cota:
Evaluation of SEU and crosstalk effects in network-on-chip switches. SBCCI 2006: 202-207 - 2005
- [j5]Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis:
An Automatic Technique for Optimizing Reed-Solomon Codes to Improve Fault Tolerance in Memories. IEEE Des. Test Comput. 22(1): 50-58 (2005) - [j4]Fernanda Lima Kastensmidt, Gustavo Neuberger, Luigi Carro, Ricardo Reis:
Desenvolvimento de Técnicas de Tolerância à Falhas para Componentes Programáveis por SRAM. RITA 12(1): 47-60 (2005) - [c16]Fernanda Lima Kastensmidt, Luca Sterpone, Luigi Carro, Matteo Sonza Reorda:
On the Optimal Design of Triple Modular Redundancy Logic for SRAM-based FPGAs. DATE 2005: 1290-1295 - [c15]Gustavo Neuberger, Fernanda Lima Kastensmidt, Ricardo Reis:
TOC-BISR: A Self-Repair Scheme for Memories in Embedded Systems. IESS 2005: 157-168 - [c14]Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis:
Designing Low-Power Embedded Software for Mass-Produced Microprocessor by Using a Loop Table in On-Chip Memory. PATMOS 2005: 59-68 - [c13]Egas Henes Neto, Ivandro Ribeiro, Michele G. Vieira, Gilson I. Wirth, Fernanda Lima Kastensmidt:
Evaluating fault coverage of bulk built-in current sensor for soft errors in combinational and sequential logic. SBCCI 2005: 62-67 - [c12]Gilson I. Wirth, Michele G. Vieira, Egas Henes Neto, Fernanda Gusmão de Lima Kastensmidt:
Single event transients in combinatorial circuits. SBCCI 2005: 121-126 - 2004
- [j3]Fernanda Lima Kastensmidt, Gustavo Neuberger, Renato Fernandes Hentschke, Luigi Carro, Ricardo Reis:
Designing Fault-Tolerant Techniques for SRAM-Based FPGAs. IEEE Des. Test Comput. 21(6): 552-562 (2004) - [c11]Ricardo Reis, Fernanda Lima Kastensmidt, José Luís Almada Güntzel:
Physical design methodologies for performance predictability and manufacturability. Conf. Computing Frontiers 2004: 390-397 - [c10]Fernanda Lima Kastensmidt, Gustavo Neuberger, Luigi Carro, Ricardo Reis:
Designing and testing fault-tolerant techniques for SRAM-based FPGAs. Conf. Computing Frontiers 2004: 419-432 - 2003
- [j2]Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Luigi Carro, Ricardo Augusto da Luz Reis:
A multiple bit upset tolerant SRAM memory. ACM Trans. Design Autom. Electr. Syst. 8(4): 577-590 (2003) - [c9]Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz Reis:
Designing fault tolerant systems into SRAM-based FPGAs. DAC 2003: 650-655 - [c8]Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz Reis:
Reducing pin and area overhead in fault-tolerant FPGA-based designs. FPGA 2003: 108-117 - 2002
- [c7]Fernanda Gusmão de Lima Kastensmidt, Luigi Carro, Raoul Velazco, Ricardo Augusto da Luz Reis:
Injecting Multiple Upsets in a SEU Tolerant 8051 Micro-Controller. IOLTW 2002: 194 - [c6]Fernanda Lima, Luigi Carro, Raul Velazco, Ricardo Reis:
Injecting Multiple Upsets in a SEU tolerant 8051 Micro-controller. LATW 2002: 120-125 - [c5]Renato Fernandes Hentschke, Felipe S. Marques, Fernanda Lima, Luigi Carro, Altamiro Amadeu Susin, Ricardo Reis:
Analyzing Area and Performance Penalty of Protecting Different Digital Modules with Hamming Code and Triple Modular Redundancy. SBCCI 2002: 95-100 - 2001
- [j1]Érika F. Cota, Fernanda Lima, Sana Rezgui, Luigi Carro, Raoul Velazco, Marcelo Lubaszewski, Ricardo Reis:
Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults. J. Electron. Test. 17(2): 149-161 (2001) - 2000
- [c4]Fernanda Gusmão de Lima, Marcelo Barcelos, Juergen Rochol, Sergio Bampi, Ricardo Reis:
A frame stream controller IP. ISCAS 2000: 721-724 - [c3]Fernanda Gusmão de Lima, Eduardo D'Avila, Mauricio Moraes, Marcelo Lubaszewski, Ricardo Reis:
A Self-Testing Mask Programmable Matrix Using Built-in Current Sensing. LATW 2000: 15-19 - [c2]Fernanda Gusmão de Lima, Érika F. Cota, Luigi Carro, Marcelo Lubaszewski, Ricardo Reis, Raoul Velazco, Sana Rezgui:
Designing a Radiation Hardened 8051-Like Micro-Controller. SBCCI 2000: 255-262
1990 – 1999
- 1999
- [c1]Fernanda Lima, Marcelo O. Johann, José Luís Almada Güntzel, Eduardo D'Avila, Luigi Carro, Ricardo Augusto da Luz Reis:
Designing a Mask Programmable Matrix for Sequential Circuits. VLSI 1999: 439-446
Coauthor Index
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