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ORCIDJorge L. Tonfat
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- affiliation: Federal University of Rio Grande do Sul (UFRGS), Porto Alegre, Brazil
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2010 – 2019
- 2019
[c13]Fabio Benevenuti, Eduardo Chielle
, Jorge L. Tonfat, Lucas A. Tambara, Fernanda Lima Kastensmidt, Carlos Alberto Zaffari, João Baptista dos Santos Martins, Otávio Santos Cupertino Durão:
Experimental Applications on SRAM-Based FPGA for the NanosatC-BR2 Scientific Mission. IPDPS Workshops 2019: 140-146- 2017
- [j2]Jorge L. Tonfat, Lucas A. Tambara, André Santos, Fernanda Lima Kastensmidt:
Soft error susceptibility analysis methodology of HLS designs in SRAM-based FPGAs. Microprocess. Microsystems 51: 209-219 (2017) - [c12]André Flores dos Santos, Lucas Antunes Tambara, Fabio Benevenuti, Jorge L. Tonfat, Fernanda Lima Kastensmidt:
Applying TMR in Hardware Accelerators Generated by High-Level Synthesis Design Flow for Mitigating Multiple Bit Upsets in SRAM-Based FPGAs. ARC 2017: 202-213 - 2016
- [c11]Jorge L. Tonfat, Lucas A. Tambara, André Flores dos Santos, Fernanda Gusmão de Lima Kastensmidt:
Method to Analyze the Susceptibility of HLS Designs in SRAM-Based FPGAs Under Soft Errors. ARC 2016: 132-143 - [c10]Jorge L. Tonfat, Guilherme Flach, Ricardo Reis:
Leakage current analysis in static CMOS logic gates for a transistor network design approach. PATMOS 2016: 107-113 - 2015
- [c9]Jorge L. Tonfat, Fernanda Lima Kastensmidt, Ricardo Reis:
Energy efficient frame-level redundancy scrubbing technique for SRAM-based FPGAs. AHS 2015: 1-8 - [c8]Jimmy Tarrillo, Jorge L. Tonfat, Lucas A. Tambara, Fernanda Lima Kastensmidt, Ricardo Reis:
Multiple fault injection platform for SRAM-based FPGA based on ground-level radiation experiments. LATS 2015: 1-6 - 2014
- [j1]Fernanda Lima Kastensmidt, Jorge L. Tonfat, Thiago Hanna Both, Paolo Rech, Gilson I. Wirth, Ricardo Reis, Florent Bruguier, Pascal Benoit, Lionel Torres, Christopher Frost:
Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs. Microelectron. Reliab. 54(9-10): 2344-2348 (2014) - [c7]Fernanda Lima Kastensmidt, Jorge L. Tonfat, Thiago Hanna Both, Paolo Rech, Gilson I. Wirth, Ricardo Reis, Florent Bruguier, Pascal Benoit, Lionel Torres, Christopher Frost:
Aging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAs. ETS 2014: 1-2 - [c6]Lucas A. Tambara, Jorge L. Tonfat, Ricardo Reis, Fernanda Lima Kastensmidt, Evaldo Carlos Fonseca Pereira, Rafael Galhardo Vaz, Odair Lelis Goncalez:
Soft error rate in SRAM-based FPGAs under neutron-induced and TID effects. LATW 2014: 1-6 - 2013
- [c5]Jimmy Tarrillo, Jorge L. Tonfat, Fernanda Lima Kastensmidt, Ricardo Reis, Florent Bruguier, Morgan Bourree, Pascal Benoit, Lionel Torres:
Using electromagnetic emanations for variability characterization in Flash-based FPGAs. ISVLSI 2013: 109-114 - 2012
- [c4]Raul Chipana, Eduardo Chielle, Fernanda Lima Kastensmidt, Jorge L. Tonfat, Ricardo Reis:
Soft-Error Probability Due to SET in Clock Tree Networks. ISVLSI 2012: 338-343 - [c3]Raul Chipana, Fernanda Lima Kastensmidt, Jorge L. Tonfat, Ricardo Reis:
SET susceptibility estimation of clock tree networks from layout extraction. LATW 2012: 1-6 - 2011
- [c2]Jorge L. Tonfat, Gustavo Neuberger, Ricardo Reis:
Functional verification of logic modules for a Gigabit Ethernet switch. LATW 2011: 1-4 - 2010
- [c1]Jorge L. Tonfat, Ricardo Reis:
Design and verification of a layer-2 Ethernet MAC classification engine for a Gigabit Ethernet switch. ICECS 2010: 146-149
Coauthor Index
aka: Fernanda Gusmão de Lima Kastensmidt
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