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ORCID31st SBCCI 2018: Bento Gonçalves, RS, Brazil
- 31st Symposium on Integrated Circuits and Systems Design, SBCCI 2018, Bento Gonçalves, RS, Brazil, August 27-31, 2018. IEEE 2018, ISBN 978-1-5386-7431-4
- Bruno Tarui, Fávero Guilherme Santos
, Edson Leonardo dos Santos, Bernardo Leite, André Augusto Mariano:
Design of an RF Six-Mode CMOS Power Amplifier for Efficiency Improvement at Power Backoff. 1-6 - Luis Henrique Rodovalho:
Push-Pull Based Operational Transconductor Amplifier Topologies for Ultra Low Voltage Supplies. 1-6 - German Fierro, Fernando Silveira:
Ultra Low Power Tunable Filter for a Low Phase Shift on Electrocardiogram QRS-Complex Acquisition. 1-5 - Anderson Fortes, Luiz A. da Silva, Alessandro Girardi:
Low Power Bulk-Driven OTA Design Optimization Using Cuckoo Search Algorithm. 1-7 - Pietro Maris Ferreira, Martin Schaeffer, Adel Mezaour, Olivier Petit, Caroline Lelandais-Perrault, Gerald Charbonnier:
A -40 to 250°C Triple Modular Redundancy Temperature Sensor for Turbofan Engines. 1-6 - Rafael Cantalice, Daniel Barcelos, Fabricio Mattos, Fernando Paixão Cortes:
A Differential Low Power Wake-Up Circuit Based on Systematic Offset for RFID Applications. 1-6 - Iaçanã I. Weber, Fernando Gehm Moraes, Leonardo L. de Oliveira, Everton Alceu Carara:
Exploring Asynchronous End-to-End Communication Through a Synchronous NoC. 1-6 - Jeferson Santos Barros, Victor Hugo Schulz, Djones Vinicius Lettnin:
An Adaptive Closed-Loop Verification Approach in UVM-SystemC for AMS Circuits. 1-6 - Tarciso A. Martins, Julio Saldana, Wilhelmus A. M. Van Noije:
A Programmable Gain Amplifier for Load Demodulation Channel in an NFC Reader Chip. 1-6 - Gustavo Sanchez, Mário Saldanha, Luciano Volcan Agostini, César A. M. Marcon:
Hardware-Oriented Wedgelet Evaluation Skip for DMM-1 in 3D-HEVC. 1-5 - Andrés Fontana, Sebastián Matías Pazos, Fernando L. Aguirre, Felix Palumbo, Nahuel Vega, Nahuel A. Müller, Emanuel de la Fourniere, Mario Debray:
Heavy Ion Microbeam Experimental Study of ASET on a Full-Custom CMOS OpAmp. 1-5 - Filipe D. Baumgratz, Sandro B. Ferreira, Michiel Steyaert, Sergio Bampi, Filip Tavernier:
A Charge-Sharing Bandpass Filter Topology with Boosted Q-Factor in 40-NM CMOS. 1-6 - Leandro Dias da Silva, Eduardo Gonçalves de Lima:
A Novel Limiter with Application in Crest Factor Reduction Techniques for Wireless Communications. 1-6 - Fabio Benevenuti, Fabiano Libano, Vincent Pouget, Fernanda Lima Kastensmidt, Paolo Rech:
Comparative Analysis of Inference Errors in a Neural Network Implemented in SRAM-Based FPGA Induced by Neutron Irradiation and Fault Injection Methods. 1-6 - Luciano Almeida Braatz, Daniel Palomino, Luciano Volcan Agostini, Bruno Zatt, Marcelo Schiavon Porto:
Low-Power HEVC 1-D IDCT Hardware Architecture. 1-6 - Oscar Anacona-Mosquera, Felipe R. G. Cabral, Renato Coral Sampaio, George Teodoro, Ricardo P. Jacobi, Carlos H. Llanos:
Efficient Hardware Implementation of the Fast Hybrid Morphological Reconstruction Algorithm. 1-6 - Bruno Scherer Oliveira, Henrique Martins Medina, Anderson C. Sant'Ana, Fernando Gehm Moraes:
Secure Environment Architecture for MPSoCs. 1-6 - Marco A. Ribeiro, Iago A. Carvalho, Jeferson F. Chaves, Omar P. Vilela Neto:
Improving Energy Efficiency on Partially Reversible Pipelined QCA Circuits. 1-6 - Brunno Abreu, Gustavo M. Santana, Mateus Grellert, Guilherme Paim, Leandro M. G. Rocha, Eduardo A. C. da Costa, Sergio Bampi:
Exploiting Partial Distortion Elimination in the Sum of Absolute Differences for Energy-Efficient HEVC Integer Motion Estimation. 1-6 - Pedro J. A. Ishimaru, Antonyus P. A. Ferreira, Vanessa O. Ogg, Cecil Accetti R. de A. Melo, Edna Natividade da Silva Barros:
An FPGA-Based RFID Baseband Processor Using a RISC-V Platform. 1-6 - Jose L. Ramirez, Fabiano Fruett:
Multi-Terminal PiezoMOSFET Sensor for Stress Measurements in Silicon. 1-6 - Weslley N. Costa, Lucas P. Lima, Otávio Alcântara de Lima Jr.:
Extracting Packet Dependence from NoC Simulation Traces Using Association Rule Mining. 1-6 - Lucas C. Galvao, Candice Müller, Maria Cristina Felippetto de Castro, Fernando César Comparsi de Castro, Kayol Soares Mayer:
Bandwidth Efficient Gaussian Minimum Frequency-Shift Keying Approach for Software Defined Radio. 1-4 - Guilherme E. Medeiros, Felipe T. Bortolon, Ricardo Reis, Luciano Ost:
Evaluation of Compiler Optimization Flags Effects on Soft Error Resiliency. 1-6 - Thiago Werlley B. Silva, Daniel C. Morais, Halamo G. R. Andrade, Felipe C. A. Nunes, Elmar Uwe Kurt Melcher, Antonio Marcus Nogueira de Lima, Alisson V. Brito:
A Distributed Functional Verification Environment for the Design of System-on-Chip in Heterogeneous Architectures. 4849-4854 - Walter Lau Neto, Vinicius N. Possani, Felipe S. Marranghello, Jody Maick Matos, André Inácio Reis, Renato P. Ribas:
Exact Multi-Level Benchmark Circuit Generation for Logic Synthesis Evaluation. 1-6 - Vinicius Fochi, Luciano L. Caimi, Marcelo H. da Silva, Fernando Gehm Moraes:
Fault-Tolerance at the Management Level in Many-Core Systems. 1-6 - Jean Carlo Hamerski, Geancarlo Abich, Ricardo Reis, Luciano Ost, Alexandre M. Amory:
A Design Patterns-Based Middleware for Multiprocessor Systems-on-Chip. 1-6 - Ruan Evangelista Formigoni, Omar P. Vilela Neto, José Augusto Miranda Nacif:
BANCS: Bidirectional Alternating Nanomagnetic Clocking Scheme. 1-6 - Gustavo Sanchez, Luciano Agostini, Leonel Sousa, César A. M. Marcon:
3D-HEVC DMM-1 Parallelism Exploration Targeting Multicore Systems. 1-5 - Roberto B. Almeida, Paulo F. Butzen, Cristina Meinhardt:
16NM 6T and 8T CMOS SRAM Cell Robustness Against Process Variability and Aging Effects. 1-6 - Anderson R. P. Domingues, Jean Carlo Hamerski, Alexandre M. Amory:
Broker Fault Recovery for a Multiprocessor System-an-Chip Middleware. 1-6 - Jones Goebel, Lucas Barreiro Agostini, Luciano Volcan Agostini, Bruno Zatt, Marcelo Schiavon Porto:
High Throughput Multiplierless Architecture for VP9 Fractional Motion Estimation. 1-6 - Cesar de S. Dias, Paulo F. Butzen:
A Novel SPICE Model of Memristive Devices with Threshold Current Based Control. 1-6 - Murilo R. Perleberg, Vladimir Afonso, Ruhan A. Conceição, Altamiro Amadeu Susin, Luciano Volcan Agostini, Bruno Zatt, Marcelo Schiavon Porto:
A Power-Efficient and High-Throughput Hardware Design for 3D-HEVC Disparity Estimation. 1-6 - João G. Nizer Rahmeier, Eduardo A. C. da Costa, Alessandro Girardi, Sidinei Ghissoni:
Optimization of Single-Stage FFT Architectures Using Multiple Constant Multiplication. 1-6 - Robson F. de Moraes, Juraci F. Galdino, Ernesto L. Pinto:
Energy Aware Demodulation Implementation with Fixed Point Adaptive Precision for OFDM Systems. 1-6 - Carlos Michel Betemps, Maurício Lima Pilla, Bruno Zatt:
Hybrid Memory Cube in Embedded Systems. 1-6 - Michael Guilherme Jordan, Tiago Knorst, Mateus Beck Rutzig:
Improving Software Productivity and Performance Through a Transparent SIMD Execution. 1-6 - Mariana Ucker, Vladimir Afonso, Luan Audibert, Altamiro Amadeu Susin, Bruno Zatt, Marcelo Schiavon Porto, Luciano Volcan Agostini:
Low-Power and High-Throughput Architecture for 3D-HEVC Depth Modeling Mode 4. 1-6 - Felipe A. Kuentzer, Leonardo Rezende Juracy, Matheus T. Moreira, Alexandre M. Amory:
Testable Error Detection Logic Design Applied to an Asynchronous Timing Resilient Template. 1-6 - Sheiny Fabre, José Luís Güntzel, Laércio Lima Pilla, Renan Netto, Tiago Fontana, Vinicius S. Livramento:
Enhancing Multi-Threaded Legalization Through k-d Tree Circuit Partitioning. 1-6 - Rafael O. Nunes, R. L. de Orio:
Operational Amplifier Performance Degradation and Time-to-Failure due to Electromigration. 1-6 - Sergio A. Pertuz, Carlos H. Llanos, Cesar A. Pena, Daniel M. Muñoz:
A Modular and Distributed Impedance Control Architecture on a Chip for a Robotic Hand. 1-6 - Rodrigo Alves De Lima Moreto, Carlos Eduardo Thomaz, Salvador Pinillos Gimenez:
Automatic Optimization of Robust Analog CMOS ICs: An Interactive Genetic Algorithm Driven by Human Knowledge. 1-6
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