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ORCIDFelipe A. Kuentzer
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- affiliation: University of Potsdam, Department of Computer Science, Germany
- affiliation: Innovations for High Performance Microelectronics (IHP), Frankfurt (Oder), Germany
- affiliation: Pontifical Catholic University of Rio Grande do Sul (PUCRS), Brazil
- affiliation: University of Santa Cruz do Sul (UNISC), Department of Informatics, Brazil
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2020 – today
- 2023
[c8]Felipe A. Kuentzer, Christos Georgakidis, Christos P. Sotiriou, Milos Krstic
:
Addressing Single-Event-Multiple-Transient Faults in Asynchronous RH-Click Controllers. SBCCI 2023: 1-6- 2022
- [j5]Marko S. Andjelkovic, Milos Marjanovic, Bojan Drasko, Cristiano Calligaro, Oliver Schrape, Umberto Gatti, Felipe A. Kuentzer, Stefan D. Ilic, Goran S. Ristic, Milos Krstic:
Analysis of Single Event Transient Effects in Standard Delay Cells Based on Decoupling Capacitors. J. Circuits Syst. Comput. 31(18): 2240007:1-2240007:24 (2022) - 2020
- [j4]Felipe A. Kuentzer, Milos Krstic:
Soft Error Detection and Correction Architecture for Asynchronous Bundled Data Designs. IEEE Trans. Circuits Syst. 67-I(12): 4883-4894 (2020) - [c7]Felipe A. Kuentzer, Moisés Herrera, Oliver Schrape, Peter A. Beerel, Milos Krstic:
Radiation Hardened Click Controllers for Soft Error Resilient Asynchronous Architectures. ASYNC 2020: 78-85 - [c6]Felipe A. Kuentzer, Leonardo Rezende Juracy, Matheus T. Moreira, Alexandre M. Amory:
Test Oriented Design and Layout Generation of an Asynchronous Controller for the Blade Template. ASYNC 2020: 86-93
2010 – 2019
- 2018
- [j3]Leonardo Rezende Juracy, Matheus T. Moreira, Felipe A. Kuentzer, Alexandre M. Amory:
A DfT Insertion Methodology to Scannable Q-Flop Elements. IEEE Trans. Very Large Scale Integr. Syst. 26(8): 1609-1612 (2018) - [c5]Felipe A. Kuentzer, Leonardo Rezende Juracy, Alexandre M. Amory:
On the reuse of timing resilient architecture for testing path delay faults in critical paths. DATE 2018: 379-384 - [c4]Leonardo Rezende Juracy, Matheus T. Moreira, Felipe A. Kuentzer, Fernando Gehm Moraes, Alexandre M. Amory:
An LSSD Compliant Scan Cell for Flip-Flops. ISCAS 2018: 1-5 - [c3]Felipe A. Kuentzer, Leonardo Rezende Juracy, Matheus T. Moreira, Alexandre M. Amory:
Testable Error Detection Logic Design Applied to an Asynchronous Timing Resilient Template. SBCCI 2018: 1-6 - 2017
- [j2]Leonardo Rezende Juracy, Matheus Trevisan Moreira, Felipe Augusto Kuentzer, Alexandre de Morais Amory:
Optimized Design of an LSSD Scan Cell. IEEE Trans. Very Large Scale Integr. Syst. 25(2): 765-768 (2017) - 2016
- [c2]Felipe A. Kuentzer, Alexandre M. Amory:
Fault Classification of the Error Detection Logic in the Blade Resilient Template. ASYNC 2016: 37-42 - 2014
- [c1]Felipe A. Kuentzer, Alexandre S. Pereira, Alexandre M. Amory, Gabriel Perrone, Samoel R. M. Silva, Joao M. Dinis, Rita M. C. Almeida:
Optimization and Analysis of Seriation Algorithm for Ordering Protein Networks. BIBE 2014: 231-237
2000 – 2009
- 2009
- [j1]Cristiano Bonato Both, Cristiano Battisti, Felipe A. Kuentzer, Tatiana Gadelha Serra dos Santos, Rafael R. dos Santos:
FPGA implementation and performance evaluation of an RFC 2544 compliant Ethernet test set. Int. J. High Perform. Syst. Archit. 2(2): 107-115 (2009)
Coauthor Index
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