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Alejandro Serrano-Cases
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2020 – today
- 2024
- [c11]Alejandro Serrano-Cases, Enrico Mezzetti, Jaume Abella, Francisco J. Cazorla:
Achieving Flexible Performance Isolation on the AMD Xilinx Zynq UltraScale+. DSD 2024: 282-290 - 2023
- [j4]Alexander Aponte-Moreno, José Isaza-González, Alejandro Serrano-Cases, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi, Felipe Restrepo-Calle:
Evaluation of fault injection tools for reliability estimation of microprocessor-based embedded systems. Microprocess. Microsystems 96: 104723 (2023) - [c10]Sergio Garcia-Esteban, Alejandro Serrano-Cases, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla:
Quasi Isolation QoS Setups to Control MPSoC Contention in Integrated Software Architectures. ECRTS 2023: 5:1-5:25 - [c9]Nikolaos Andriotis, Alejandro Serrano-Cases, Sergi Alcaide, Jaume Abella, Francisco J. Cazorla, Yang Peng, Andrea Baldovin, Michael Paulitsch, Vladimir Tsymbal:
A Software-Only Approach to Enable Diverse Redundancy on Intel GPUs for Safety-Related Kernels. SAC 2023: 451-460 - 2021
- [c8]Alejandro Serrano-Cases, Juan M. Reina, Jaume Abella, Enrico Mezzetti, Francisco J. Cazorla:
Leveraging Hardware QoS to Control Contention in the Xilinx Zynq UltraScale+ MPSoC. ECRTS 2021: 3:1-3:26 - 2020
- [j3]Alejandro Serrano-Cases, Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez:
Multi-Threaded Mitigation of Radiation-Induced Soft Errors in Bare-Metal Embedded Systems. J. Electron. Test. 36(1): 47-57 (2020) - [c7]Alexander Aponte-Moreno, José Isaza-González, Alejandro Serrano-Cases, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi, Felipe Restrepo-Calle:
An Experimental Comparison of Fault Injection Tools for Microprocessor-based Systems. LATS 2020: 1-6 - [c6]David Ruiz Falcó, Alejandro Serrano-Cases, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi:
Soft error reliability predictor based on a Deep Feedforward Neural Network. LATS 2020: 1-5
2010 – 2019
- 2019
- [c5]Alejandro Serrano-Cases, Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez:
Softerror mitigation for multi-core processors based on thread replication. LATS 2019: 1-5 - 2018
- [j2]Iuri Albandes Cunha Gomes, Alejandro Serrano-Cases, Mayler G. A. Martins, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi, Fernanda Lima Kastensmidt:
Design of approximate-TMR using approximate library and heuristic approaches. Microelectron. Reliab. 88-90: 898-902 (2018) - [c4]Iuri Albandes Cunha Gomes, Alejandro Serrano-Cases, Antonio J. Sanchez-Clemente, Mayler G. A. Martins, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi, Fernanda Lima Kastensmidt:
Improving approximate-TMR using multi-objective optimization genetic algorithm. LATS 2018: 1-6 - 2017
- [j1]Luis Medina-Valdés, Miguel Diez-Ochoa, Raúl Correal, Sergio Cuenca-Asensi, Alejandro Serrano-Cases, Jorge Godoy, Antonio Martínez-Álvarez, Jorge Villagra:
A Comparison of FPGA and GPGPU Designs for Bayesian Occupancy Filters. Sensors 17(11): 2599 (2017) - [c3]Jose Isaza-Gonzalez, Alejandro Serrano-Cases, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi, Hipólito Guzmán-Miranda, Miguel A. Aguirre:
Contrast of a HDL model and COTS version of a microprocessor for soft-error testing. LATS 2017: 1-6 - 2016
- [c2]Alejandro Serrano-Cases, Jose Isaza-Gonzalez, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez:
On the influence of compiler optimizations in the fault tolerance of embedded systems. IOLTS 2016: 207-208 - [c1]Jose Isaza-Gonzalez, Alejandro Serrano-Cases, Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez:
Dependability evaluation of COTS microprocessors via on-chip debugging facilities. LATS 2016: 27-32
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