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ORCIDMichael Hübner 0001
Person information
- affiliation: BTU Cottbus-Senftenberg, Institute for Informatics, Germany
- affiliation: Ruhr University Bochum, ESIT, Germany
- affiliation: University of Karlsruhe, ITIV, Germany
Other persons with the same name
- Michael Hübner 0002 — University of Oldenburg, Germany
- Michael Hübner 0003 — Ilmenau Technical University, Ilmenau, Germany
- Michael Hübner 0004 — Schleswig-Holstein Netz AG, Quickborn, Germany
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2020 – today
- 2024
[c215]Oliver Oey, Michael Hübner, Timo Stripf, Jürgen Becker:
Embedded Multi-Core Code Generation with Cross-Layer Parallelization. PARMA-DITAM 2024: 5:1-5:13- [c214]Jens Bielefeldt, Kai-Uwe Basener, Roman Krajewski, Hans-Werner Wiesbrock, Marc Reichenbach, Michael Hübner:
DeepTest: Using Machine Learning for Generating new Testsequences. MECO 2024: 1-9 - 2023
- [j50]Samuel S. da Silva
, Matheus B. R. Cardoso, Lucas Giovanni Nardo, Erivelton Geraldo Nepomuceno, Michael Hübner, Janier Arias-Garcia:
A New Chaos-Based PRNG Hardware Architecture Using the HUB Fixed-Point Format. IEEE Trans. Instrum. Meas. 72: 1-8 (2023) - [c213]Safdar Mahmood, Michael Hübner, Marc Reichenbach:
A Design-Space Exploration Framework for Application-Specific Machine Learning Targeting Reconfigurable Computing. ARC 2023: 371-374 - 2022
- [j49]João Paulo Cardoso de Lima, Marcelo Brandalero, Michael Hübner, Luigi Carro:
STAP: An Architecture and Design Tool for Automata Processing on Memristor TCAMs. ACM J. Emerg. Technol. Comput. Syst. 18(2): 39:1-39:22 (2022) - [j48]Priscile Suawa, Tenia Meisel, Marcel Jongmanns, Michael Hübner, Marc Reichenbach:
Modeling and Fault Detection of Brushless Direct Current Motor by Deep Learning Sensor Data Fusion. Sensors 22(9): 3516 (2022) - [j47]Kwame Owusu Ampadu, Florian Rokohl, Safdar Mahmood, Marc Reichenbach, Michael Hübner:
InjectMeAI - Software Module of an Autonomous Injection Humanoid. Sensors 22(14): 5315 (2022) - [j46]Fernando Fernandes dos Santos, Marcelo Brandalero, Michael B. Sullivan, Pedro Martins Basso, Michael Hübner, Luigi Carro, Paolo Rech:
Reduced Precision DWC: An Efficient Hardening Strategy for Mixed-Precision Architectures. IEEE Trans. Computers 71(3): 573-586 (2022) - [j45]Florian Fricke, Marcelo Brandalero, Sascha Liehr, Simon Kern, Klas Meyer, Stefan Kowarik, Robin Hierzegger, Stephan Westerdick, Michael Maiwald, Michael Hübner:
Artificial Intelligence for Mass Spectrometry and Nuclear Magnetic Resonance Spectroscopy Using a Novel Data Augmentation Method. IEEE Trans. Emerg. Top. Comput. 10(1): 87-98 (2022) - [c212]Priscile Suawa Fogou, Michael Hübner:
Health Monitoring of Milling Tools under Distinct Operating Conditions by a Deep Convolutional Neural Network model. DATE 2022: 1107-1110 - [c211]Safdar Mahmood, Stefan Scharoba, Jonas Schorlemer, Christian Schulz, Michael Hübner, Marc Reichenbach:
Detecting Improvised Land-mines using Deep Neural Networks on GPR Image Dataset targeting FPGAs. NorCAS 2022: 1-7 - [c210]Konstantinos Antonopoulos, Dimitris Karadimas, Alexandros Spournias, Christos Panagiotou, Ignantios Fwtiou, Ioannis Symeonidis, Christos P. Antonopoulos, Michael Hübner, Nikolaos S. Voros:
A distributed Embedded Systems IoT platform and Associated services Supporting Shopping Cart for Disabled People. SBCCI 2022: 1-6 - [c209]Hector Gerardo Muñoz Hernandez, Florian Fricke, Muhammed Al Kadi, Marc Reichenbach, Michael Hübner:
Edge GPU based on an FPGA Overlay Architecture using PYNQ. SBCCI 2022: 1-6 - 2021
- [j44]Thiarles S. Medeiros, Gustavo P. Berned, Antoni C. Navarro, Fábio D. Rossi, Marcelo Caggiani Luizelli, Marcelo Brandalero, Michael Hübner, Antonio Carlos Schneider Beck, Arthur Francisco Lorenzon:
Aging-Aware Parallel Execution. IEEE Embed. Syst. Lett. 13(3): 122-125 (2021) - [j43]Bruno Almeida da Silva, Arthur Mendes Lima, Janier Arias-Garcia, Michael Hübner, Jones Yudi Mori:
A Manycore Vision Processor for Real-Time Smart Cameras. Sensors 21(21): 7137 (2021) - [c208]Hector Gerardo Muñoz Hernandez, Mitko Veleski, Marcelo Brandalero, Michael Hübner:
Accelerating Convolutional Neural Networks in FPGA-based SoCs using a Soft-Core GPU. ARC 2021: 275-284 - [c207]Florian Fricke, Safdar Mahmood, Javier Hoffmann, Marcelo Brandalero, Sascha Liehr, Simon Kern, Klas Meyer, Stefan Kowarik, Stephan Westerdick, Michael Maiwald, Michael Hübner:
Artificial Intelligence for Mass Spectrometry and Nuclear Magnetic Resonance Spectroscopy. DATE 2021: 615-620 - [c206]Mitko Veleski, Michael Hübner, Milos Krstic, Rolf Kraemer:
Design and Implementation Strategy of Adaptive Processor-Based Systems for Error Resilient and Power-Efficient Operation. DDECS 2021: 57-62 - [c205]Stefan Scharoba, Kai-Uwe Basener, Jens Bielefeldt, Hans-Werner Wiesbrock, Michael Hübner:
Towards Machine Learning Support for Embedded System Tests. DSD 2021: 166-173 - [c204]Keyvan Shahin, Michael Hübner:
Accelerating Fixed-Point Simulations Using Width Reconfigurable Hardware Architectures. FPL 2021: 275-276 - [c203]Marcelo Brandalero, Mitko Veleski, Hector Gerardo Muñoz Hernandez, Muhammad Ali, Laurens Le Jeune, Toon Goedemé, Nele Mentens, Jurgen Vandendriessche, Lancelot Lhoest, Bruno da Silva, Abdellah Touhafi, Diana Goehringer, Michael Hübner:
AITIA: Embedded AI Techniques for Industrial Applications. FPL 2021: 374-375 - [c202]Angelos S. Voros, Christos Panagiotou, Stavros Zogas, Georgios Keramidas, Christos P. Antonopoulos, Michael Hübner, Nikolaos S. Voros:
The SMART4ALL High Performance Computing Infrastructure: Sharing high-end hardware resources via cloud-based microservices. FPL 2021: 384-385 - [c201]Jens Bielefeldt, Kai-Uwe Basener, Siddique Reza Khan, Mozhdeh Massah, Hans-Werner Wiesbrock, Stefan Scharoba, Michael Hübner:
Einsatz von Deep Learning für den Test Eingebetteter Systeme. GI-Jahrestagung 2021: 1859-1864 - [c200]Mitko Veleski, Michael Hübner, Milos Krstic, Rolf Kraemer:
Towards Error Resilient and Power-Efficient Adaptive Multiprocessor System using Highly Configurable and Flexible Cross-Layer Framework. IOLTS 2021: 1-7 - [c199]Mariam M. Fouad, Georg Schmitz, Michael Hübner, Mohamed A. Abd El Ghany:
Deep Learning in Signal Linearization for Harmonic Imaging Application. ISBI 2021: 957-960 - [c198]Jens Bielefeldt, Kai-Uwe Basener, Siddique Reza Khan, Mozhdeh Massah, Hans-Werner Wiesbrock, Stefan Scharoba, Michael Hübner:
DeepTest: How Machine Learning Can Improve the Test of Embedded Systems. MECO 2021: 1-6 - [c197]Jens Rettkowski, Julian Haase, Sven Primus, Michael Hübner, Diana Göhringer:
Performance analysis of application-specific instruction-set routers in networks-on-chip. NoCArc@MICRO 2021: 16-21 - 2020
- [j42]Nikolaos S. Voros, Mircea Stan, Michael Hübner, Georgios Keramidas:
VLSI for Next Generation CE. IEEE Consumer Electron. Mag. 9(3): 88-89 (2020) - [j41]Christos P. Antonopoulos, Georgios Keramidas, Nikolaos S. Voros, Michael Hübner, Fynn Schwiegelshohn, Diana Goehringer, Maria Dagioglou, Georgios Stavrinos, Stasinos Konstantopoulos, Vangelis Karkaletsis:
Toward an ICT-Based Service Oriented Health Care Paradigm. IEEE Consumer Electron. Mag. 9(4): 77-82 (2020) - [j40]Michael Hübner, José Luís Güntzel:
Guest Editors' Introduction: SBCCI 2018. IEEE Des. Test 37(3): 5-6 (2020) - [j39]Ambika Prasad Shah, Santosh Kumar Vishvakarma, Michael Hübner:
Soft Error Hardened Asymmetric 10T SRAM Cell for Aerospace Applications. J. Electron. Test. 36(2): 255-269 (2020) - [j38]Osvaldo Navarro, Jones Yudi Mori, Javier Hoffmann, Hector Gerardo Muñoz Hernandez, Michael Hübner:
A Machine Learning Methodology for Cache Memory Design Based on Dynamic Instructions. ACM Trans. Embed. Comput. Syst. 19(2): 12:1-12:20 (2020) - [j37]Georgios Keramidas, Nikolaos S. Voros, Michael Hübner, Diana Goehringer:
Guest Editorial Note: Special Issue on Applied Reconfigurable Computing. J. Signal Process. Syst. 92(10): 1153-1154 (2020) - [c196]Hector Gerardo Muñoz Hernandez, Safdar Mahmood, Marcelo Brandalero, Michael Hübner:
A Modular Software Library for Effective High Level Synthesis of Convolutional Neural Networks. ARC 2020: 211-220 - [c195]Marcelo Brandalero, Muhammad Ali, Laurens Le Jeune, Hector Gerardo Muñoz Hernandez, Mitko Veleski, Bruno da Silva, Jan Lemeire, Kristof Van Beeck, Abdellah Touhafi, Toon Goedemé, Nele Mentens, Diana Göhringer, Michael Hübner:
AITIA: Embedded AI Techniques for Embedded Industrial Applications. COINS 2020: 1-7 - [c194]Mariam M. Fouad, Yousef Metwally, Georg Schmitz, Michael Hübner, Mohamed A. Abd El Ghany:
Deep Learning Utilization in Beamforming Enhancement for Medical Ultrasound. COMPSAC 2020: 717-722 - [c193]Marcelo Brandalero, Bernardo Neuhaus Lignati, Antonio Carlos Schneider Beck, Muhammad Shafique, Michael Hübner:
Proactive Aging Mitigation in CGRAs through Utilization-Aware Allocation. DAC 2020: 1-6 - [c192]Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendörfer, Christian Sauer, Anton Klotz, Michael Hübner, Jörg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka:
RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. DATE 2020: 388-393 - [c191]Mitko Veleski, Michael Hübner, Milos Krstic, Rolf Kraemer:
Highly Configurable Framework for Adaptive Low Power and Error-Resilient System-On-Chip. DSD 2020: 24-28 - [c190]Guilherme Korol, Michael Guilherme Jordan, Marcelo Brandalero, Michael Hübner, Mateus Beck Rutzig, Antonio Carlos Schneider Beck:
MCEA: A Resource-Aware Multicore CGRA Architecture for the Edge. FPL 2020: 33-39 - [c189]Marcio M. Gonçalves, Fabio Benevenuti, Hector Gerardo Muñoz Hernandez, Marcelo Brandalero, Michael Hübner, Fernanda Lima Kastensmidt, José Rodrigo Azambuja:
Investigating Floating-Point Implementations in a Softcore GPU under Radiation-Induced Faults. ICECS 2020: 1-4 - [c188]Fernando Fernandes dos Santos, Marcelo Brandalero, Pedro Martins Basso, Michael Hübner, Luigi Carro, Paolo Rech:
Reduced-Precision DWC for Mixed-Precision GPUs. IOLTS 2020: 1-6 - [c187]Marcelo Brandalero, Hector Gerardo Muñoz Hernandez, Mitko Veleski, Muhammed Al Kadi, Paolo Rech, Michael Hübner:
(Special Topic Submission) Enabling Domain-Specific Architectures with an Open-Source Soft-Core GPGPU. IPDPS Workshops 2020: 36-43 - [c186]Raphael Segabinazzi Ferreira, Jörg Nolte, Fabian Vargas, Nevin George, Michael Hübner:
Run-time Hardware Reconfiguration of Functional Units to Support Mixed-Critical Applications. LATS 2020: 1-6 - [c185]Raul Silveira Silva, Guilherme Korol, Michael Guilherme Jordan, Marcelo Brandalero, Michael Hübner, Monica Magalhães Pereira, Mateus Beck Rutzig, Antonio Carlos Schneider Beck:
A Management Technique for Concurrent Access to a Reconfigurable Accelerator. SBCCI 2020: 1-6 - [c184]Michael Hübner:
Flexible hardware architectures for robust Cyberphysical systems. SPA 2020: 9 - [c183]Javier Hoffmann, Safdar Mahmood, Priscile Suawa Fogou, Nevin George, Solaiman Raha, Sabur Safi, Kurt J. G. Schmailzl, Marcelo Brandalero, Michael Hübner:
A Survey on Machine Learning Approaches to ECG Processing. SPA 2020: 36-41 - [c182]Javier Hoffmann, Marcelo Brandalero, Michael Hübner:
TIRUB: A Safety and Energy-Aware Scheduling Algorithm. SPA 2020: 63-68 - [i6]Marcelo Brandalero, Bernardo Neuhaus Lignati, Antonio Carlos Schneider Beck, Muhammad Shafique, Michael Hübner:
Proactive Aging Mitigation in CGRAs through Utilization-Aware Allocation. CoRR abs/2004.10470 (2020)
2010 – 2019
- 2019
- [j36]Alexandra Kourfali, Florian Fricke, Michael Hübner, Dirk Stroobandt:
An Integrated on-Silicon Verification Method for FPGA Overlays. J. Electron. Test. 35(2): 173-189 (2019) - [j35]René Cumplido, Maya B. Gokhale, Claudia Feregrino, Michael Hübner:
Guest Editorial: Special Issue on Reconfigurable Computing and FPGA Technology. J. Parallel Distributed Comput. 133: 359-361 (2019) - [c181]André Werner, Florian Fricke, Keyvan Shahin, Florian Werner, Michael Hübner:
Automatic Toolflow for VCGRA Generation to Enable CGRA Evaluation for Arithmetic Algorithms. ARC 2019: 277-291 - [c180]Safdar Mahmood, Jens Rettkowski, Arij Shallufa, Michael Hübner, Diana Göhringer:
IP Core Identification in FPGA Configuration Files using Machine Learning Techniques. ICCE-Berlin 2019: 103-108 - [c179]Jens Rettkowski, Safdar Mahmood, Arij Shallufa, Michael Hübner, Diana Göhringer:
Inspection of Partial Bitstreams for FPGAs Using Artificial Neural Networks. IPDPS Workshops 2019: 83-86 - [c178]Florian Fricke, André Werner, Keyvan Shahin, Florian Werner, Michael Hübner:
Automatic Tool-Flow for Mapping Applications to an Application-Specific CGRA Architecture. IPDPS Workshops 2019: 147-154 - [i5]Maksim Jenihhin, Said Hamdioui, Matteo Sonza Reorda, Milos Krstic, Peter Langendörfer, Christian Sauer, Anton Klotz, Michael Hübner, Jörg Nolte, Heinrich Theodor Vierhaus, Georgios N. Selimis, Dan Alexandrescu, Mottaqiallah Taouil, Geert Jan Schrijen, Jaan Raik, Luca Sterpone, Giovanni Squillero, Zoya Dyka:
RESCUE: Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems. CoRR abs/1912.01561 (2019) - 2018
- [j34]Michael Hübner:
Special issue: Design and architectures for real-time signal and image processing. J. Real Time Image Process. 15(1): 1-2 (2018) - [j33]Saraju P. Mohanty, Michael Hübner, Chun Jason Xue, Xin Li, Hai Li:
Guest Editorial Circuit and System Design Automation for Internet of Things. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(1): 3-6 (2018) - [j32]Muhammed Al Kadi, Benedikt Janßen, Jones Yudi Mori, Michael Hübner:
General-Purpose Computing with Soft GPUs on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 11(1): 5:1-5:22 (2018) - [c177]Benedikt Janßen, Florian Kästner, Tim Wingender, Michael Hübner:
A Dynamic Partial Reconfigurable Overlay Framework for Python. ARC 2018: 331-342 - [c176]Osvaldo Navarro, Michael Hübner:
Runtime Adaptive Cache for the LEON3 Processor. ARC 2018: 343-354 - [c175]Mário Lopes Ferreira, João Canas Ferreira, Michael Hübner:
A Parallel-Pipelined OFDM Baseband Modulator with Dynamic Frequency Scaling for 5G Systems. ARC 2018: 511-522 - [c174]Florian Fricke, André Werner, Keyvan Shahin, Michael Hübner:
CGRA Tool Flow for Fast Run-Time Reconfiguration. ARC 2018: 661-672 - [c173]Christos P. Antonopoulos, Georgios Keramidas, Nikolaos S. Voros, Michael Hübner, Fynn Schwiegelshohn, Diana Goehringer, Maria Dagioglou, Georgios Stavrinos, Stasinos Konstantopoulos, Vangelis Karkaletsis:
Robots in Assisted Living Environments as an Unobtrusive, Efficient, Reliable and Modular Solution for Independent Ageing: The RADIO Experience. ARC 2018: 712-723 - [c172]Florian Kästner, Dirk Kuschnerus, Christoph Spiegel, Benedikt Janßen, Michael Hübner:
Design of an efficient Communication Architecture for Cyber-Physical Production Systems. CASE 2018: 829-835 - [c171]Florian Kästner, Florian Werner, Erman Seydioglu, Michael Hübner:
Design and Open Source Implementation of a Reconfigurable Hardware Model Predicitive Controller Using Online Optimization. DASIP 2018: 1-6 - [c170]Florian Kastner, Benedikt Janßen, Frederik Kautz, Michael Hübner, Giulio Corradi:
Hardware/Software Codesign for Convolutional Neural Networks Exploiting Dynamic Partial Reconfiguration on PYNQ. IPDPS Workshops 2018: 154-161 - [c169]Tomás Grimm, Djones Lettnin, Michael Hübner:
ARCHVerifyr: An Embedded Software-Driven Approach for Architecture Verification. ISVLSI 2018: 220-225 - [c168]Safdar Mahmood, Pavel Shydlouski, Michael Hübner:
An Application Specific Framework for HLS-based FPGA Design of Articulated Robot Inverse Kinematics. ReConFig 2018: 1-6 - [c167]Javier Hoffmann, Dirk Kuschnerus, Trevor Jones, Michael Hübner:
Towards a Safety and Energy Aware protocol for Wireless Communication. ReCoSoC 2018: 1-6 - [e13]Nikolaos S. Voros, Michael Hübner, Georgios Keramidas, Diana Goehringer, Christos P. Antonopoulos, Pedro C. Diniz:
Applied Reconfigurable Computing. Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Santorini, Greece, May 2-4, 2018, Proceedings. Lecture Notes in Computer Science 10824, Springer 2018, ISBN 978-3-319-78889-0 [contents] - [i4]Tomás Grimm, Djones Lettnin, Michael Hübner:
A Scalable Approach for Hardware Semiformal Verification. CoRR abs/1801.08446 (2018) - 2017
- [j31]Fynn Schwiegelshohn, Michael Hübner, Philipp Wehner, Diana Göhringer:
Tackling The New Health-Care Paradigm Through Service Robotics: Unobtrusive, efficient, reliable, and modular solutions for assisted-living environments. IEEE Consumer Electron. Mag. 6(3): 34-41 (2017) - [j30]Jones Yudi Mori, Carlos H. Llanos, Michael Hübner:
System-level design space identification for Many-Core Vision Processors. Microprocess. Microsystems 52: 2-22 (2017) - [c166]Florian Kastner, Michael Hübner, Jochen Ohrem, Ludwig Cliisserath:
Towards adaptive and efficient bottling plants in a cyber physical production system environment. AHS 2017: 85-92 - [c165]Osvaldo Navarro, Jones Yudi Mori, Javier Hoffmann, Fabian Stuckmann, Michael Hübner:
A Machine Learning Methodology for Cache Recommendation. ARC 2017: 311-322 - [c164]Florian Fricke, André Werner, Michael Hübner:
Tool flow for automatic generation of architectures and test-cases to enable the evaluation of CGRAs in the context of HPC applications. DASIP 2017: 1-2 - [c163]Florian Kastner, Benedikt Janßen, Sebastian Schwanewilms, Michael Hübner:
A rapid control prototyping platform methodology for decentralized automation. DASIP 2017: 1-2 - [c162]Dirk Stroobandt, Catalin Bogdan Ciobanu, Marco D. Santambrogio, Gabriel Figueiredo, Andreas Brokalakis, Dionisios N. Pnevmatikatos, Michael Hübner, Tobias Becker, Alex J. W. Thom:
An open reconfigurable research platform as stepping stone to exascale high-performance computing. DATE 2017: 416-421 - [c161]Benedikt Janßen, Pascal Zimprich, Michael Hübner:
A dynamic partial reconfigurable overlay concept for PYNQ. FPL 2017: 1-4 - [c160]Benedikt Janßen, Tim Wingender, Michael Hübner:
Hardware Accelerator Framework Approach for Dynamic Partial Reconfigurable Overlays on Xilinx PYNQ. GI-Jahrestagung 2017: 481-492 - [c159]Habib ul Hasan Khan, Thomas Grimm, Michael Hübner, Diana Göhringer:
Access Network Generation for Efficient Debugging of FPGAs. HEART 2017: 25:1-25:6 - [c158]Muhammed Al Kadi, Benedikt Janßen, Michael Hübner:
Floating-Point Arithmetic Using GPGPU on FPGAs. ISVLSI 2017: 134-139 - [c157]Marco Rabozzi, Rolando Brondolin, Giuseppe Natale, Emanuele Del Sozzo, Michael Hübner, Andreas Brokalakis, Catalin Bogdan Ciobanu, Dirk Stroobandt, Marco Domenico Santambrogio:
A CAD Open Platform for High Performance Reconfigurable Systems in the EXTRA Project. ISVLSI 2017: 368-373 - [c156]Tomás Grimm, Djones Lettnin, Michael Hübner:
Semiformal Verification of Software-Controlled Connections. ISVLSI 2017: 556-561 - [c155]Benedikt Janßen, Fatih Korkmaz, Halil Derya, Michael Hübner, Mário Lopes Ferreira, João Canas Ferreira:
Towards a type 0 hypervisor for dynamic reconfigurable systems. ReConFig 2017: 1-7 - [e12]Diana Göhringer, Michael Hübner:
Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, HEART 2017, Bochum, Germany, June 7-9, 2017. ACM 2017, ISBN 978-1-4503-5316-8 [contents] - [i3]Amit Kulkarni, Dirk Stroobandt, André Werner, Florian Fricke, Michael Hübner:
Pixie: A heterogeneous Virtual Coarse-Grained Reconfigurable Array for high performance image processing applications. CoRR abs/1705.01738 (2017) - 2016
- [j29]René Cumplido, Michael Hübner, Michael J. Wirthlin:
Introduction to the special section on FPGAs Technology and Applications. Comput. Electr. Eng. 55: 88-90 (2016) - [j28]Fynn Schwiegelshohn, Eugen Ossovski, Michael Hübner:
A resampling method for parallel particle filter architectures. Microprocess. Microsystems 47: 314-320 (2016) - [j27]Uwe Mönks, Helene Dörksen, Volker Lohweg, Michael Hübner:
Information Fusion of Conflicting Input Data. Sensors 16(11): 1798 (2016) - [j26]Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Michael Hübner, Jean-Philippe Diguet:
A Dynamically Reconfigurable Multi-ASIP Architecture for Multistandard and Multimode Turbo Decoding. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 383-387 (2016) - [c154]Jones Yudi Mori, André Werner, Arij Shallufa, Florian Fricke, Michael Hübner:
A Design Methodology for the Next Generation Real-Time Vision Processors. ARC 2016: 14-25 - [c153]Jones Yudi Mori, Frederik Kautz, Michael Hübner:
Efficient Camera Input System and Memory Partition for a Vision Soft-Processor. ARC 2016: 328-333 - [c152]Georgios Keramidas, Christos P. Antonopoulos, Nikolaos S. Voros, Fynn Schwiegelshohn, Philipp Wehner, Jens Rettkowski, Diana Göhringer, Michael Hübner, Stasinos Konstantopoulos, Theodoros Giannakopoulos, Vangelis Karkaletsis, Vaggelis Mariatos:
Computation and communication challenges to deploy robots in assisted living environments. DATE 2016: 888-893 - [c151]André Lalevee, Pierre-Henri Horrein, Matthieu Arzel, Michael Hübner, Sandrine Vaton:
AutoReloc: Automated Design Flow for Bitstream Relocation on Xilinx FPGAs. DSD 2016: 14-21 - [c150]Benedikt Janßen, Philipp Wehner, Diana Göhringer, Michael Hübner:
Development of advanced driver assistance systems using LabVIEW and a car simulator. WESE 2016: 1:1-1:6 - [c149]Florian Fricke, André Werner, Benedikt Janßen, Michael Hübner, Clemens Ribbe, Cengizhan Inac:
Redesign of an educational robot platform using web-based programming. WESE 2016: 3:1-3:8 - [c148]Muhammed Al Kadi, Benedikt Janßen, Michael Hübner:
FGPU: An SIMT-Architecture for FPGAs. FPGA 2016: 254-263 - [c147]Muhammed Al Kadi, Michael Hübner:
Integer computations with soft GPGPU on FPGAs. FPT 2016: 28-35 - [c146]Osvaldo Navarro, Tim Leiding, Michael Hübner:
A dynamic cache reconfiguration platform for soft real-time systems. ICECS 2016: 388-391 - [c145]Benedikt Janßen, Moataz Naserddin, Michael Hübner:
A Hardware/Software Co-Design Approach for Control Applications with Static Real-Time Reallocation. IPDPS Workshops 2016: 241-246 - [c144]Jones Yudi Mori, André Werner, Florian Fricke, Michael Hübner:
A Rapid Prototyping Method to Reduce the Design Time in Commercial High-Level Synthesis Tools. IPDPS Workshops 2016: 253-258 - [c143]Fynn Schwiegelshohn, Florian Kastner, Michael Hübner:
Enabling Dynamic Reconfiguration of Numerical Methods for the Robotic Motion Control Task. IPDPS Workshops 2016: 283-288 - [c142]Jones Yudi Mori, Michael Hübner:
Multi-level parallelism analysis and system-level simulation for many-core Vision processor design. MECO 2016: 90-95 - [c141]Tomás Grimm, Djones Lettnin, Michael Hübner:
Automatic generation of RTL connectivity checkers from SystemC TLM and IP-XACT descriptions. NORCAS 2016: 1-6 - [c140]Dirk Stroobandt, Ana Lucia Varbanescu, Catalin Bogdan Ciobanu, Muhammed Al Kadi, Andreas Brokalakis, George Charitopoulos, Tim Todman, Xinyu Niu, Dionisios N. Pnevmatikatos, Amit Kulkarni, Elias Vansteenkiste, Wayne Luk, Marco D. Santambrogio, Donatella Sciuto, Michael Hübner, Tobias Becker, Georgi Gaydadjiev, Antonis Nikitakis, Alex J. W. Thom:
EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures. ReCoSoC 2016: 1-7 - [c139]Fynn Schwiegelshohn, Philipp Wehner, Florian Werner, Diana Göhringer, Michael Hübner:
Enabling indoor object localization through Bluetooth beacons on the RADIO robot platform. SAMOS 2016: 328-333 - [e11]Michael Hübner, Cristina Silvano:
Near Threshold Computing, Technology, Methods and Applications. Springer 2016, ISBN 978-3-319-23388-8 [contents] - [e10]Cristina Silvano, Walter Stechele, Stephan Wong, Jerónimo Castrillón, Michael Hübner, Amir Hossein Ashouri:
Proceedings of the 1st International Workshop on RESource Awareness and Application Auto-tuning in Adaptive and heterogeNeous compuTing co-located with 19th International Conference on Design, Automation And Test In Europe (DATE 2016), Dresden, Germany, March 18th, 2016. CEUR Workshop Proceedings 1643, CEUR-WS.org 2016 [contents] - [e9]Cristina Silvano, João M. P. Cardoso, Giovanni Agosta, Michael Hübner:
Proceedings of the 7th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 5th Workshop on Design Tools and Architectures For Multicore Embedded Computing Platforms, PARMA-DITAM 2016, Prague, Czech Republic, January 18, 2016. ACM 2016, ISBN 978-1-4503-4052-6 [contents] - 2015
- [j25]Volker Dworak, Michael Hübner, Jörn Selbeck:
Precise Navigation of Small Agricultural Robots in Sensitive Areas with a Smart Plant Camera. J. Imaging 1(1): 115-133 (2015) - [c138]Fynn Schwiegelshohn, Eugen Ossovski, Michael Hübner:
A Fully Parallel Particle Filter Architecture for FPGAs. ARC 2015: 91-102 - [c137]Nele Mentens, Jochen Vandorpe, Jo Vliegen, An Braeken, Bruno da Silva, Abdellah Touhafi, Alois Kern, Stephan Knappmann, Jens Rettkowski, Muhammed Al Kadi, Diana Göhringer, Michael Hübner:
DynamIA: Dynamic Hardware Reconfiguration in Industrial Applications. ARC 2015: 513-518 - [c136]Christos P. Antonopoulos, Georgios Keramidas, Nikolaos S. Voros, Michael Hübner, Diana Göhringer, Maria Dagioglou, Theodoros Giannakopoulos, Stasinos Konstantopoulos, Vangelis Karkaletsis:
Robots in Assisted Living Environments as an Unobtrusive, Efficient, Reliable and Modular Solution for Independent Ageing: The RADIO Perspective. ARC 2015: 519-530 - [c135]Catalin Bogdan Ciobanu, Ana Lucia Varbanescu, Dionisios N. Pnevmatikatos, George Charitopoulos, Xinyu Niu, Wayne Luk, Marco D. Santambrogio, Donatella Sciuto, Muhammed Al Kadi, Michael Hübner, Tobias Becker, Georgi Gaydadjiev, Andreas Brokalakis, Antonis Nikitakis, Alex J. W. Thom, Elias Vansteenkiste, Dirk Stroobandt:
EXTRA: Towards an Efficient Open Platform for Reconfigurable High Performance Computing. CSE 2015: 339-342 - [c134]Tomás Grimm, Benedikt Janßen, Osvaldo Navarro, Michael Hübner:
The value of FPGAs as reconfigurable hardware enabling Cyber-Physical Systems. ETFA 2015: 1-8 - [c133]Fynn Schwiegelshohn, Philipp Wehner, Jens Rettkowski, Diana Göhringer, Michael Hübner, Georgios Keramidas, Christos P. Antonopoulos, Nikolaos S. Voros:
A Holistic Approach for Advancing Robots in Ambient Assisted Living Environments. EUC 2015: 140-147 - [c132]Jones Yudi Mori, Carlos H. Llanos, Michael Hübner:
A Framework to the Design and Programming of Many-Core Focal-Plane Vision Processors. EUC 2015: 193-198 - [c131]Benedikt Janßen, Fynn Schwiegelshohn, Michael Hübner:
Adaptive computing in real-time applications. NEWCAS 2015: 1-4 - [c130]Maya B. Gokhale, Michael Hübner, René Cumplido:
Message from chairs. ReConFig 2015: 1 - [c129]Timo Jaeschke, Patrick Imberg, Michael Zapke, Michael Hübner, Nils Pohl:
Scalable modular hardware platform for FPGA based industrial radar flowmeters. ReConFig 2015: 1-6 - [c128]Osvaldo Navarro, Tim Leiding, Michael Hübner:
Configurable cache tuning with a victim cache. ReCoSoC 2015: 1-6 - [c127]Fynn Schwiegelshohn, Lars Gierke, Michael Hübner:
FPGA based traffic sign detection for automotive camera systems. ReCoSoC 2015: 1-6 - [c126]Benedikt Janßen, Fynn Schwiegelshohn, Martijn Koedam, François Duhem, Leonard Masing, Stephan Werner, Christophe Huriaux, Antoine Courtay, Emilie Wheatley, Kees Goossens, Fabrice Lemonnier, Philippe Millet, Jürgen Becker, Olivier Sentieys, Michael Hübner:
Designing applications for heterogeneous many-core architectures with the FlexTiles Platform. SAMOS 2015: 254-261 - [c125]Diana Göhringer, Michael Hübner, Jerónimo Castrillón, Cristina Silvano:
ViPES 2015 - Preface. SAMOS 2015: 347 - [e8]Kentaro Sano, Dimitrios Soudris, Michael Hübner, Pedro C. Diniz:
Applied Reconfigurable Computing - 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings. Lecture Notes in Computer Science 9040, Springer 2015, ISBN 978-3-319-16213-3 [contents] - [e7]Giovanni Agosta, Cristina Silvano, João M. P. Cardoso, Michael Hübner:
Proceedings of the 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 4th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2015, Amsterdam, Netherlands, January 21, 2015. ACM 2015, ISBN 978-1-4503-3343-6 [contents] - [e6]Michael Hübner, Maya B. Gokhale, René Cumplido:
International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015, Riviera Maya, Mexico, December 7-9, 2015. IEEE 2015, ISBN 978-1-4673-9406-2 [contents] - 2014
- [j24]Amos Agmon, Moshe Nazarathy, Dan M. Marom, Shalva Ben-Ezra, Alex Tolmachev, Robert I. Killey, Polina Bayvel, Lukas Meder, Michael Hübner, W. Meredith, G. Vickers, Philipp C. Schindler, René Schmogrow, David Hillerkuss, Wolfgang Freude, Christian Koos, Juerg Leuthold:
OFDM/WDM PON With Laserless, Colorless 1 Gb/s ONUs Based on Si-PIC and Slow IC. JOCN 6(3): 225-237 (2014) - [j23]Daniel Chillet, Michael Hübner:
Special issue on design and architectures of real-time image processing in embedded systems. J. Real Time Image Process. 9(1): 1-3 (2014) - [j22]Kostas Siozios, Dimitrios Soudris, Michael Hübner:
A Framework for Supporting Adaptive Fault-Tolerant Solutions. ACM Trans. Embed. Comput. Syst. 13(5s): 169:1-169:22 (2014) - [c124]Quang-Hai Khuat, Daniel Chillet, Michael Hübner:
Considering reconfiguration overhead in scheduling of dependent tasks on 2D reconfigurable FPGA. AHS 2014: 1-8 - [c123]Max Ferger, Michael Hübner:
Instruction Set Optimization for Application Specific Processors. ARC 2014: 268-274 - [c122]Muhammed Al Kadi, Max Ferger, Volker Stegemann, Michael Hübner:
Multi-FPGA reconfigurable system for accelerating MATLAB simulations. FPL 2014: 1-4 - [c121]Kostas Siozios, Dimitrios Soudris, Michael Hübner:
A Framework for Customizing Virtual 3-D Reconfigurable Platforms at Run-Time. IPDPS Workshops 2014: 183-188 - [c120]Philipp Wehner, Fynn Schwiegelshohn, Diana Göhringer, Michael Hübner:
Development of driver assistance systems using virtual hardware-in-the-loop. ISIC 2014: 380-383 - [c119]Benedikt Janßen, Jones Yudi Mori, Osvaldo Navarro, Diana Göhringer, Michael Hübner:
Future Trends on Adaptive Processing Systems. ISPA 2014: 166-173 - [c118]Benedikt Janßen, Michael Hübner, Timo Jaeschke:
An AXI compatible cypress EZ-USB FX3 interface for USB-3.0 SuperSpeed. ReConFig 2014: 1-4 - [c117]Quang-Hai Khuat, Daniel Chillet, Michael Hübner:
Dynamic run-time hardware/software scheduling for 3D reconfigurable SoC. ReConFig 2014: 1-4 - [c116]Jones Yudi Mori, Michael Hübner:
A high-level analysis of a multi-core vision processor using SystemC and TLM2.0. ReConFig 2014: 1-6 - [c115]Osvaldo Navarro, Michael Hübner:
An adaptive victim cache scheme. ReConFig 2014: 1-4 - [c114]Fynn Schwiegelshohn, Michael Hübner:
Design of an attention detection system on the Zynq-7000 SoC. ReConFig 2014: 1-6 - [c113]Fynn Schwiegelshohn, Michael Hübner:
An application scenario for dynamically reconfigurable FPGAs. ReCoSoC 2014: 1-8 - [e5]Cristina Silvano, João M. P. Cardoso, Michael Hübner:
Proceedings of the 5th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 3rd Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2014, Vienna, Austria, January 20, 2014. ACM 2014, ISBN 978-1-4503-2607-0 [contents] - 2013
- [j21]Michael Hübner, Andreas Herkersdorf:
Introduction to the special section on multiprocessor system-on-chip for cyber-physical systems. ACM Trans. Embed. Comput. Syst. 12(1s): 46:1 (2013) - [j20]Nikolaos S. Voros, Michael Hübner, Jürgen Becker, Matthias Kühnle, Florian Thoma, Arnaud Grasset, Paul Brelet, Philippe Bonnot, Fabio Campi, Eberhard Schüler, Henning Sahlbach, Sean Whitty, Rolf Ernst, Enrico Billich, Claudia Tischendorf, Ulrich Heinkel, Frank Ieromnimon, Dimitrios Kritharidis, Axel Schneider, Joachim Knäblein, Wolfram Putzke-Röming:
MORPHEUS: A heterogeneous dynamically reconfigurable platform for designing highly complex embedded systems. ACM Trans. Embed. Comput. Syst. 12(3): 70:1-70:33 (2013) - [j19]Harry Sidiropoulos, Kostas Siozios, Peter Figuli, Dimitrios Soudris, Michael Hübner, Jürgen Becker:
JITPR: A framework for supporting fast application's implementation onto FPGAs. ACM Trans. Reconfigurable Technol. Syst. 6(2): 7:1-7:12 (2013) - [c112]Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Michael Hübner, Jean-Philippe Diguet:
Stopping-Free Dynamic Configuration of a Multi-ASIP Turbo Decoder. DSD 2013: 155-162 - [c111]Michael Hübner:
ViPES Introduction. IPDPS Workshops 2013: 2166-2167 - [c110]Gabriel Marchesan Almeida, Oliver Bellaver Longhi, Thomas Bruckschlögl, Michael Hübner, Fabiano Hessel, Jürgen Becker:
Simplify: A Framework for Enabling Fast Functional/Behavioral Validation of Multiprocessor Architectures in the Cloud. IPDPS Workshops 2013: 2200-2205 - [c109]Kostas Siozios, Dimitrios Soudris, Michael Hübner:
On Supporting Adaptive Fault Tolerant at Run-Time with Virtual FPGAs. IPDPS Workshops 2013: 2206-2211 - [c108]Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet, Jean-Noel Bazin, Michael Hübner:
Optimizations for an efficient reconfiguration of an ASIP-based turbo decoder. ISCAS 2013: 493-496 - [c107]Vianney Lapotre, Purushotham Murugappa, Guy Gogniat, Amer Baghdadi, Jean-Philippe Diguet, Jean-Noel Bazin, Michael Hübner:
A reconfigurable multi-standard ASIP-based turbo decoder for an efficient dynamic reconfiguration in a multi-ASIP context. ISVLSI 2013: 40-45 - [c106]Amos Agmon, Moshe Nazarathy, Dan M. Marom, Shalva Ben-Ezra, Alex Tolmachev, Robert I. Killey, Polina Bayvel, Lukas Meder, Michael Hübner, W. Meredith, G. Vickers, Philipp C. Schindler, René Schmogrow, David Hillerkuss, Wolfgang Freude, Juerg Leuthold:
Bi-directional ultra-dense polarization-diverse OFDM/WDM PON with laserless colorless 1Gb/s ONUs based on Si PICs and <417 MHz mixed-signal ICs. OFC/NFOEC 2013: 1-3 - [c105]Muhammed Al Kadi, Patrick Rudolph, Diana Göhringer, Michael Hübner:
Dynamic and partial reconfiguration of Zynq 7000 under Linux. ReConFig 2013: 1-5 - [c104]Vianney Lapotre, Michael Hübner, Guy Gogniat, Purushotham Murugappa, Amer Baghdadi, Jean-Philippe Diguet:
An efficient on-chip configuration infrastructure for a flexible multi-ASIP turbo decoder architecture. ReCoSoC 2013: 1-8 - [c103]Philipp Wehner, Max Ferger, Diana Göhringer, Michael Hübner:
Rapid prototyping of a portable HW/SW co-design on the virtual zynq platform using SystemC. SoCC 2013: 296-300 - 2012
- [j18]Diana Göhringer, Lukas Meder, Stephan Werner, Oliver Oey, Jürgen Becker, Michael Hübner:
Adaptive Multiclient Network-on-Chip Memory Core: Hardware Architecture, Software Abstraction Layer, and Application Exploration. Int. J. Reconfigurable Comput. 2012: 298561:1-298561:14 (2012) - [j17]David Hillerkuss, René Schmogrow, Matthias Meyer, Stefan Wolf, Meinert Jordan, Philipp Kleinow, Nicole Lindenmann, Philipp C. Schindler, Argishti Melikyan, Xin Yang, Shalva Ben-Ezra, Bernd Nebendahl, Michael Dreschmann, Joachim Meyer, Francesca Parmigiani, Periklis Petropoulos, Bojan Resan, Andreas Oehler, Kurt Weingarten, Lars Altenhain, Tobias Ellermeyer, Michael Möller, Michael Hübner, Jürgen Becker, Christian Koos, Wolfgang Freude, Juerg Leuthold:
Single-Laser 325 Tbit/s Nyquist WDM Transmission. JOCN 4(10): 715-723 (2012) - [j16]Michael Hübner:
Introduction to the Special Issue on ReCoSoC 2011. ACM Trans. Reconfigurable Technol. Syst. 5(3): 11:1 (2012) - [c102]Nadine Dahm, Michael Hübner, Jürgen Becker:
FPGA system-on-chip solution for a field oriented hybrid stepper motor control. SSD 2012: 1-6 - [c101]Michael Rückauer, Joachim Meyer, Thorsten Schubert, Michael Hübner, Dieter Scheurer, Jürgen Becker:
Realtime PCI Express monitoring for self adaptive reconfigurable systems. SSD 2012: 1-6 - [c100]Ali Azarian, João Canas Ferreira, Stephan Werner, Zlatko Petrov, João M. P. Cardoso, Michael Hübner:
Analysis of error detection schemes: Toolchain support and hardware/software implications. AHS 2012: 62-69 - [c99]Jörg Henkel, Andreas Herkersdorf, Lars Bauer, Thomas Wild, Michael Hübner, Ravi Kumar Pujari, Artjom Grudnitsky, Jan Heisswolf, Aurang Zaib, Benjamin Vogel, Vahid Lari, Sebastian Kobbe:
Invasive manycore architectures. ASP-DAC 2012: 193-200 - [c98]Max Ferger, Muhammed Al Kadi, Michael Hübner, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Gabriel Marchesan Almeida, José Rodrigo Azambuja, Jürgen Becker:
Hardware / Software Virtualization for the Reconfigurable Multicore Platform. CSE 2012: 341-344 - [c97]Oliver Oey, Stephan Werner, Diana Göhringer, Andreas Stuckert, Jürgen Becker, Michael Hübner:
Virtualization of heterogeneous and adaptive multi-core/multi-board systems. DASIP 2012: 1-2 - [c96]Stephan Werner, Oliver Oey, Diana Göhringer, Michael Hübner, Jürgen Becker:
Virtualized on-chip distributed computing for heterogeneous reconfigurable multi-core systems. DATE 2012: 280-283 - [c95]Jürgen Becker, Timo Stripf, Oliver Oey, Michael Hübner, Steven Derrien, Daniel Ménard, Olivier Sentieys, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Kostas Masselos, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Dimitrios Kritharidis, Nikolaos Mitas, Diana Göhringer:
From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach. DSD 2012: 114-121 - [c94]Michael Dreschmann, Joachim Meyer, Michael Hübner, René Schmogrow, David Hillerkuss, Jürgen Becker, Juerg Leuthold, Wolfgang Freude:
Time and frequency synchronization for ultra-high speed OFDM systems. ICNC 2012: 871-875 - [c93]Jürgen Becker, Jinian Bian, Christophe Bobda, René Cumplido, Michael Hübner:
RAW Introduction. IPDPS Workshops 2012: 208-212 - [c92]Harry Sidiropoulos, Kostas Siozios, Peter Figuli, Dimitrios Soudris, Michael Hübner:
On Supporting Efficient Partial Reconfiguration with Just-In-Time Compilation. IPDPS Workshops 2012: 328-335 - [c91]Carsten Tradowsky, Florian Thoma, Michael Hübner, Jürgen Becker:
On Dynamic Run-time Processor Pipeline Reconfiguration. IPDPS Workshops 2012: 419-424 - [c90]Carsten Tradowsky, Enrique Cordero, Thorsten Deuser, Michael Hübner, Jürgen Becker:
Determination of on-chip temperature gradients on reconfigurable hardware. ReConFig 2012: 1-8 - [c89]Diana Göhringer, Mounir Chemaou, Michael Hübner:
Invited paper: On-chip monitoring for adaptive heterogeneous multicore systems. ReCoSoC 2012: 1-7 - [c88]Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Ralf König, Michael Hübner, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Daniel Ménard, Olivier Sentieys, Diana Göhringer, Thomas Perschke:
A flexible approach for compiling scilab to reconfigurable multi-core embedded systems. ReCoSoC 2012: 1-8 - [c87]Fabrice Lemonnier, Philippe Millet, Gabriel Marchesan Almeida, Michael Hübner, Jürgen Becker, Sébastien Pillement, Olivier Sentieys, Martijn Koedam, Shubhendu Sinha, Kees Goossens, Christian Piguet, Marc-Nicolas Morgan, Romain Lemaire:
Towards future adaptive multiprocessor systems-on-chip: An innovative approach for flexible architectures. ICSAMOS 2012: 228-235 - [c86]Michael Hübner, Diana Göhringer, Carsten Tradowsky, Jörg Henkel, Jürgen Becker:
Adaptive processor architecture - invited paper. ICSAMOS 2012: 244-251 - [c85]George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Göhringer, Steven Derrien, Daniel Ménard, Olivier Sentieys, Michael Hübner, Timo Stripf, Oliver Oey, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas:
From Scilab to multicore embedded systems: Algorithms and methodologies. ICSAMOS 2012: 268-275 - [c84]Carsten Tradowsky, Florian Thoma, Michael Hübner, Jürgen Becker:
LISPARC: Using an architecture description language approach for modelling an adaptive processor microarchitecture. SIES 2012: 279-282 - [c83]Christoph Roth, Simon Reder, Oliver Sander, Michael Hübner, Jürgen Becker:
A Framework for exploration of parallel SystemC simulation on the single-chip cloud computer. SimuTools 2012: 202-207 - [i2]David Hillerkuss, René Schmogrow, Matthias Meyer, Stefan Wolf, Meinert Jordan, Philipp Kleinow, Nicole Lindenmann, Philipp C. Schindler, Argishti Melikyan, Xin Yang, Shalva Ben-Ezra, Bernd Nebendahl, Michael Dreschmann, Joachim Meyer, Francesca Parmigiani, Periklis Petropoulos, Bojan Resan, Andreas Oehler, Kurt Weingarten, Lars Altenhain, Tobias Ellermeyer, Matthias Moeller, Michael Hübner, Jürgen Becker, Christian Koos, Wolfgang Freude, Juerg Leuthold:
Single-laser 32.5 Tbit/s Nyquist WDM transmission. CoRR abs/1203.2516 (2012) - 2011
- [j15]Arnaud Grasset, Philippe Millet, Philippe Bonnot, Sami Yehia, Wolfram Putzke-Röming, Fabio Campi, Alberto Rosti, Michael Hübner, Nikolaos S. Voros, Davide Rossi, Henning Sahlbach, Rolf Ernst:
The MORPHEUS Heterogeneous Dynamically Reconfigurable Platform. Int. J. Parallel Program. 39(3): 328-356 (2011) - [j14]Diana Göhringer, Michael Hübner, Etienne Nguepi Zeutebouo, Jürgen Becker:
Operating System for Runtime Reconfigurable Multiprocessor Systems. Int. J. Reconfigurable Comput. 2011: 121353:1-121353:16 (2011) - [j13]Michael Hübner, Jürgen Becker, Loïc Lagadec, Gilles Sassatelli:
Selected Papers from the International Workshop on Reconfigurable Communication-Centric Systems on Chips (ReCoSoC' 2010). Int. J. Reconfigurable Comput. 2011: 865402:1 (2011) - [j12]Matthias Birk, Clemens Hagner, Matthias Norbert Balzer, Nicole V. Ruiter, Michael Hübner, Jürgen Becker:
Evaluation of the Reconfiguration of the Data Acquisition System for 3D USCT. Int. J. Reconfigurable Comput. 2011: 952937:1-952937:9 (2011) - [j11]Diana Göhringer, Jonathan Obie, André L. S. Braga, Michael Hübner, Carlos H. Llanos, Jürgen Becker:
Exploration of the Power-Performance Tradeoff through Parameterization of FPGA-Based Multiprocessor Systems. Int. J. Reconfigurable Comput. 2011: 985931:1-985931:17 (2011) - [c82]Monica Magalhães Pereira, Lars Braun, Michael Hübner, Jürgen Becker, Luigi Carro:
Run-time resource instantiation for fault tolerance in FPGAs. AHS 2011: 88-95 - [c81]Peter Figuli, Michael Hübner, Romuald Girardey, Falco Bapp, Thomas Bruckschlögl, Florian Thoma, Jörg Henkel, Jürgen Becker:
A heterogeneous SoC architecture with embedded virtual FPGA cores and runtime Core Fusion. AHS 2011: 96-103 - [c80]Matthias Birk, Alexander Guth, Michael Zapf, Matthias Norbert Balzer, Nicole V. Ruiter, Michael Hübner, Jürgen Becker:
Acceleration of image reconstruction in 3D ultrasound computer tomography: An evaluation of CPU, GPU and FPGA computing. DASIP 2011: 67-74 - [c79]Natalie Frietsch, I. Pashkovskiy, Gert F. Trommer, Lars Braun, Matthias Birk, Michael Hübner, Jürgen Becker:
Development of a method for image-based motion estimation of a VTOL-MAV on FPGA. DASIP 2011: 201-208 - [c78]Joachim Meyer, Juanjo Noguera, Michael Hübner, Lars Braun, Oliver Sander, R. M. Gil, Rodney Stewart, Jürgen Becker:
Fast Start-up for Spartan-6 FPGAs using Dynamic Partial Reconfiguration. DATE 2011: 1542-1547 - [c77]Joachim Meyer, Juanjo Noguera, Michael Hübner, Rodney Stewart, Jürgen Becker:
Embedded Systems Start-Up under Timing Constraints on Modern FPGAs. FPL 2011: 103-109 - [c76]Diana Göhringer, Stephan Werner, Michael Hübner, Jürgen Becker:
RAMPSoCVM: Runtime Support and Hardware Virtualization for a Runtime Adaptive MPSoC. FPL 2011: 181-184 - [c75]Michael Hübner, Peter Figuli, Romuald Girardey, Dimitrios Soudris, Kostas Siozios, Jürgen Becker:
A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture. IPDPS Workshops 2011: 143-149 - [c74]Christian Schuck, Bastian Haetzer, Michael Hübner, Jürgen Becker:
Online Routing of FPGA Clock Networks for Module Relocation in Partial Reconfigurable Multi Clock Designs. IPDPS Workshops 2011: 181-188 - [c73]Matthias Rümmele-Werner, Thomas Perschke, Lars Braun, Michael Hübner, Jürgen Becker:
A FPGA based fast runtime reconfigurable real-time Multi-Object-Tracker. ISCAS 2011: 853-856 - [c72]Florian Thoma, Michael Hübner, Diana Göhringer, Hasan Ümitcan Yilmaz, Jürgen Becker:
Power and performance optimization through MPI supported dynamic voltage and frequency scaling. MARC Symposium 2011: 75-78 - [c71]Diana Göhringer, Lukas Meder, Michael Hübner, Jürgen Becker:
Adaptive Multi-client Network-on-Chip Memory. ReConFig 2011: 7-12 - [c70]Michael Hübner, Carsten Tradowsky, Diana Göhringer, Lars Braun, Florian Thoma, Jörg Henkel, Jürgen Becker:
Dynamic Processor Reconfiguration. ReConFig 2011: 123-128 - [c69]Nadine Dahm, Michael Hübner, Jürgen Becker:
Approach of an FPGA based adaptive stepper motor control system. ReCoSoC 2011: 1-6 - [c68]Diana Göhringer, Oliver Oey, Michael Hübner, Jürgen Becker:
Heterogeneous and runtime parameterizable Star-Wheels Network-on-Chip. ICSAMOS 2011: 380-387 - [c67]José Rodrigo Azambuja, Samuel Pagliarini, Maurício Altieri, Fernanda Lima Kastensmidt, Michael Hübner, Jürgen Becker:
Using dynamic partial reconfiguration to detect sees in microprocessors through non-intrusive hybrid technique. SBCCI 2011: 161-166 - [p2]Diana Göhringer, Michael Hübner, Jürgen Becker:
Adaptive Multiprocessor System-on-Chip Architecture: New Degrees of Freedom in System Design and Runtime Support. Multiprocessor System-on-Chip 2011: 127-151 - [e4]Michael Hübner, Jürgen Becker:
Multiprocessor System-on-Chip - Hardware Design and Tool Integration. Springer 2011, ISBN 978-1-4419-6459-5 [contents] - [e3]Nikolaos S. Voros, Amar Mukherjee, Nicolas Sklavos, Konstantinos Masselos, Michael Hübner:
VLSI 2010 Annual Symposium - Selected papers. Lecture Notes in Electrical Engineering 105, Springer 2011, ISBN 978-94-007-1487-8 [contents] - [e2]Diana Göhringer, Michael Hübner, Jürgen Becker:
3rd Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, Ettlingen, Germany, July 5-6, 2011. KIT Scientific Publishing, Karlsruhe 2011, ISBN 978-3-86644-717-2 [contents] - 2010
- [j10]Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner, Jürgen Becker:
Design Assurance Strategy and Toolset for Partially Reconfigurable FPGA Systems. ACM Trans. Reconfigurable Technol. Syst. 4(1): 4:1-4:26 (2010) - [c66]André L. S. Braga, Carlos H. Llanos, Diana Göhringer, Jonathan Obie, Jürgen Becker, Michael Hübner:
Performance, accuracy, power consumption and resource utilization analysis for hardware / software realized Artificial Neural Networks. BIC-TA 2010: 1629-1636 - [c65]Pedro C. Diniz, Marco Danelutto, Denis Barthou, Marc Gonzales, Michael Hübner:
High Performance Architectures and Compilers. Euro-Par (1) 2010: 254-255 - [c64]Diana Göhringer, Michael Hübner, Michael Benz, Jürgen Becker:
A Design Methodology for Application Partitioning and Architecture Development of Reconfigurable Multiprocessor Systems-on-Chip. FCCM 2010: 259-262 - [c63]Diana Göhringer, Michael Hübner, Michael Benz, Jürgen Becker:
A semi-automatic toolchain for reconfigurable multiprocessor systems-on-chip: architecture development and application partitioning (abstract only). FPGA 2010: 286 - [c62]Michael Dreschmann, Michael Hübner, Moritz Röger, Oliver Sander, Christos Klamouris, Jürgen Becker, Wolfgang Freude, Juerg Leuthold:
Reconfigurable Hardware for Power-over-Fiber Applications. FPL 2010: 525-531 - [c61]Andreas Kern, Christoph Schmutzler, Thilo Streichert, Michael Hübner, Jürgen Teich:
Network Bandwidth Optimization of Ethernet-Based Streaming Applications in Automotive Embedded Systems. ICCCN 2010: 1-6 - [c60]Diana Göhringer, Michael Hübner, Etienne Nguepi Zeutebouo, Jürgen Becker:
CAP-OS: Operating system for runtime scheduling, task mapping and resource management on reconfigurable multiprocessor architectures. IPDPS Workshops 2010: 1-8 - [c59]Michael Hübner, Diana Göhringer, Juanjo Noguera, Jürgen Becker:
Fast dynamic and partial reconfiguration data path with low hardware overhead on Xilinx FPGAs. IPDPS Workshops 2010: 1-8 - [c58]Romuald Girardey, Michael Hübner, Jürgen Becker:
Safety Aware Place and Route for On-Chip Redundancy in Safety Critical Applications. ISVLSI 2010: 74-79 - [c57]Michael Hübner, Joachim Meyer, Oliver Sander, Lars Braun, Jürgen Becker, Juanjo Noguera, Rodney Stewart:
Fast Sequential FPGA Startup Based on Partial and Dynamic Reconfiguration. ISVLSI 2010: 190-194 - [c56]Joachim Meyer, Michael Hübner, Lars Braun, Oliver Sander, Juanjo Noguera, Rodney Stewart, Jürgen Becker:
FPGA Startup Through Sequential Partial and Dynamic Reconfiguration. ISVLSI (Selected papers) 2010: 289-302 - [c55]Mahtab Niknahad, Michael Hübner, Jürgen Becker:
Reliability Analysis and Improvement in Nano Scale Design. ISVLSI 2010: 299-303 - [c54]Romuald Girardey, Michael Hübner, Jürgen Becker:
Mixed-Signal Diverse Redundant System for Safety Critical Applications in FPGA. ISVLSI 2010: 469-470 - [c53]Diana Goehringer, Jonathan Obie, Michael Hübner, Jürgen Becker:
Impact of Task Distribution, Processor Configurations and Dynamic Clock Frequency Scaling on the Power Consumption of FPGA-based Multiprocessors. ReCoSoC 2010: 13-20 - [c52]Matthias Birk, Clemens Hagner, Matthias Norbert Balzer, Nicole V. Ruiter, Michael Hübner, Jürgen Becker:
First Evaluation of FPGA Reconfiguration for 3D Ultrasound Computer Tomography. ReCoSoC 2010: 109-114 - [c51]Diana Göhringer, Michael Hübner, Laure Hugot-Derville, Jürgen Becker:
Message Passing Interface support for the runtime adaptive multi-processor system-on-chip RAMPSoC. ICSAMOS 2010: 357-364 - [p1]Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Michael Ullmann, Klaus D. Müller-Glaser, Jürgen Becker:
Adaptive Runtime System with Intelligent Allocation of Dynamically Reconfigurable Function Model and Optimized Interface Topologies. Dynamically Reconfigurable Systems 2010: 245-267 - [e1]Michael Hübner, Loïc Lagadec, Oliver Sander, Jürgen Becker:
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, ReCoSoC 2010, Karlsruhe, Germany, May 17-19, 2010. KIT Scientific Reports 7551, KIT Scientific Publishing 2010, ISBN 978-3-86644-515-4 [contents]
2000 – 2009
- 2009
- [j9]Diana Göhringer, Thomas Perschke, Michael Hübner, Jürgen Becker:
A Taxonomy of Reconfigurable Single-/Multiprocessor Systems-on-Chip. Int. J. Reconfigurable Comput. 2009: 395018:1-395018:11 (2009) - [j8]Michael Hübner, Juan Manuel Moreno, Gilles Sassatelli, Peter Zipf:
Selected Papers from ReCoSoC 2008. Int. J. Reconfigurable Comput. 2009: 894059:1-894059:2 (2009) - [j7]Lars Braun, Diana Göhringer, Thomas Perschke, Volker Schatz, Michael Hübner, Jürgen Becker:
Adaptive real-time image processing exploiting two dimensional reconfigurable architecture. J. Real Time Image Process. 4(2): 109-125 (2009) - [j6]Katarina Paulsson, Michael Hübner, Jürgen Becker:
Dynamic power optimization by exploiting self-reconfiguration in Xilinx Spartan 3-based systems. Microprocess. Microsystems 33(1): 46-52 (2009) - [c50]Krzysztof Kepa, Fearghal Morgan, Krzysztof Kosciuszkiewicz, Lars Braun, Michael Hübner, Jürgen Becker:
FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing. ARC 2009: 62-73 - [c49]Diana Göhringer, Bin Liu, Michael Hübner, Jürgen Becker:
Star-Wheels Network-on-Chip featuring a self-adaptive mixed topology and a synergy of a circuit - and a packet-switching communication protocol. FPL 2009: 320-325 - [c48]Romuald Girardey, Michael Hübner, Jürgen Becker:
Dynamic reconfigurable mixed-signal architecture for safety critical applications. FPL 2009: 503-506 - [c47]Davide Rossi, Fabio Campi, Antonio Deledda, Claudio Mucci, Stefano Pucillo, Sean Whitty, Rolf Ernst, Stéphane Chevobbe, Stéphane Guyetant, Matthias Kühnle, Michael Hübner, Jürgen Becker, Wolfram Putzke-Röming:
A multi-core signal processor for heterogeneous reconfigurable computing. SoC 2009: 106-109 - [c46]Fabio Campi, Ralf König, Michael Dreschmann, M. Neukirchner, Damien Picard, M. Jüttner, Eberhard Schüler, Antonio Deledda, Davide Rossi, Alberto Pasini, Michael Hübner, Jürgen Becker, Roberto Guerrieri:
RTL-to-layout implementation of an embedded coarse grained architecture for dynamically reconfigurable computing in systems-on-chip. SoC 2009: 110-113 - [c45]Juan Fernando Eusse Giraldo, Michael Hübner, Ricardo Pezzuol Jacobi:
BRICK: a multi-context expression grained reconfigurable architecture. SBCCI 2009 - [c44]Mahtab Niknahad, Michael Hübner, Jürgen Becker:
Method for improving performance in online routing of reconfigurable nano architectures. SoCC 2009: 65-68 - 2008
- [j5]Matthias Kühnle, Michael Hübner, Jürgen Becker, Antonio Deledda, Claudio Mucci, Florian Ries, Marcello Coppola, Lorenzo Pieralisi, Riccardo Locatelli, Giuseppe Maruccia, Tommaso DeMarco, Fabio Campi:
An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC. IEEE Des. Test Comput. 25(5): 442-451 (2008) - [j4]Jürgen Becker, Michael Hübner, Roger F. Woods, Philip Heng Wai Leong, Robert Esser, Lionel Torres:
Current Trends on Reconfigurable Computing. Int. J. Reconfigurable Comput. 2008: 918525:1 (2008) - [c43]Oliver Sander, Lars Braun, Michael Hübner, Jürgen Becker:
Data reallocation by exploiting FPGA configuration mechanisms. ARC 2008: 308-313 - [c42]Jürgen Becker, Michael Hübner, Robert Esser, Andreas Herkersdorf, Walter Stechele, Vera Lauer:
Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems. DATE 2008 - [c41]Katarina Paulsson, Michael Hübner, Jürgen Becker:
Cost-and Power Optimized FPGA based System Integration: Methodologies and Integration of a Low-Power Capacity-based Measurement Application on Xilinx FPGAs. DATE 2008: 50-55 - [c40]Antonio Deledda, Claudio Mucci, Arseni Vitkovski, Philippe Bonnot, Arnaud Grasset, Philippe Millet, Matthias Kühnle, Florian Ries, Michael Hübner, Jürgen Becker, Massimo Coppola, Lorenzo Pieralisi, Riccardo Locatelli, Giuseppe Maruccia, Fabio Campi, Tommaso DeMarco:
Design of a HW/SW Communication Infrastructure for a Heterogeneous Reconfigurable Processor. DATE 2008: 1352-1357 - [c39]Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker:
Fine grain reconfigurable architectures. FPL 2008: 348 - [c38]Diana Göhringer, Michael Hübner, Thomas Perschke, Jürgen Becker:
New dimensions for multiprocessor architectures: Ondemand heterogeneity, infrastructure and performance through reconfigurability - the RAMPSoC approach. FPL 2008: 495-498 - [c37]Christopher Claus, Bin Zhang, Walter Stechele, Lars Braun, Michael Hübner, Jürgen Becker:
A multi-platform controller allowing for maximum Dynamic Partial Reconfiguration throughput. FPL 2008: 535-538 - [c36]Lars Braun, Katarina Paulsson, Herrmann Krömer, Michael Hübner, Jürgen Becker:
Data path driven waveform-like reconfiguration. FPL 2008: 607-610 - [c35]Katarina Paulsson, Michael Hübner, Jürgen Becker:
Exploitation of dynamic and partial hardware reconfiguration for on-line power/performance optimization. FPL 2008: 699-700 - [c34]Oliver Sander, Michael Hübner, Jürgen Becker, Matthias Traub:
Reducing latency times by accelerated routing mechanisms for an FPGA gateway in the automotive domain. FPT 2008: 97-104 - [c33]Diana Göhringer, Michael Hübner, Volker Schatz, Jürgen Becker:
Runtime adaptive multi-processor system-on-chip: RAMPSoC. IPDPS 2008: 1-7 - [c32]Michael Hübner, Lars Braun, Diana Göhringer, Jürgen Becker:
Run-time reconfigurable adaptive multilayer network-on-chip for FPGA-based systems. IPDPS 2008: 1-6 - [c31]Christian Schuck, Matthias Kühnle, Michael Hübner, Jürgen Becker:
A framework for dynamic 2D placement on FPGAs. IPDPS 2008: 1-7 - [c30]Katarina Paulsson, Ulrich Viereck, Michael Hübner, Jürgen Becker:
Exploitation of the External JTAG Interface for Internally Controlled Configuration Readback and Self-Reconfiguration of Spartan 3 FPGAs. ISVLSI 2008: 304-309 - [c29]Juanjo Noguera, Robert Esser, Katarina Paulsson, Michael Hübner, Jürgen Becker:
Towards Novel Approaches in Design Automation for FPGA Power Optimization. PATMOS 2008: 419-428 - 2007
- [j3]Jürgen Becker, Michael Hübner, Gerhard Hettich, Rainer Constapel, Joachim Eisenmann, Jürgen Luka:
Dynamic and Partial FPGA Exploitation. Proc. IEEE 95(2): 438-452 (2007) - [c28]Katarina Paulsson, Michael Hübner, Günther Auer, Michael Dreschmann, Jürgen Becker:
Implementation of a Virtual Internal Configuration Access Port (JCAP) for Enabling Partial Self-Reconfiguration on Xilinx Spartan III FPGAs. FPL 2007: 351-356 - [c27]Katarina Paulsson, Michael Hübner, Jürgen Becker, Jean-Marc Philippe, Christian Gamrat:
On-line Routing of Reconfigurable Functions for Future Self-Adaptive Systems - Investigations within the ÆTHER Project. FPL 2007: 415-422 - [c26]Lars Braun, Michael Hübner, Jürgen Becker, Thomas Perschke, Volker Schatz, Stefan Bach:
Circuit Switched Run-Time Adaptive Network-on-Chip for Image Processing Applications. FPL 2007: 688-691 - [c25]Philipp Graf, Michael Hübner, Klaus D. Müller-Glaser, Jürgen Becker:
A Graphical Model-Level Debugger for Heterogenous Reconfigurable Architectures. FPL 2007: 722-725 - [c24]Thilo Pionteck, Carsten Albrecht, Roman Koch, Erik Maehle, Michael Hübner, Jürgen Becker:
Communication Architectures for Dynamically Reconfigurable FPGA Designs. IPDPS 2007: 1-8 - [c23]Alisson Vasconcelos de Brito, Matthias Kühnle, Michael Hübner, Jürgen Becker, Elmar U. K. Melcher:
Modelling and Simulation of Dynamic and Partially Reconfigurable Systems using SystemC. ISVLSI 2007: 35-40 - [c22]Michael Hübner, Lars Braun, Jürgen Becker, Christopher Claus, Walter Stechele:
Physical Configuration On-Line Visualization of Xilinx Virtex-II FPGAs. ISVLSI 2007: 41-46 - [c21]Katarina Paulsson, Michael Hübner, Salih Bayar, Jürgen Becker:
Exploitation of Run-Time Partial Reconfiguration for Dynamic Power Management in Xilinx Spartan III-based Systems. ReCoSoC 2007: 1-6 - [c20]Jürgen Becker, Adam Donlin, Michael Hübner:
New tool support and architectures in adaptive reconfigurable computing. VLSI-SoC 2007: 134-139 - 2006
- [c19]Katarina Paulsson, Michael Hübner, Jürgen Becker:
Strategies to On- Line Failure Recovery in Self- Adaptive Systems based on Dynamic and Partial Reconfiguration. AHS 2006: 288-291 - [c18]Michael Hübner, Christian Schuck, Jürgen Becker:
Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs. IPDPS 2006 - [c17]Michael Hübner, Christian Schuck, Matthias Kühnle, Jürgen Becker:
New 2-Dimensional Partial Dynamic Reconfiguration Techniques for Real-time Adaptive Microelectronic Circuits. ISVLSI 2006: 97-102 - [c16]Katarina Paulsson, Michael Hübner, Markus Jung, Jürgen Becker:
Methods for Run-time Failure Recognition and Recovery in dynamic and partial Reconfigurable Systems Based on Xilinx Virtex-II Pro FPGAs. ISVLSI 2006: 159-166 - [c15]Michael Hübner, Jürgen Becker:
Exploiting dynamic and partial reconfiguration for FPGAs: toolflow, architecture and system integration. SBCCI 2006: 1-4 - [c14]Jürgen Becker, Michael Hübner:
Run-time reconfigurabilility and other future trends. SBCCI 2006: 9-11 - [c13]Katarina Paulsson, Michael Hübner, Jürgen Becker:
On-line optimization of FPGA power-dissipation by exploiting run-time adaption of communication primitives. SBCCI 2006: 173-178 - [i1]Jürgen Becker, Michael Hübner, Katarina Paulsson:
Physical 2D Morphware and Power Reduction Methods for Everyone. Dynamically Reconfigurable Architectures 2006 - 2005
- [j2]Michael Ullmann, Michael Hübner, Jürgen Becker:
On-demand FPGA run-time system for flexible and dynamical reconfiguration. Int. J. Embed. Syst. 1(3/4): 193-204 (2005) - [j1]Michael Hübner, Michael Ullmann, Jürgen Becker:
Realtime configuration code decompression for dynamic FPGA self reconfiguration: evaluation and implementation. Int. J. Embed. Syst. 1(3/4): 263-273 (2005) - [c12]Michael Hübner, Katarina Paulsson, Marcus Stitz, Jürgen Becker:
Novel Seamless Design-Flow for Partial and Dynamic Reconfigurable Systems with Customized Communication Structures based on Xilinx Virtex-II FPGAs. ARCS Workshops 2005: 39-44 - [c11]Michael Hübner, Katarina Paulsson, Jürgen Becker:
Parallel and Flexible Multiprocessor System-On-Chip for Adaptive Automotive Applications based on Xilinx MicroBlaze Soft-Cores. IPDPS 2005 - [c10]Jürgen Becker, Michael Hübner, Katarina Paulsson, Alexander Thomas:
Dynamic Reconfiguration On-Demand: Real-time Adaptivity in Next Generation Microelectronics. ReCoSoC 2005: 35-42 - [c9]Adam Donlin, Jürgen Becker, Michael Hübner:
I Models and Tools for the Dynamic Reconfiguration of FPGAs. SoCC 2005: 313-316 - 2004
- [c8]Michael Ullmann, Michael Hübner, Björn Grimm, Jürgen Becker:
On-Demand FPGA Run-Time System for Dynamical Reconfiguration with Adaptive Priorities. FPL 2004: 454-463 - [c7]Brandon Blodget, Christophe Bobda, Michael Hübner, Adronis Niyonkuru:
Partial and Dynamically Reconfiguration of Xilinx Virtex-II FPGAs. FPL 2004: 801-810 - [c6]Michael Hübner, Michael Ullmann, Lars Braun, A. Klausmann, Jürgen Becker:
Scalable Application-Dependent Network on Chip Adaptivity for Dynamical Reconfigurable Real-Time Systems. FPL 2004: 1037-1041 - [c5]Michael Ullmann, Michael Hübner, Björn Grimm, Jürgen Becker:
An FPGA Run-Time System for Dynamical On-Demand Reconfiguration. IPDPS 2004 - [c4]Michael Hübner, Tobias Becker, Jürgen Becker:
Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration. SBCCI 2004: 28-32 - 2003
- [c3]Jürgen Becker, Michael Hübner, Michael Ullmann:
Power Estimation and Power Measurement of Xilinx Virtex FPGAs: Trade-Offs and Limitations. SBCCI 2003: 283-288 - [c2]Jürgen Becker, Michael Hübner, Michael Ullmann:
Run-Time FPGA Reconfiguration for Power-/Cost-Optimized Real-time Systems. VLSI-SoC (Selected Papers) 2003: 119-132 - [c1]Jürgen Becker, Michael Hübner, Michael Ullmann:
Real-Time Dynamically Run-Time Reconfiguration for Power-/Cost-optimized Virtex FPGA Realizations. VLSI-SOC 2003: 129-
Coauthor Index
[c215] [c126] [j20] [j19] [c110] [j18] [j17] [c102] [c101] [c98] [c97] [c96] [c95] [c94] [c93] [c91] [c90] [c88] [c87] [c86] [c85] [c84] [c83] [i2] [j14] [j13] [j12] [j11] [c82] [c81] [c80] [c79] [c78] [c77] [c76] [c75] [c74] [c73] [c72] [c71] [c70] [c69] [c68] [c67] [p2] [e4] [e2] [j10] [c66] [c64] [c63] [c62] [c60] [c59] [c58] [c57] [c56] [c55] [c54] [c53] [c52] [c51] [p1] [e1] [j9] [j7] [j6] [c50] [c49] [c48] [c47] [c46] [c44] [j5] [j4] [c43] [c42] [c41] [c40] [c39] [c38] [c37] [c36] [c35] [c34] [c33] [c32] [c31] [c30] [c29] [j3] [c28] [c27] [c26] [c25] [c24] [c23] [c22] [c21] [c20] [c19] [c18] [c17] [c16] [c15] [c14] [c13] [i1] [j2] [j1] [c12] [c11] [c10] [c9] [c8] [c6] [c5] [c4] [c3] [c2] [c1]
Diana Göhringer
aka: Diana Goehringer
aka: Diana Goehringer
[c203] [c197] [j41] [j37] [c195] [c180] [c179] [c173] [e13] [j31] [c159] [e12] [c152] [c150] [c139] [c137] [c136] [c133] [c125] [c120] [c119] [c105] [c103] [j18] [c97] [c96] [c95] [c89] [c88] [c86] [c85] [j14] [j11] [c76] [c72] [c71] [c70] [c68] [p2] [e2] [c66] [c64] [c63] [c60] [c59] [c53] [c51] [j9] [j7] [c49] [c38] [c33] [c32]
Nikos S. Voros
aka: Nikolaos S. Voros
aka: Nikolaos S. Voros
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