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Marco Platzner

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affiliation: University of Paderborn, Germany

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2020 – today

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2024
[j46]
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Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner:
Post-configuration Activation of Hardware Trojans in FPGAs. J. Hardw. Syst. Secur. 8(2): 79-93 (2024)
[c140]
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Muhammad Awais, Hassan Ghasemzadeh Mohammadi, Marco Platzner:
DeepApprox: Rapid Deep Learning based Design Space Exploration of Approximate Circuits via Check-pointing. ISVLSI 2024: 88-93
2023
[c139]
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Lennart Clausing, Zakarya Guettatfi, Paul Kaufmann, Christian Lienen, Marco Platzner:
On Guaranteeing Schedulability of Periodic Real-Time Hardware Tasks Under ReconOS⁶⁴. ARC 2023: 245-259
[c138]
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Christian Lienen, Alexander Philipp Nowosad, Marco Platzner:
Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms. ICRAI 2023: 23-31
[c137]
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Christian Lienen, Mathis Brede, Daniel Karger, Kevin Koch, Dalisha Logan, Janet Mazur, Alexander Philipp Nowosad, Alexander Schnelle, Mohness Waizy, Marco Platzner:
AutonomROS: A ReconROS-based Autonomous Driving Unit. IRC 2023: 297-304
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Christian Lienen, Sorel Horst Middeke, Marco Platzner:
FPGADDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications. IROS 2023: 6261-6266
[c135]
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Qazi Arbab Ahmed, Muhammad Awais, Marco Platzner:
MAAS: Hiding Trojans in Approximate Circuits. ISQED 2023: 1-6
[i5]
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  - journals/corr/abs-2303-00532
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Christian Lienen, Sorel Horst Middeke, Marco Platzner:
fpgaDDS: An Intra-FPGA Data Distribution Service for ROS 2 Robotics Applications. CoRR abs/2303.00532 (2023)
[i4]
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  - journals/corr/abs-2306-12761
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Christian Lienen, Alexander Philipp Nowosad, Marco Platzner:
Mapping and Optimizing Communication in ROS 2-based Applications on Configurable System-on-Chip Platforms. CoRR abs/2306.12761 (2023)
[i3]
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  - journals/corr/abs-2309-02026
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Christian Lienen, Mathis Brede, Daniel Karger, Kevin Koch, Dalisha Logan, Janet Mazur, Alexander Philipp Nowosad, Alexander Schnelle, Mohness Waizy, Marco Platzner:
AutonomROS: A ReconROS-based Autonomonous Driving Unit. CoRR abs/2309.02026 (2023)
2022
[j45]
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Felix Jentzsch, Yaman Umuroglu, Alessandro Pappalardo, Michaela Blott, Marco Platzner:
RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures. IEEE Micro 42(6): 125-133 (2022)
[j44]
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Alfonso Rodríguez, Andrés Otero, Marco Platzner, Eduardo de la Torre:
Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Trans. Computers 71(11): 2903-2914 (2022)
[j43]
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Christian Lienen, Marco Platzner:
Design of Distributed Reconfigurable Robotics Systems with ReconROS. ACM Trans. Reconfigurable Technol. Syst. 15(3): 27:1-27:20 (2022)
[c134]
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Linus Witschen, Tobias Wiersema, Lucas Reuter, Marco Platzner:
Search space characterization for approximate logic synthesis. DAC 2022: 433-438
[c133]
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Linus Witschen, Tobias Wiersema, Matthias Artmann, Marco Platzner:
MUSCAT: MUS-based Circuit Approximation Technique. DATE 2022: 172-177
[c132]
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Christian Lienen, Marco Platzner:
Event-Driven Programming of FPGA-accelerated ROS 2 Robotics Applications. DSD 2022: 615-623
[c131]
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Tim Hansmeier, Marco Platzner:
Integrating Safety Guarantees into the Learning Classifier System XCS. EvoApplications 2022: 386-401
[c130]
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Mathis Brede, Tim Hansmeier, Marco Platzner:
XCS on embedded systems: an analysis of execution profiles and accelerated classifier deletion. GECCO Companion 2022: 2071-2079
[c129]
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  - conf/ipps/ClausingP22
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Lennart Clausing, Marco Platzner:
ReconOS⁶⁴: A Hardware Operating System for Modern Platform FPGAs with 64-Bit Support. IPDPS Workshops 2022: 120-127
[c128]
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Christian Lienen, Marco Platzner:
Task Mapping for Hardware-Accelerated Robotics Applications using ReconROS. IRC 2022: 148-155
[c127]
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Qazi Arbab Ahmed, Marco Platzner:
On the Detection and Circumvention of Bitstream-level Trojans in FPGAs. ISVLSI 2022: 434-439
[c126]
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Muhammad Awais, Marco Platzner:
Automated Framework for Fast Synthesis of Approximate Hardware Accelerators. VLSI-SoC 2022: 1-2
[i2]
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  - journals/corr/abs-2201-07454
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Christian Lienen, Marco Platzner:
ReconROS Executor: Event-Driven Programming of FPGA-accelerated ROS 2 Applications. CoRR abs/2201.07454 (2022)
2021
[j42]
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Marie-Christine Jakobs, Felix Pauck, Marco Platzner, Heike Wehrheim, Tobias Wiersema:
Software/Hardware Co-Verification for Custom Instruction Set Processors. IEEE Access 9: 160559-160579 (2021)
[c125]
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Linus Witschen, Tobias Wiersema, Masood Raeisi Nafchi, Arne Bockhorn, Marco Platzner:
Timing Optimization for Virtual FPGA Configurations. ARC 2021: 50-64
[c124]
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Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner:
Malicious Routing: Circumventing Bitstream-level Verification for FPGAs. DATE 2021: 1490-1495
[c123]
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Tim Hansmeier, Marco Platzner:
An experimental comparison of explore/exploit strategies for the learning classifier system XCS. GECCO Companion 2021: 1639-1647
[c122]
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  - conf/glvlsi/00090P21
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Muhammad Awais, Hassan Ghasemzadeh Mohammadi, Marco Platzner:
LDAX: A Learning-based Fast Design Space Exploration Framework for Approximate Circuit Synthesis. ACM Great Lakes Symposium on VLSI 2021: 27-32
[c121]
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Muhammad Awais, Marco Platzner:
MCTS-based Synthesis Towards Efficient Approximate Accelerators. ISVLSI 2021: 384-389
[c120]
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  - conf/pkdd/MohammadiJKARMP21
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Hassan Ghasemzadeh Mohammadi, Felix Paul Jentzsch, Maurice Kuschel, Rahil Arshad, Sneha Rautmare, Suraj Manjunatha, Marco Platzner, Alexander Boschmann, Dirk Schollbach:
FLight: FPGA Acceleration of Lightweight DNN Model Inference in Industrial Analytics. PKDD/ECML Workshops (1) 2021: 351-362
[e5]
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Christian Plessl, Paul Chow, Marco Platzner:
HEART '21: 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Virtual Event, Germany, 21-23 June, 2021. ACM 2021, ISBN 978-1-4503-8549-7 [contents]
[i1]
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  - journals/corr/abs-2107-07208
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Christian Lienen, Marco Platzner:
Design of Distributed Reconfigurable Robotics Systems with ReconROS. CoRR abs/2107.07208 (2021)
2020
[j41]
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Nam Ho, Paul Kaufmann, Marco Platzner:
Evolution of application-specific cache mappings. Int. J. Hybrid Intell. Syst. 16(3): 149-161 (2020)
[j40]
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Jahanzeb Anwer, Sebastian Meisner, Marco Platzner:
Dynamic Reliability Management for FPGA-Based Systems. Int. J. Reconfigurable Comput. 2020: 2808710:1-2808710:19 (2020)
[j39]
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Kirstie L. Bellman, Christopher Landauer, Nikil D. Dutt, Lukas Esterle, Andreas Herkersdorf, Axel Jantsch, Nima Taherinejad, Peter R. Lewis, Marco Platzner, Kalle Tammemäe:
Self-aware Cyber-Physical Systems. ACM Trans. Cyber Phys. Syst. 4(4): 38:1-38:26 (2020)
[j38]
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Linus Witschen, Tobias Wiersema, Marco Platzner:
Proof-Carrying Approximate Circuits. IEEE Trans. Very Large Scale Integr. Syst. 28(9): 2084-2088 (2020)
[c119]
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Zakarya Guettatfi, Paul Kaufmann, Marco Platzner:
Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices. ARC 2020: 108-117
[c118]
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Hassan Ghasemzadeh Mohammadi, Rahil Arshad, Sneha Rautmare, Suraj Manjunatha, Maurice Kuschel, Felix Paul Jentzsch, Marco Platzner, Alexander Boschmann, Dirk Schollbach:
DeepWind: An Accurate Wind Turbine Condition Monitoring Framework via Deep Learning on Embedded Platforms. ETFA 2020: 1431-1434
[c117]
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Tim Hansmeier, Paul Kaufmann, Marco Platzner:
Enabling XCSF to cope with dynamic environments via an adaptive error threshold. GECCO Companion 2020: 125-126
[c116]
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Tim Hansmeier, Paul Kaufmann, Marco Platzner:
An adaption mechanism for the error threshold of XCSF. GECCO Companion 2020: 1756-1764
[c115]
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Muhammad Awais, Hassan Ghasemzadeh Mohammadi, Marco Platzner:
A Hybrid Synthesis Methodology for Approximate Circuits. ACM Great Lakes Symposium on VLSI 2020: 421-426
[c114]
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Christian Lienen, Marco Platzner, Bernhard Rinner:
ReconROS: Flexible Hardware Acceleration for ROS2 Applications. FPT 2020: 268-276
[c113]
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  - conf/ipps/LoschP20
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Achim Lösch, Marco Platzner:
MigHEFT: DAG-based Scheduling of Migratable Tasks on Heterogeneous Compute Nodes. IPDPS Workshops 2020: 6-16

2010 – 2019

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2019
[j37]
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Marco Platzner, Christian Plessl:
FPGAs im Rechenzentrum. Inform. Spektrum 42(4): 289-293 (2019)
[j36]
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Alexander Boschmann, Andreas Agne, Georg Thombansen, Linus Witschen, Florian Kraus, Marco Platzner:
Zynq-based acceleration of robust high density myoelectric signal processing. J. Parallel Distributed Comput. 123: 77-89 (2019)
[j35]
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Tim Hansmeier, Marco Platzner, Md Jubaer Hossain Pantho, David Andrews:
An Accelerator for Resolution Proof Checking based on FPGA and Hybrid Memory Cube Technology. J. Signal Process. Syst. 91(11-12): 1259-1272 (2019)
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Qazi Arbab Ahmed, Tobias Wiersema, Marco Platzner:
Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. ARC 2019: 127-136
[c111]
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Linus Witschen, Hassan Ghasemzadeh Mohammadi, Matthias Artmann, Marco Platzner:
Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. ACM Great Lakes Symposium on VLSI 2019: 153-158
[c110]
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Zakarya Guettatfi, Marco Platzner, Omar Kermia, Abdelhakim Khouas:
An Approach for Mapping Periodic Real-Time Tasks to Reconfigurable Hardware. IPDPS Workshops 2019: 99-106
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Nam Ho, Paul Kaufmann, Marco Platzner:
Optimization of Application-Specific L1 Cache Translation Functions of the LEON3 Processor. SoCPaR 2019: 266-276
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David Andrews, René Cumplido, Claudia Feregrino, Marco Platzner:
2019 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2019, Cancun, Mexico, December 9-11, 2019. IEEE 2019, ISBN 978-1-7281-1957-1 [contents]
2018
[j34]
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Ines Ghribi, Riadh Ben Abdallah, Mohamed Khalgui, Zhiwu Li, Khalid Abdulaziz Alnowibet, Marco Platzner:
R-Codesign: Codesign Methodology for Real-Time Reconfigurable Embedded Systems Under Energy Constraints. IEEE Access 6: 14078-14092 (2018)
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Tim Hansmeier, Marco Platzner, David Andrews:
An FPGA/HMC-Based Accelerator for Resolution Proof Checking. ARC 2018: 153-165
[c107]
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Achim Lösch, Alex Wiens, Marco Platzner:
Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. ARCS 2018: 73-84
[c106]
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Achim Lösch, Marco Platzner:
A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. ASAP 2018: 1-8
[c105]
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Muhammad Awais, Hassan Ghasemzadeh Mohammadi, Marco Platzner:
An MCTS-based Framework for Synthesis of Approximate Circuits. VLSI-SoC 2018: 219-224
2017
[j33]
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Jahanzeb Anwer, Marco Platzner:
Evaluating fault-tolerance of redundant FPGA structures using Boolean difference calculus. Microprocess. Microsystems 52: 160-172 (2017)
[j32]
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Ronald F. DeMara, Marco Platzner, Marco Ottavi:
Guest Editorial: IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing Joint Special Section on Innovation in Reconfigurable Computing Fabrics from Devices to Architectures. IEEE Trans. Computers 66(6): 927-929 (2017)
[j31]
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Ronald F. DeMara, Marco Platzner, Marco Ottavi:
Guest Editorial: IEEE Transactions on Computers and IEEE Transactions on Emerging Topics in Computing Joint Special Section on Innovation in Reconfigurable Computing Fabrics from Devices to Architectures. IEEE Trans. Emerg. Top. Comput. 5(2): 207-209 (2017)
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Tobias Isenberg, Marco Platzner, Heike Wehrheim, Tobias Wiersema:
Proof-Carrying Hardware via Inductive Invariants. ACM Trans. Design Autom. Electr. Syst. 22(4): 61:1-61:23 (2017)
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Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang:
The First 25 Years of the FPL Conference: Significant Papers. ACM Trans. Reconfigurable Technol. Syst. 10(2): 15:1-15:17 (2017)
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Paul Kaufmann, Nam Ho, Marco Platzner:
Evaluation methodology for complex non-deterministic functions: A case study in metaheuristic optimization of caches. AHS 2017: 206-213
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Achim Lösch, Marco Platzner:
reMinMin: A novel static energy-centric list scheduling approach based on real measurements. ASAP 2017: 149-154
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Nam Ho, Ishraq Ibne Ashraf, Paul Kaufmann, Marco Platzner:
Accurate private/shared classification of memory accesses: A run-time analysis system for the LEON3 multi-core processor. DATE 2017: 788-793
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Alexander Boschmann, Georg Thombansen, Linus Witschen, Alex Wiens, Marco Platzner:
A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. DATE 2017: 1002-1007
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Nam Ho, Paul Kaufmann, Marco Platzner:
Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. FPT 2017: 215-218
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Carlos Paiz Gatica, Marco Platzner:
Adaptable Realization of Industrial Analytics Functions on Edge-Devices using Reconfigurable Architectures. ML4CPS 2017: 73-80
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Zakarya Guettatfi, Philipp Hübner, Marco Platzner, Bernhard Rinner:
Computational self-awareness as design approach for visual sensor nodes. ReCoSoC 2017: 1-8
2016
[j28]
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Tobias Wiersema, Arne Bockhorn, Marco Platzner:
An architecture and design tool flow for embedding a virtual FPGA into a reconfigurable system-on-chip. Comput. Electr. Eng. 55: 112-122 (2016)
[j27]
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Tobias Graf, Marco Platzner:
Adaptive playouts for online learning of policies during Monte Carlo Tree Search. Theor. Comput. Sci. 644: 53-62 (2016)
[c97]
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Tobias Graf, Marco Platzner:
Using Deep Convolutional Neural Networks in Monte Carlo Tree Search. Computers and Games 2016: 11-21
[c96]
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Tobias Graf, Marco Platzner:
Monte-Carlo simulation balancing revisited. CIG 2016: 1-7
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Marco Platzner:
On-the-fly computing: self-aware heterogeneous multi-cores. CODES+ISSS 2016: 36:1-36:2
[c94]
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Achim Lösch, Tobias Beisel, Tobias Kenter, Christian Plessl, Marco Platzner:
Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. DATE 2016: 912-917
[c93]
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Jahanzeb Anwer, Marco Platzner:
Boolean Difference Based Reliability Evaluation of Fault-Tolerant Circuit Structures on FPGAs. DSD 2016: 1-8
[c92]
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Ines Ghribi, Riadh Ben Abdallah, Mohamed Khalgui, Marco Platzner:
I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems. ICSOFT (Selected Papers) 2016: 153-174
[c91]
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Ines Ghribi, Riadh Ben Abdallah, Mohamed Khalgui, Marco Platzner:
New Co-design Methodology for Real-time Embedded Systems. ICSOFT-EA 2016: 353-364
[c90]
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Sebastian Meisner, Marco Platzner:
Thread shadowing: On the effectiveness of error detection at the hardware thread level. ReConFig 2016: 1-8
[c89]
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David Andrews, Marco Platzner:
Programming models for reconfigurable manycore systems. ReCoSoC 2016: 1-8
[c88]
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Tobias Wiersema, Marco Platzner:
Verifying worst-case completion times for reconfigurable hardware modules using proof-carrying hardware. ReCoSoC 2016: 1-8
[p8]
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Andreas Agne, Marco Platzner, Christian Plessl, Markus Happe, Enno Lübbers:
ReconOS. FPGAs for Software Programmers 2016: 227-244
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Peter R. Lewis, Marco Platzner, Bernhard Rinner, Jim Tørresen, Xin Yao:
Self-aware Computing: Introduction and Motivation. Self-aware Computing Systems 2016: 1-5
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Andreas Agne, Markus Happe, Achim Lösch, Christian Plessl, Marco Platzner:
Self-aware Compute Nodes. Self-aware Computing Systems 2016: 145-165
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Peter R. Lewis, Marco Platzner, Bernhard Rinner, Jim Tørresen, Xin Yao:
Conclusions and Outlook. Self-aware Computing Systems 2016: 297-300
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Peter R. Lewis, Marco Platzner, Bernhard Rinner, Jim Tørresen, Xin Yao:
Self-aware Computing Systems - An Engineering Approach. Natural Computing Series, Springer 2016, ISBN 978-3-319-39674-3 [contents]
2015
[j26]
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Christian Plessl, Marco Platzner, Peter J. Schreier:
Approximate Computing. Inform. Spektrum 38(5): 396-399 (2015)
[j25]
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Lars Schaefers, Marco Platzner:
Distributed Monte Carlo Tree Search: A Novel Technique and its Application to Computer Go. IEEE Trans. Comput. Intell. AI Games 7(4): 361-374 (2015)
[c87]
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Tobias Graf, Marco Platzner:
Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning. ACG 2015: 1-11
[c86]
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Nam Ho, Abdullah Fathi Ahmed, Paul Kaufmann, Marco Platzner:
Microarchitectural optimization by means of reconfigurable and evolvable cache mappings. AHS 2015: 1-7
[c85]
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Tobias Wiersema, Sen Wu, Marco Platzner:
On-The-Fly Verification of Reconfigurable Image Processing Modules Based on a Proof-Carrying Hardware Approach. ARC 2015: 365-372
[c84]
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Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang:
Significant papers from the first 25 years of the FPL conference. FPL 2015: 1-3
[c83]
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Sebastian Meisner, Marco Platzner:
Comparison of thread signatures for error detection in hybrid multi-cores. FPT 2015: 212-215
[c82]
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Alexander Boschmann, Andreas Agne, Linus Witschen, Georg Thombansen, Florian Kraus, Marco Platzner:
FPGA-based acceleration of high density myoelectric signal processing. ReConFig 2015: 1-8
2014
[j24]
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Andreas Agne, Hendrik Hangmann, Markus Happe, Marco Platzner, Christian Plessl:
Seven recipes for setting your FPGA on fire - A cookbook on heat generators. Microprocess. Microsystems 38(8): 911-919 (2014)
[j23]
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Andreas Agne, Markus Happe, Ariane Keller, Enno Lübbers, Bernhard Plattner, Marco Platzner, Christian Plessl:
ReconOS: An Operating System Approach for Reconfigurable Computing. IEEE Micro 34(1): 60-71 (2014)
[j22]
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Heiner Giefers, Marco Platzner:
An FPGA-Based Reconfigurable Mesh Many-Core. IEEE Trans. Computers 63(12): 2919-2932 (2014)
[j21]
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Andreas Agne, Markus Happe, Achim Lösch, Christian Plessl, Marco Platzner:
Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores. ACM Trans. Reconfigurable Technol. Syst. 7(2): 13:1-13:18 (2014)
[c81]
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Sebastian Meisner, Marco Platzner:
Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection. ARC 2014: 283-290
[c80]
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Tobias Graf, Marco Platzner:
Common fate graph patterns in Monte Carlo Tree Search for computer go. CIG 2014: 1-8
[c79]
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Jahanzeb Anwer, Marco Platzner:
Analytic reliability evaluation for fault-tolerant circuit structures on FPGAs. DFT 2014: 177-184
[c78]
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Alexander Boschmann, Marco Platzner:
Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity. EMBC 2014: 4547-4550
[c77]
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Nam Ho, Paul Kaufmann, Marco Platzner:
A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms. FPL 2014: 1-4
[c76]
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Tobias Wiersema, Stephanie Drzevitzky, Marco Platzner:
Memory security in reconfigurable computers: Combining formal verification with monitoring. FPT 2014: 167-174
[c75]
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Nam Ho, Paul Kaufmann, Marco Platzner:
Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure. ICES 2014: 31-37
[c74]
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Marie-Christine Jakobs, Marco Platzner, Heike Wehrheim, Tobias Wiersema:
Integrating Software and Hardware Verification. IFM 2014: 307-322
[c73]
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Jahanzeb Anwer, Marco Platzner, Sebastian Meisner:
FPGA Redundancy Configurations: An Automated Design Space Exploration. IPDPS Workshops 2014: 275-280
[c72]
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Tobias Wiersema, Arne Bockhorn, Marco Platzner:
Embedding FPGA overlays into configurable Systems-on-Chip: ReconOS meets ZUMA. ReConFig 2014: 1-6
2013
[j20]
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Markus Happe, Enno Lübbers, Marco Platzner:
A self-adaptive heterogeneous multi-core architecture for embedded real-time video object tracking. J. Real Time Image Process. 8(1): 95-110 (2013)
[j19]
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Paul Kaufmann, Kyrre Glette, Thiemo Gruber, Marco Platzner, Jim Tørresen, Bernhard Sick:
Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers. IEEE Trans. Evol. Comput. 17(1): 46-63 (2013)
[c71]
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Tobias Graf, Lars Schaefers, Marco Platzner:
On Semeai Detection in Monte-Carlo Go. Computers and Games 2013: 14-25
[c70]
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Alexander Boschmann, Barbara Nofen, Marco Platzner:
Improving transient state myoelectric signal recognition in hand movement classification using gyroscopes. EMBC 2013: 6035-6038
[c69]
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Markus Happe, Friedhelm Meyer auf der Heide, Peter Kling, Marco Platzner, Christian Plessl:
On-The-Fly Computing: A novel paradigm for individualized IT services. ISORC 2013: 1-10
[c68]
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Jahanzeb Anwer, Sebastian Meisner, Marco Platzner:
Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. ReConFig 2013: 1-6
2012
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Paul Kaufmann, Kyrre Glette, Marco Platzner, Jim Tørresen:
Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture. Int. J. Adapt. Resilient Auton. Syst. 3(4): 17-31 (2012)
[j17]
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Tobias Schumacher, Christian Plessl, Marco Platzner:
IMORC: An infrastructure and architecture template for implementing high-performance reconfigurable FPGA accelerators. Microprocess. Microsystems 36(2): 110-126 (2012)
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Martin Wistuba, Lars Schaefers, Marco Platzner:
Comparison of Bayesian move prediction systems for Computer Go. CIG 2012: 91-99
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Alexander Boschmann, Marco Platzner:
Reducing classification accuracy degradation of pattern recognition based myoelectric control caused by electrode shift using a high density electrode array. EMBC 2012: 4324-4327
2011
[j16]
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Tobias Schumacher, Tim Süß, Christian Plessl, Marco Platzner:
FPGA Acceleration of Communication-Bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study. Int. J. Reconfigurable Comput. 2011: 760954:1-760954:11 (2011)
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Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich:
Design and architectures for dependable embedded systems. CODES+ISSS 2011: 69-78
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Tobias Graf, Ulf Lorenz, Marco Platzner, Lars Schaefers:
Parallel Monte-Carlo Tree Search for HPC Systems. Euro-Par (2) 2011: 365-376
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Tobias Kenter, Christian Plessl, Marco Platzner, Michael Kauschke:
Performance estimation framework for automated exploration of CPU-accelerator architectures. FPGA 2011: 177-180
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Andreas Agne, Marco Platzner, Enno Lübbers:
Memory Virtualization for Multithreaded Reconfigurable Hardware. FPL 2011: 185-188
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Stephanie Drzevitzky, Marco Platzner:
Achieving hardware security for reconfigurable systems on chip by a proof-carrying code approach. ReCoSoC 2011: 1-8
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Paul Kaufmann, Marco Platzner:
Multi-objective Intrinsic Evolution of Embedded Systems. Organic Computing 2011: 193-206
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James Alfred Walker, Julian F. Miller, Paul Kaufmann, Marco Platzner:
Problem Decomposition in Cartesian Genetic Programming. Cartesian Genetic Programming 2011: 35-99
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Lukás Sekanina, James Alfred Walker, Paul Kaufmann, Marco Platzner:
Evolution of Electronic Circuits. Cartesian Genetic Programming 2011: 125-179
2010
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Udo Kebschull, Marco Platzner, Jürgen Teich:
Selected papers from the 18^th International Conference on Field Programmable Logic and Applications (FPL 2008) [Editorial]. IET Comput. Digit. Tech. 4(3): 157-158 (2010)
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Stephanie Drzevitzky, Uwe Kastens, Marco Platzner:
Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification. Int. J. Reconfigurable Comput. 2010: 180242:1-180242:11 (2010)
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Paul Kaufmann, Tobias Knieper, Marco Platzner:
A novel hybrid evolutionary strategy and its periodization with multi-objective genetic optimizers. IEEE Congress on Evolutionary Computation 2010: 1-8
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Enno Lübbers, Marco Platzner, Christian Plessl, Ariane Keller, Bernhard Plattner:
Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. ERSA 2010: 225-231
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Heiner Giefers, Marco Platzner:
A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics. ERSA 2010: 251-254
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Heiner Giefers, Marco Platzner:
A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier. FPL 2010: 223-228
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Tobias Knieper, Paul Kaufmann, Kyrre Glette, Marco Platzner, Jim Tørresen:
Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture. ICES 2010: 250-261
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Wilhelm Schäfer, Mauro Birattari, Johannes Blömer, Marco Dorigo, Gregor Engels, Rehan O'Grady, Marco Platzner, Franz-Josef Rammig, Wolfgang Reif, Ansgar Trächtler:
Engineering self-coordinating software intensive systems. FoSER 2010: 321-324
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Enno Lübbers, Marco Platzner:
ReconOS: An Operating System for Dynamically Reconfigurable Hardware. Dynamically Reconfigurable Systems 2010: 269-290
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Marco Platzner, Jürgen Teich, Norbert Wehn:
Dynamically Reconfigurable Systems - Architectures, Design Methods and Applications. Springer 2010, ISBN 978-9-04-813484-7 [contents]

2000 – 2009

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2009
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Enno Lübbers, Marco Platzner:
ReconOS: Multithreaded programming for reconfigurable computers. ACM Trans. Embed. Comput. Syst. 9(1): 8:1-8:33 (2009)
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Paul Kaufmann, Christian Plessl, Marco Platzner:
EvoCaches: Application-specific Adaptation of Cache Mappings. AHS 2009: 11-18
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Markus Happe, Enno Lübbers, Marco Platzner:
A Multithreaded Framework for Sequential Monte Carlo Methods on CPU/FPGA Platforms. ARC 2009: 380-385
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Tobias Schumacher, Christian Plessl, Marco Platzner:
IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing. FCCM 2009: 275-278
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Heiner Giefers, Marco Platzner:
Program-driven fine-grained power management for the reconfigurable mesh. FPL 2009: 119-125
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Tobias Schumacher, Christian Plessl, Marco Platzner:
An accelerator for K-TH nearest neighbor thinning based on the IMORC infrastructure. FPL 2009: 338-344
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Enno Lübbers, Marco Platzner:
Cooperative multithreading in dynamically reconfigurable systems. FPL 2009: 551-554
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Heiner Giefers, Marco Platzner:
ARMLang: A language and compiler for programming reconfigurable mesh many-cores. IPDPS 2009: 1-8
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Tobias Schumacher, Tim Süß, Christian Plessl, Marco Platzner:
Communication Performance Characterization for Reconfigurable Accelerator Design on the XD1000. ReConFig 2009: 119-124
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Stephanie Drzevitzky, Uwe Kastens, Marco Platzner:
Proof-Carrying Hardware: Towards Runtime Verification of Reconfigurable Modules. ReConFig 2009: 189-194
2008
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Kyrre Glette, Jim Tørresen, Thiemo Gruber, Bernhard Sick, Paul Kaufmann, Marco Platzner:
Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control. AHS 2008: 32-39
[c44]
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Marco Platzner, Sven Döhre, Markus Happe, Tobias Kenter, Ulf Lorenz, Tobias Schumacher, Andre Send, Alexander Warkentin:
The GOmputer: Accelerating GO with FPGAs. ERSA 2008: 35-45
[c43]
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Enno Lübbers, Marco Platzner:
Communication and Synchronization in Multithreaded Reconfigurable Computing Systems. ERSA 2008: 83-89
[c42]
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Tobias Schumacher, Robert Meiche, Paul Kaufmann, Enno Lübbers, Christian Plessl, Marco Platzner:
A Hardware Accelerator for k-th Nearest Neighbor Thinning. ERSA 2008: 245-251
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Enno Lübbers, Marco Platzner:
A portable abstraction layer for hardware threads. FPL 2008: 17-22
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Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker:
Fine grain reconfigurable architectures. FPL 2008: 348
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Paul Kaufmann, Marco Platzner:
Advanced techniques for the creation and propagation of modules in cartesian genetic programming. GECCO 2008: 1219-1226
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Kyrre Glette, Jim Tørresen, Paul Kaufmann, Marco Platzner:
A Comparison of Evolvable Hardware Architectures for Classification Tasks. ICES 2008: 22-33
[c37]
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Tobias Knieper, Bertrand Defo, Paul Kaufmann, Marco Platzner:
On Robust Evolution of Digital Hardware. BICC 2008: 213-222
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Heiner Giefers, Marco Platzner:
Realizing reconfigurable mesh algorithms on softcore arrays. ICSAMOS 2008: 41-48
2007
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Neil Bergmann, Marco Platzner, Jürgen Teich:
Dynamically Reconfigurable Architectures. EURASIP J. Embed. Syst. 2007 (2007)
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Klaus Danne, Roland Mühlenbernd, Marco Platzner:
Server-based execution of periodic tasks on dynamically reconfigurable hardware. IET Comput. Digit. Tech. 1(4): 295-302 (2007)
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Paul Kaufmann, Marco Platzner:
MOVES: A Modular Framework for Hardware Evolution. AHS 2007: 447-454
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Paul Kaufmann, Marco Platzner:
Toward Self-adaptive Embedded Systems: Multi-objective Hardware Evolution. ARCS 2007: 199-208
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Heiner Giefers, Marco Platzner:
A Many-core Implementation based on the Reconfigurable Mesh Model. FPL 2007: 41-46
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Enno Lübbers, Marco Platzner:
ReconOS: An RTOS supporting Hard- and Software Threads. FPL 2007: 441-446
[c31]
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Tobias Schumacher, Enno Lübbers, Paul Kaufmann, Marco Platzner:
Accelerating the Cube Cut Problem with an FPGA-Augmented Compute Cluster. PARCO 2007: 749-756
2006
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Klaus Danne, Roland Mühlenbernd, Marco Platzner:
Executing Hardware Tasks on Dynamically Reconfigurable Devices Under Real-Time Conditions. FPL 2006: 1-6
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Christian Plessl, Marco Platzner, Lothar Thiele:
Optimal temporal partitioning based on slowdown and retiming. FPT 2006: 345-348
[c28]
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Klaus Danne, Marco Platzner:
Partitioned scheduling of periodic real-time tasks onto reconfigurable hardware. IPDPS 2006
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Klaus Danne, Marco Platzner:
An EDF schedulability test for periodic tasks on reconfigurable hardware devices. LCTES 2006: 93-102
2005
[j10]
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Rolf Enzler, Christian Plessl, Marco Platzner:
System-level performance evaluation of reconfigurable processors. Microprocess. Microsystems 29(2-3): 63-73 (2005)
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Christian Plessl, Marco Platzner:
Zippy - A coarse-grained reconfigurable array with support for hardware virtualization. ASAP 2005: 213-218
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Klaus Danne, Marco Platzner:
A Heuristic Approach to Schedule Periodic Real-Time Tasks on Reconfigurable Hardware. FPL 2005: 568-573
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Klaus Danne, Marco Platzner:
Periodic Real-Time Scheduling for FPGA Computers. WISES 2005: 117-127
2004
[j9]
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Christoph Steiger, Herbert Walder, Marco Platzner:
Operating Systems for Reconfigurable Embedded Platforms: Online Scheduling of Real-Time Tasks. IEEE Trans. Computers 53(11): 1393-1407 (2004)
[c23]
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Christian Plessl, Marco Platzner:
Virtualization of Hardware - Introduction and Survey. ERSA 2004: 63-69
[c22]
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Herbert Walder, Samuel Nobs, Marco Platzner:
XF-Board: A Prototyping Platform for Reconfigurable Hardware Operating Systems. ERSA 2004: 306
[c21]
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Matthias Dyer, Marco Platzner, Lothar Thiele:
Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine. FCCM 2004: 342-344
[c20]
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Herbert Walder, Marco Platzner:
A Runtime Environment for Reconfigurable Hardware Operating Systems. FPL 2004: 831-835
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Jürgen Becker, Marco Platzner, Serge Vernalde:
Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings. Lecture Notes in Computer Science 3203, Springer 2004, ISBN 3-540-22989-2 [contents]
2003
[j8]
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Christian Plessl, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele, Gerhard Tröster:
The case for reconfigurable hardware in wearable computing. Pers. Ubiquitous Comput. 7(5): 299-308 (2003)
[j7]
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Christian Plessl, Marco Platzner:
Instance-Specific Accelerators for Minimum Covering. J. Supercomput. 26(2): 109-129 (2003)
[c19]
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Herbert Walder, Marco Platzner:
Online Scheduling for Block-Partitioned Reconfigurable Devices . DATE 2003: 10290-10295
[c18]
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Rolf Enzler, Christian Plessl, Marco Platzner:
Co-Simulation of a Hybrid Multi-Context Architecture. Engineering of Reconfigurable Systems and Algorithms 2003: 174-180
[c17]
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Herbert Walder, Marco Platzner:
Reconfigurable Hardware Operating Systems: From Design Concepts to Realizations. Engineering of Reconfigurable Systems and Algorithms 2003: 284-287
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Rolf Enzler, Christian Plessl, Marco Platzner:
Virtualizing Hardware with Multi-context Reconfigurable Arrays. FPL 2003: 151-160
[c15]
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Christoph Steiger, Herbert Walder, Marco Platzner:
Heuristics for Onine Scheduling Real-Time Tasks to Partially Reconfigurable Devices. FPL 2003: 575-584
[c14]
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Christian Plessl, Marco Platzner:
TKDM - a reconfigurable co-processor in a PC's memory slot. FPT 2003: 252-259
[c13]
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Herbert Walder, Christoph Steiger, Marco Platzner:
Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing. IPDPS 2003: 178
[c12]
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Christoph Steiger, Herbert Walder, Marco Platzner, Lothar Thiele:
Online Scheduling and Placement of Real-time Tasks to Partially Reconfigurable Devices. RTSS 2003: 224-235
2002
[j6]
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Michael Eisenring, Marco Platzner:
A Framework for Run-time Reconfigurable Systems. J. Supercomput. 21(2): 145-159 (2002)
[c11]
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Christian Plessl, Marco Platzner:
Custom Computing Machines for the Set Covering Problem. FCCM 2002: 163-172
[c10]
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Matthias Dyer, Christian Plessl, Marco Platzner:
Partially Reconfigurable Cores for Xilinx Virtex. FPL 2002: 292-301
[c9]
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Christian Plessl, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele:
Reconfigurable Hardware in Wearable Computing Nodes. ISWC 2002: 215-222
2001
[j5]
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Oskar Mencer, Marco Platzner, Martin Morf, Michael J. Flynn:
Object-oriented domain specific compilers for programming FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 9(1): 205-210 (2001)
2000
[j4]
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Marco Platzner:
Reconfigurable Accelerators for Combinatorial Problems. Computer 33(4): 58-60 (2000)
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Marco Platzner, Bernhard Rinner, Reinhold Weiss:
Toward Embedded Qualitative Simulation: A Specialized Computer Architecture for QSim. IEEE Intell. Syst. 15(2): 62-68 (2000)
[c8]
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Michael Eisenring, Marco Platzner:
Optimization of Run-Time Reconfigurable Embedded Systems. FPL 2000: 565-574
[c7]
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Michael Eisenring, Marco Platzner:
An Implementation Framework for Run-time Reconfigurable Systems. PDPTA 2000

1990 – 1999

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1999
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Michael Eisenring, Marco Platzner, Lothar Thiele:
Communication Synthesis for Reconfigurable Embedded Systems. FPL 1999: 205-214
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Oskar Mencer, Marco Platzner:
Dynamic Circuit Generation for Boolean Satisfiability in an Object-Oriented Design Environment. HICSS 1999
1998
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Marco Platzner, Giovanni De Micheli:
Acceleration of Satisfiability Algorithms by Reconfigurable Hardware. FPL 1998: 69-78
1997
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Marco Platzner, Bernhard Rinner, Reinhold Weiss:
Parallel qualitative simulation. Simul. Pract. Theory 5(7-8): 623-638 (1997)
1995
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Marco Platzner, Bernhard Rinner, Reinhold Weiss:
Exploiting Parallelism in Constraint Satisfaction for Qualitative Simulation. J. Univers. Comput. Sci. 1(12): 811-820 (1995)
[c3]
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Gerald Friedl, Marco Platzner, Bernhard Rinner:
A Special-purpose Coprocessor for Qualitative Simulation. Euro-Par 1995: 695-698
[c2]
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Marco Platzner, Bernhard Rinner, Reinhold Weiss:
Parallel Qualitative Simulation. EUROSIM 1995: 231-236
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Marco Platzner, Bernhard Rinner, Reinhold Weiss:
A distributed computer architecture for qualitative simulation based on a multi-DSP and FPGAs. PDP 1995: 311-318

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