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ORCIDViktor K. Prasanna
V. K. Prasanna Kumar
Person information
- affiliation: University of Southern California, Los Angeles, USA
- award (2015): W. Wallace McDowell Award
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2020 – today
- 2024
[j183]Pengmiao Zhang
, Rajgopal Kannan, Anant V. Nori, Viktor K. Prasanna:
Accelerating Graph Analytics Using Attention-Based Data Prefetcher. SN Comput. Sci. 5(5): 646 (2024)- [j182]Yi-Chien Lin, Bingyi Zhang, Viktor K. Prasanna:
HitGNN: High-Throughput GNN Training Framework on CPU+Multi-FPGA Heterogeneous Platform. IEEE Trans. Parallel Distributed Syst. 35(5): 707-719 (2024) - [j181]Bingyi Zhang, Rajgopal Kannan, Carl E. Busart, Viktor K. Prasanna:
VisionAGILE: A Versatile Domain-Specific Accelerator for Computer Vision Tasks. IEEE Trans. Parallel Distributed Syst. 35(12): 2405-2422 (2024) - [c589]Yang Yang, Rajgopal Kannan, Viktor K. Prasanna:
A Framework for Generating Accelerators for Homomorphic Encryption Operations on FPGAs. ASAP 2024: 61-70 - [c588]Neelesh Gupta, Narayanan Kannan, Pengmiao Zhang, Viktor K. Prasanna:
TabConv: Low-Computation CNN Inference via Table Lookups. CF 2024 - [c587]Yi-Chien Lin, Gangda Deng, Viktor K. Prasanna:
A Unified CPU-GPU Protocol for GNN Training. CF 2024 - [c586]Yuan Meng, Michael Kinsner, Deshanand P. Singh, Mahesh A. Iyer, Viktor K. Prasanna:
PEARL: Enabling Portable, Productive, and High-Performance Deep Reinforcement Learning using Heterogeneous Platforms. CF 2024 - [c585]Sasindu Wijeratne, Rajgopal Kannan, Viktor K. Prasanna:
Sparse MTTKRP Acceleration for Tensor Decomposition on GPU. CF 2024 - [c584]Zhihan Xu, Yang Yang, Rajgopal Kannan, Viktor K. Prasanna:
Bandwidth Efficient Homomorphic Encrypted Discrete Fourier Transform Acceleration on FPGA. FCCM 2024: 1-12 - [c583]Bingyi Zhang, Rajgopal Kannan, Carl E. Busart, Viktor K. Prasanna:
GCV-Turbo: End-to-end Acceleration of GNN-based Computer Vision Tasks on FPGA. FCCM 2024: 66-77 - [c582]Dhruv Parikh, Shouyi Li, Bingyi Zhang, Rajgopal Kannan, Carl E. Busart, Viktor K. Prasanna:
Accelerating ViT Inference on FPGA through Static and Dynamic Pruning. FCCM 2024: 78-89 - [c581]Samuel Wiggins, Yuan Meng, Mahesh A. Iyer, Viktor K. Prasanna:
A Heterogeneous Acceleration System for Attention-Based Multi-Agent Reinforcement Learning. FPL 2024: 236-242 - [c580]Jürgen Becker, Zhenman Fang, Viktor K. Prasanna, Marco D. Santambrogio, Ramachandran Vaidyanathan:
31st Reconfigurable Architectures Workshop (RAW 2024). IPDPS (Workshops) 2024: 79 - [c579]Yi-Chien Lin, Yuyang Chen, Sameh Gobriel, Nilesh Jain, Gopi Krishna Jha, Viktor K. Prasanna:
ARGO: An Auto-Tuning Runtime System for Scalable GNN Training on Multi-Core Processor. IPDPS 2024: 361-372 - [c578]Pengmiao Zhang, Neelesh Gupta, Rajgopal Kannan, Viktor K. Prasanna:
Attention, Distillation, and Tabularization: Towards Practical Neural Network-Based Prefetching. IPDPS 2024: 876-888 - [c577]Gangda Deng, Hongkuan Zhou, Hanqing Zeng, Yinglong Xia, Christopher Leung, Jianbo Li, Rajgopal Kannan, Viktor K. Prasanna:
TASER: Temporal Adaptive Sampling for Fast and Accurate Dynamic Graph Representation Learning. IPDPS 2024: 926-937 - [i81]Sasindu Wijeratne, Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
PAHD: Perception-Action based Human Decision Making using Explainable Graph Neural Networks on SAR Images. CoRR abs/2401.02687 (2024) - [i80]Pengmiao Zhang, Neelesh Gupta, Rajgopal Kannan, Viktor K. Prasanna:
Attention, Distillation, and Tabularization: Towards Practical Neural Network-Based Prefetching. CoRR abs/2401.06362 (2024) - [i79]Yi-Chien Lin, Yuyang Chen, Sameh Gobriel, Nilesh Jain, Gopi Krishna Jha, Viktor K. Prasanna:
ARGO: An Auto-Tuning Runtime System for Scalable GNN Training on Multi-Core Processor. CoRR abs/2402.03671 (2024) - [i78]Gangda Deng, Hongkuan Zhou, Hanqing Zeng, Yinglong Xia, Christopher Leung, Jianbo Li, Rajgopal Kannan, Viktor K. Prasanna:
TASER: Temporal Adaptive Sampling for Fast and Accurate Dynamic Graph Representation Learning. CoRR abs/2402.05396 (2024) - [i77]Neelesh Gupta, Pengmiao Zhang, Rajgopal Kannan, Viktor K. Prasanna:
PaCKD: Pattern-Clustered Knowledge Distillation for Compressing Memory Access Prediction Models. CoRR abs/2402.13441 (2024) - [i76]Dhruv Parikh, Shouyi Li, Bingyi Zhang, Rajgopal Kannan, Carl E. Busart, Viktor K. Prasanna:
Accelerating ViT Inference on FPGA through Static and Dynamic Pruning. CoRR abs/2403.14047 (2024) - [i75]Yi-Chien Lin, Gangda Deng, Viktor K. Prasanna:
A Unified CPU-GPU Protocol for GNN Training. CoRR abs/2403.17092 (2024) - [i74]Tian Ye, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
Uncertainty-Aware SAR ATR: Defending Against Adversarial Attacks via Bayesian Neural Networks. CoRR abs/2403.18318 (2024) - [i73]Xu Wang, Tian Ye, Rajgopal Kannan, Viktor K. Prasanna:
FACTUAL: A Novel Framework for Contrastive Learning Based Robust SAR Image Classification. CoRR abs/2404.03225 (2024) - [i72]Sachini Wickramasinghe, Dhruv Parikh, Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
VTR: An Optimized Vision Transformer for SAR ATR Acceleration on FPGA. CoRR abs/2404.04527 (2024) - [i71]Neelesh Gupta, Narayanan Kannan, Pengmiao Zhang, Viktor K. Prasanna:
TabConv: Low-Computation CNN Inference via Table Lookups. CoRR abs/2404.05872 (2024) - [i70]Bingyi Zhang, Rajgopal Kannan, Carl E. Busart, Viktor K. Prasanna:
GCV-Turbo: End-to-end Acceleration of GNN-based Computer Vision Tasks on FPGA. CoRR abs/2404.07188 (2024) - [i69]Sasindu Wijeratne, Rajgopal Kannan, Viktor K. Prasanna:
Sparse MTTKRP Acceleration for Tensor Decomposition on GPU. CoRR abs/2405.08470 (2024) - [i68]Zuoning Zhang, Dhruv Parikh, Youning Zhang, Viktor K. Prasanna:
Benchmarking the Performance of Large Language Models on the Cerebras Wafer Scale Engine. CoRR abs/2409.00287 (2024) - [i67]Jacob Fein-Ashley, Rajgopal Kannan, Viktor K. Prasanna:
Studying the Effects of Self-Attention on SAR Automatic Target Recognition. CoRR abs/2409.00473 (2024) - [i66]Gangda Deng, Hongkuan Zhou, Rajgopal Kannan, Viktor K. Prasanna:
Learning Personalized Scoping for Graph Neural Networks under Heterophily. CoRR abs/2409.06998 (2024) - [i65]Rakshith Jayanth, Neelesh Gupta, Viktor K. Prasanna:
Benchmarking Edge AI Platforms for High-Performance ML Inference. CoRR abs/2409.14803 (2024) - [i64]Ömer Faruk Akgül, Rajgopal Kannan, Viktor K. Prasanna:
Conformal Prediction for Federated Graph Neural Networks with Missing Neighbor Information. CoRR abs/2410.14010 (2024) - 2023
- [j180]Kartik Lakhotia, Rajgopal Kannan, Viktor K. Prasanna:
Parallel Peeling of Bipartite Networks for Hierarchical Dense Subgraph Discovery. ACM Trans. Parallel Comput. 10(2): 5:1-5:35 (2023) - [j179]Chi Zhang, Yuan Meng, Viktor K. Prasanna:
A Framework for Mapping DRL Algorithms With Prioritized Replay Buffer Onto Heterogeneous Platforms. IEEE Trans. Parallel Distributed Syst. 34(6): 1816-1829 (2023) - [j178]Bingyi Zhang, Hanqing Zeng, Viktor K. Prasanna:
GraphAGILE: An FPGA-Based Overlay Accelerator for Low-Latency GNN Inference. IEEE Trans. Parallel Distributed Syst. 34(9): 2580-2597 (2023) - [j177]Chung Ming Cheung, Sanmukh Rao Kuppannagari, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
Behind-the-Meter Solar Generation Disaggregation at Varying Aggregation Levels Using Consumer Mixture Models. IEEE Trans. Sustain. Comput. 8(1): 43-55 (2023) - [c576]Ta-Yang Wang, Rajgopal Kannan, Viktor K. Prasanna:
Training Heterogeneous Graph Neural Networks using Bandit Sampling. CIKM 2023: 4345-4349 - [c575]Samuel Wiggins, Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna:
Characterizing Speed Performance of Multi-Agent Reinforcement Learning. DATA 2023: 327-334 - [c574]Yi-Chien Lin, Viktor K. Prasanna:
A Framework for Graph Machine Learning on Heterogeneous Architecture. FCCM 2023: 245-246 - [c573]Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna:
A Framework for Monte-Carlo Tree Search on CPU-FPGA Heterogeneous Platform via on-chip Dynamic Tree Management. FPGA 2023: 235-245 - [c572]Sasindu Wijeratne, Ta-Yang Wang, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating Sparse MTTKRP for Tensor Decomposition on FPGA. FPGA 2023: 259-269 - [c571]Yang Yang, Weihang Long, Rajgopal Kannan, Viktor K. Prasanna:
FPGA Acceleration of Rotation in Homomorphic Encryption Using Dynamic Data Layout. FPL 2023: 174-181 - [c570]Paul Chen, Pavan Manjunath, Sasindu Wijeratne, Bingyi Zhang, Viktor K. Prasanna:
Exploiting On-Chip Heterogeneity of Versal Architecture for GNN Inference Acceleration. FPL 2023: 219-227 - [c569]Kyle Marino, Pengmiao Zhang, Viktor K. Prasanna:
ME- ViT: A Single-Load Memory-Efficient FPGA Accelerator for Vision Transformers. HiPC 2023: 213-223 - [c568]Jacob Fein-Ashley, Tian Ye, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
Benchmarking Deep Learning Classifiers for SAR Automatic Target Recognition. HPEC 2023: 1-6 - [c567]Abhiram Rao Gorle, Pengmiao Zhang, Rajgopal Kannan, Viktor K. Prasanna:
G-MAP: A Graph Neural Network-Based Framework for Memory Access Prediction. HPEC 2023: 1-7 - [c566]Neelesh Gupta, Pengmiao Zhang, Rajgopal Kannan, Viktor K. Prasanna:
PaCKD: Pattern-Clustered Knowledge Distillation for Compressing Memory Access Prediction Models. HPEC 2023: 1-7 - [c565]Dhruv Parikh, Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
Performance of Graph Neural Networks for Point Cloud Applications. HPEC 2023: 1-7 - [c564]Samuel Wiggins, Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating Multi-Agent DDPG on CPU-FPGA Heterogeneous Platform. HPEC 2023: 1-7 - [c563]Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
Accelerating GNN-Based SAR Automatic Target Recognition on HBM-Enabled FPGA. HPEC 2023: 1-7 - [c562]Hongkuan Zhou, Rajgopal Kannan, Ananthram Swami, Viktor K. Prasanna:
HTNet: Dynamic WLAN Performance Prediction using Heterogenous Temporal GNN. INFOCOM 2023: 1-10 - [c561]Bingyi Zhang, Viktor K. Prasanna:
Dynasparse: Accelerating GNN Inference through Dynamic Sparsity Exploitation. IPDPS 2023: 233-244 - [c560]Yi-Chien Lin, Viktor K. Prasanna:
HyScale-GNN: A Scalable Hybrid GNN Training System on Single-Node Heterogeneous Architecture. IPDPS 2023: 557-567 - [c559]Sasindu Wijeratne, Rajgopal Kannan, Viktor K. Prasanna:
Dynasor: A Dynamic Memory Layout for Accelerating Sparse MTTKRP for Tensor Decomposition on Multi-core CPU. SBAC-PAD 2023: 23-33 - [c558]Hongkuan Zhou, Da Zheng, Xiang Song, George Karypis, Viktor K. Prasanna:
DistTGL: Distributed Memory-Based Temporal Graph Neural Network Training. SC 2023: 39:1-39:12 - [c557]Pengmiao Zhang, Rajgopal Kannan, Viktor K. Prasanna:
Phases, Modalities, Spatial and Temporal Locality: Domain Specific ML Prefetcher for Accelerating Graph Analytics. SC 2023: 91:1-91:15 - [c556]Yuan Meng, Qian Wang, Tianxin Zu, Viktor K. Prasanna:
Accelerating Deep Neural Network guided MCTS using Adaptive Parallelism. SC Workshops 2023: 766-769 - [c555]Gangda Deng, Ömer Faruk Akgül, Hongkuan Zhou, Hanqing Zeng, Yinglong Xia, Jianbo Li, Viktor K. Prasanna:
An Efficient Distributed Graph Engine for Deep Learning on Graphs. SC Workshops 2023: 922-931 - [i63]Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
Accurate, Low-latency, Efficient SAR Automatic Target Recognition on FPGA. CoRR abs/2301.01454 (2023) - [i62]Bingyi Zhang, Hanqing Zeng, Viktor K. Prasanna:
GraphAGILE: An FPGA-based Overlay Accelerator for Low-latency GNN Inference. CoRR abs/2302.01769 (2023) - [i61]Yi-Chien Lin, Viktor K. Prasanna:
HyScale-GNN: A Scalable Hybrid GNN Training System on Single-Node Heterogeneous Architecture. CoRR abs/2303.00158 (2023) - [i60]Yi-Chien Lin, Bingyi Zhang, Viktor K. Prasanna:
HitGNN: High-throughput GNN Training Framework on CPU+Multi-FPGA Heterogeneous Platform. CoRR abs/2303.01568 (2023) - [i59]Bingyi Zhang, Viktor K. Prasanna:
Dynasparse: Accelerating GNN Inference through Dynamic Sparsity Exploitation. CoRR abs/2303.12901 (2023) - [i58]Hongkuan Zhou, Rajgopal Kannan, Ananthram Swami, Viktor K. Prasanna:
HTNet: Dynamic WLAN Performance Prediction using Heterogenous Temporal GNN. CoRR abs/2304.10013 (2023) - [i57]Bingyi Zhang, Sasindu Wijeratne, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
Graph Neural Network for Accurate and Low-complexity SAR ATR. CoRR abs/2305.07119 (2023) - [i56]Hongkuan Zhou, Da Zheng, Xiang Song, George Karypis, Viktor K. Prasanna:
DistTGL: Distributed Memory-Based Temporal Graph Neural Network Training. CoRR abs/2307.07649 (2023) - [i55]Paul Chen, Pavan Manjunath, Sasindu Wijeratne, Bingyi Zhang, Viktor K. Prasanna:
Exploiting On-chip Heterogeneity of Versal Architecture for GNN Inference Acceleration. CoRR abs/2308.02749 (2023) - [i54]Samuel Wiggins, Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna:
Characterizing Speed Performance of Multi-Agent Reinforcement Learning. CoRR abs/2309.07108 (2023) - [i53]Sasindu Wijeratne, Rajgopal Kannan, Viktor K. Prasanna:
Dynasor: A Dynamic Memory Layout for Accelerating Sparse MTTKRP for Tensor Decomposition on Multi-core CPU. CoRR abs/2309.09131 (2023) - [i52]Dhruv Parikh, Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
Performance of Graph Neural Networks for Point Cloud Applications. CoRR abs/2309.09142 (2023) - [i51]Yuan Meng, Qian Wang, Tianxin Zu, Viktor K. Prasanna:
Accelerating Deep Neural Network guided MCTS using Adaptive Parallelism. CoRR abs/2310.05313 (2023) - [i50]Yue Niu, Rajgopal Kannan, Ajitesh Srivastava, Viktor K. Prasanna:
Reuse Kernels or Activations? A Flexible Dataflow for Low-latency Spectral CNN Acceleration. CoRR abs/2310.10902 (2023) - [i49]Yuan Meng, Michael Kinsner, Deshanand P. Singh, Mahesh A. Iyer, Viktor K. Prasanna:
A Software-Hardware Co-Optimized Toolkit for Deep Reinforcement Learning on Heterogeneous Platforms. CoRR abs/2311.09445 (2023) - [i48]Tian Ye, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart, Lance M. Kaplan:
Realistic Scatterer Based Adversarial Attacks on SAR Image Classifiers. CoRR abs/2312.02912 (2023) - [i47]Jacob Fein-Ashley, Tian Ye, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
Benchmarking Deep Learning Classifiers for SAR Automatic Target Recognition. CoRR abs/2312.06940 (2023) - 2022
- [j176]Pengmiao Zhang, Ajitesh Srivastava, Ta-Yang Wang, César A. F. De Rose, Rajgopal Kannan, Viktor K. Prasanna:
C-MemMAP: clustering-driven compact, adaptable, and generalizable meta-LSTM models for memory access prediction. Int. J. Data Sci. Anal. 13(1): 3-16 (2022) - [j175]Kartik Lakhotia, Fabrizio Petrini, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating Allreduce With In-Network Reduction on Intel PIUMA. IEEE Micro 42(2): 44-52 (2022) - [j174]Yuan Meng, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
PPOAccel: A High-Throughput Acceleration Framework for Proximal Policy Optimization. IEEE Trans. Parallel Distributed Syst. 33(9): 2066-2078 (2022) - [j173]Ken Eguro, Stephen Neuendorffer, Viktor K. Prasanna, Hongbo Rong:
Introduction to Special Issue on FPGAs in Data Centers. ACM Trans. Reconfigurable Technol. Syst. 15(2): 11:1-11:2 (2022) - [j172]Ken Eguro, Stephen Neuendorffer, Viktor K. Prasanna, Hongbo Rong:
Introduction to Special Issue on FPGAs in Data Centers, Part II. ACM Trans. Reconfigurable Technol. Syst. 15(3): 22:1-22:2 (2022) - [j171]Chi Zhang, Sanmukh Rao Kuppannagari, Viktor K. Prasanna:
Safe Building HVAC Control via Batch Reinforcement Learning. IEEE Trans. Sustain. Comput. 7(4): 923-934 (2022) - [c554]Diyi Hu, Chi Zhang, Viktor K. Prasanna, Bhaskar Krishnamachari:
Learning Practical Communication Strategies in Cooperative Multi-Agent Reinforcement Learning. ACML 2022: 467-482 - [c553]Diyi Hu, Chi Zhang, Viktor K. Prasanna, Bhaskar Krishnamachari:
Intelligent Communication over Realistic Wireless Networks in Multi-Agent Cooperative Games. AAMAS 2022: 1627-1629 - [c552]Yi-Chien Lin, Bingyi Zhang, Viktor K. Prasanna:
Accelerating GNN Training on CPU+Multi-FPGA Heterogeneous Platform. CARLA 2022: 16-30 - [c551]Yang Yang, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
NTTGen: a framework for generating low latency NTT implementations on FPGA. CF 2022: 30-39 - [c550]Yuan Meng, Chi Zhang, Viktor K. Prasanna:
FPGA acceleration of deep reinforcement learning using on-chip replay management. CF 2022: 40-48 - [c549]Pengmiao Zhang, Ajitesh Srivastava, Anant V. Nori, Rajgopal Kannan, Viktor K. Prasanna:
Fine-grained address segmentation for attention-based variable-degree prefetching. CF 2022: 103-112 - [c548]Ta-Yang Wang, Hongkuan Zhou, Rajgopal Kannan, Ananthram Swami, Viktor K. Prasanna:
Throughput optimization in heterogeneous MIMO networks: a GNN-based approach. GNNet@CoNEXT 2022: 42-47 - [c547]Pengmiao Zhang, Rajgopal Kannan, Anant V. Nori, Viktor K. Prasanna:
A2P: Attention-based Memory Access Prediction for Graph Analytics. DATA 2022: 135-145 - [c546]Sasindu Wijeratne, Ta-Yang Wang, Rajgopal Kannan, Viktor K. Prasanna:
Towards Programmable Memory Controller for Tensor Decomposition. DATA 2022: 468-475 - [c545]Yuan Meng, Hongjiang Men, Viktor K. Prasanna:
Accelerating Deformable Convolution Networks. FCCM 2022: 1 - [c544]Yang Yang, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
FPGA Accelerator for Homomorphic Encrypted Sparse Convolutional Neural Network Inference. FCCM 2022: 1-9 - [c543]Tian Ye, Rajgopal Kannan, Viktor K. Prasanna:
End-to-End Acceleration of Homomorphic Encrypted CNN Inference on FPGAs. FPGA 2022: 51 - [c542]Yi-Chien Lin, Bingyi Zhang, Viktor K. Prasanna:
HP-GNN: Generating High Throughput GNN Training Implementation on CPU-FPGA Heterogeneous Platform. FPGA 2022: 123-133 - [c541]Bingyi Zhang, Hanqing Zeng, Viktor K. Prasanna:
DecGNN: A Framework for Mapping Decoupled GNN Models onto CPU-FPGA Heterogeneous Platform. FPGA 2022: 154 - [c540]Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
Accurate, Low-latency, Efficient SAR Automatic Target Recognition on FPGA. FPL 2022: 1-8 - [c539]Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating Monte-Carlo Tree Search on CPU-FPGA Heterogeneous Platform. FPL 2022: 176-182 - [c538]Yang Yang, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Bandwidth Efficient Homomorphic Encrypted Matrix Vector Multiplication Accelerator on FPGA. FPT 2022: 1-9 - [c537]Soundarya Jayaraman, Bingyi Zhang, Viktor K. Prasanna:
Hypersort: High-performance Parallel Sorting on HBM-enabled FPGA. FPT 2022: 1-11 - [c536]Bingyi Zhang, Hanqing Zeng, Viktor K. Prasanna:
Low-latency Mini-batch GNN Inference on CPU-FPGA Heterogeneous Platform. HIPC 2022: 11-21 - [c535]Kartik Lakhotia, Fabrizio Petrini, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating Prefix Scan with in-network computing on Intel PIUMA. HIPC 2022: 59-68 - [c534]Jason Yik, Sanmukh R. Kuppannagari, Hanqing Zeng, Viktor K. Prasanna:
Input Feature Pruning for Accelerating GNN Inference on Heterogeneous Platforms. HIPC 2022: 282-291 - [c533]Sasindu Wijeratne, Akhilesh R. Jaiswal, Ajey P. Jacob, Bingyi Zhang, Viktor K. Prasanna:
Performance Modeling Sparse MTTKRP Using Optical Static Random Access Memory on FPGA. HPEC 2022: 1-7 - [c532]Tian Ye, Rajgopal Kannan, Viktor K. Prasanna:
FPGA Acceleration of Fully Homomorphic Encryption over the Torus. HPEC 2022: 1-7 - [c531]Bingyi Zhang, Akhilesh R. Jaiswal, Clynn Mathew, Ravi Teja Lakkireddy, Ajey P. Jacob, Sasindu Wijeratne, Viktor K. Prasanna:
Modeling the Energy Efficiency of GEMM using Optical Random Access Memory. HPEC 2022: 1-7 - [c530]Pengmiao Zhang, Rajgopal Kannan, Xiangzhi Tong, Anant V. Nori, Viktor K. Prasanna:
SHARP: Software Hint-Assisted Memory Access Prediction for Graph Analytics. HPEC 2022: 1-8 - [c529]Haomei Liu, Yuan Meng, Sanmukh Rao Kuppannagari, Viktor K. Prasanna:
End to End Framework for CNN Acceleration on FPGAs with Dynamic Algorithm Mapping. IC3 2022: 696-700 - [c528]Jürgen Becker, Lana Josipovic, Viktor K. Prasanna, Marco D. Santambrogio, Ramachandran Vaidyanathan:
29th Reconfigurable Architectures Workshop (RAW 2022). IPDPS Workshops 2022: 65-66 - [c527]Hongkuan Zhou, Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
Model-Architecture Co-Design for High Performance Temporal GNN Inference on FPGA. IPDPS 2022: 1108-1117 - [c526]Tian Ye, Sanmukh R. Kuppannagari, César A. F. De Rose, Sasindu Wijeratne, Rajgopal Kannan, Viktor K. Prasanna:
Estimating the Impact of Communication Schemes for Distributed Graph Processing. ISPDC 2022: 49-56 - [c525]Pengmiao Zhang, Rajgopal Kannan, Ajitesh Srivastava, Anant V. Nori, Viktor K. Prasanna:
ReSemble: Reinforced Ensemble Framework for Data Prefetching. SC 2022: 81:1-81:14 - [c524]Yuan Meng, Hongjiang Men, Viktor K. Prasanna:
Accelerator Design and Exploration for Deformable Convolution Networks. SiPS 2022: 1-6 - [p3]Ajitesh Srivastava, Charalampos Chelmis, Viktor K. Prasanna:
Computational Models for Cascades in Massive Graphs. Massive Graph Analytics 2022: 377-395 - [i46]Hanqing Zeng, Muhan Zhang, Yinglong Xia, Ajitesh Srivastava, Andrey Malevich, Rajgopal Kannan, Viktor K. Prasanna, Long Jin, Ren Chen:
Decoupling the Depth and Scope of Graph Neural Networks. CoRR abs/2201.07858 (2022) - [i45]Hongkuan Zhou, Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna, Carl E. Busart:
Model-Architecture Co-Design for High Performance Temporal GNN Inference on FPGA. CoRR abs/2203.05095 (2022) - [i44]Hongkuan Zhou, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
Design and Implementation of Knowledge Base for Runtime Management of Software Defined Hardware. CoRR abs/2203.15534 (2022) - [i43]Pengmiao Zhang, Ajitesh Srivastava, Anant V. Nori, Rajgopal Kannan, Viktor K. Prasanna:
Fine-Grained Address Segmentation for Attention-Based Variable-Degree Prefetching. CoRR abs/2205.02269 (2022) - [i42]Pengmiao Zhang, Ajitesh Srivastava, Anant V. Nori, Rajgopal Kannan, Viktor K. Prasanna:
TransforMAP: Transformer for Memory Access Prediction. CoRR abs/2205.14778 (2022) - [i41]Bingyi Zhang, Hanqing Zeng, Viktor K. Prasanna:
Low-latency Mini-batch GNN Inference on CPU-FPGA Heterogeneous Platform. CoRR abs/2206.08536 (2022) - [i40]Sasindu Wijeratne, Ta-Yang Wang, Rajgopal Kannan, Viktor K. Prasanna:
Towards Programmable Memory Controller for Tensor Decomposition. CoRR abs/2207.08298 (2022) - [i39]Sasindu Wijeratne, Akhilesh R. Jaiswal, Ajey P. Jacob, Bingyi Zhang, Viktor K. Prasanna:
Performance Modeling Sparse MTTKRP Using Optical Static Random Access Memory on FPGA. CoRR abs/2208.10593 (2022) - [i38]Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating Monte-Carlo Tree Search on CPU-FPGA Heterogeneous Platform. CoRR abs/2208.11208 (2022) - [i37]Diyi Hu, Chi Zhang, Viktor K. Prasanna, Bhaskar Krishnamachari:
Learning Practical Communication Strategies in Cooperative Multi-Agent Reinforcement Learning. CoRR abs/2209.01288 (2022) - [i36]Pengmiao Zhang, Rajgopal Kannan, Viktor K. Prasanna:
Phases, Modalities, Temporal and Spatial Locality: Domain Specific ML Prefetcher for Accelerating Graph Analytics. CoRR abs/2212.05250 (2022) - 2021
- [j170]Hanqing Zeng, Hongkuan Zhou, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
Accurate, efficient and scalable training of Graph Neural Networks. J. Parallel Distributed Comput. 147: 166-183 (2021) - [j169]Hongkuan Zhou, Ajitesh Srivastava, Hanqing Zeng, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating Large Scale Real-Time GNN Inference using Channel Pruning. Proc. VLDB Endow. 14(9): 1597-1605 (2021) - [j168]Aggelos Lazaris, Viktor K. Prasanna:
An LSTM Framework for Software-Defined Measurement. IEEE Trans. Netw. Serv. Manag. 18(1): 855-869 (2021) - [c523]Chi Zhang, Sanmukh R. Kuppannagari, Viktor K. Prasanna:
BRAC+: Improved Behavior Regularized Actor Critic for Offline Reinforcement Learning. ACML 2021: 204-219 - [c522]Hongkuan Zhou, James Orme-Rogers, Rajgopal Kannan, Viktor K. Prasanna:
SeDyT: A General Framework for Multi-Step Event Forecasting via Sequence Modeling on Dynamic Entity Embeddings. CIKM 2021: 3667-3671 - [c521]Sanmukh R. Kuppannagari, Yao Fu, Chung Ming Cheung, Viktor K. Prasanna:
Spatio-Temporal Missing Data Imputation for Smart Power Grids. e-Energy 2021: 458-465 - [c520]Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna:
BoostGCN: A Framework for Optimizing GCN Inference on FPGA. FCCM 2021: 29-39 - [c519]Bingyi Zhang, Rajgopal Kannan, Viktor K. Prasanna:
A Framework for Optimizing GCN Inference on FPGA. FPGA 2021: 145 - [c518]Yuan Meng, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
DYNAMAP: Dynamic Algorithm Mapping Framework for Low Latency CNN Inference. FPGA 2021: 183-193 - [c517]Tian Ye, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Performance Modeling and FPGA Acceleration of Homomorphic Encrypted Convolution. FPL 2021: 115-121 - [c516]Nathaniel Peura, Yuan Meng, Sanmukh R. Kuppannagari, Viktor K. Prasanna:
FGYM: Toolkit for Benchmarking FPGA based Reinforcement Learning Algorithms. FPL 2021: 404 - [c515]Chi Zhang, Sanmukh Rao Kuppannagari, Viktor K. Prasanna:
Parallel Actors and Learners: A Framework for Generating Scalable RL Implementations. HiPC 2021: 1-10 - [c514]Ta-Yang Wang, William Chang, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
Monte Carlo Tree Search for Task Mapping onto Heterogeneous Platforms. HiPC 2021: 63-70 - [c513]Yuan Meng, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
How to Avoid Zero-Spacing in Fractionally-Strided Convolution? A Hardware-Algorithm Co-Design Methodology. HiPC 2021: 81-90 - [c512]Madhav Aggarwal, Bingyi Zhang, Viktor K. Prasanna:
Performance of Local Push Algorithms for Personalized PageRank on Multi-core Platforms. HiPC 2021: 370-375 - [c511]Kartik Lakhotia, Fabrizio Petrini, Rajgopal Kannan, Viktor K. Prasanna:
In-network reductions on multi-dimensional HyperX. HOTI 2021: 1-8 - [c510]Sasindu Wijeratne, Sanket Pattnaik, Zhiyu Chen, Rajgopal Kannan, Viktor K. Prasanna:
Programmable FPGA-based Memory Controller. HOTI 2021: 43-51 - [c509]Yi-Chien Lin, Bingyi Zhang, Viktor K. Prasanna:
GCN Inference Acceleration using High-Level Synthesis. HPEC 2021: 1-6 - [c508]Sasindu Wijeratne, Rajgopal Kannan, Viktor K. Prasanna:
Reconfigurable Low-latency Memory System for Sparse Matricized Tensor Times Khatri-Rao Product on FPGA. HPEC 2021: 1-7 - [c507]Bingyi Zhang, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Efficient Neighbor-Sampling-based GNN Training on CPU-FPGA Heterogeneous Platform. HPEC 2021: 1-7 - [c506]Chung Ming Cheung, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Leveraging Spatial Information in Smart Grids using STGCN for Short-Term Load Forecasting. IC3 2021: 159-167 - [c505]Hanqing Zeng, Muhan Zhang, Yinglong Xia, Ajitesh Srivastava, Andrey Malevich, Rajgopal Kannan, Viktor K. Prasanna, Long Jin, Ren Chen:
Decoupling the Depth and Scope of Graph Neural Networks. NeurIPS 2021: 19665-19679 - [c504]Naifeng Zhang, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
GenMAT: A General-Purpose Machine Learning-Driven Auto-Tuner for Heterogeneous Platforms. PEHC@SC 2021: 1-9 - [c503]Tian Ye, Yang Yang, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
FPGA Acceleration of Number Theoretic Transform. ISC 2021: 98-117 - [i35]Ajitesh Srivastava, Tianjian Xu, Viktor K. Prasanna:
The EpiBench Platform to Propel AI/ML-based Epidemic Forecasting: A Prototype Demonstration Reaching Human Expert-level Performance. CoRR abs/2102.02842 (2021) - [i34]Hongkuan Zhou, Ajitesh Srivastava, Hanqing Zeng, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating Large Scale Real-Time GNN Inference using Channel Pruning. CoRR abs/2105.04528 (2021) - [i33]Ruizhi Zhang, Sasindu Wijeratne, Yang Yang, Sanmukh R. Kuppannagari, Viktor K. Prasanna:
A High Throughput Parallel Hash Table on FPGA using XOR-based Memory. CoRR abs/2108.03390 (2021) - [i32]Sasindu Wijeratne, Sanket Pattnaik, Zhiyu Chen, Rajgopal Kannan, Viktor K. Prasanna:
Programmable FPGA-based Memory Controller. CoRR abs/2108.09601 (2021) - [i31]Hongkuan Zhou, James Orme-Rogers, Rajgopal Kannan, Viktor K. Prasanna:
SeDyT: A General Framework for Multi-Step Event Forecasting via Sequence Modeling on Dynamic Entity Embeddings. CoRR abs/2109.04550 (2021) - [i30]Sasindu Wijeratne, Rajgopal Kannan, Viktor K. Prasanna:
Reconfigurable Low-latency Memory System for Sparse Matricized Tensor Times Khatri-Rao Product on FPGA. CoRR abs/2109.08874 (2021) - [i29]Chi Zhang, Sanmukh Rao Kuppannagari, Viktor K. Prasanna:
BRAC+: Improved Behavior Regularized Actor Critic for Offline Reinforcement Learning. CoRR abs/2110.00894 (2021) - [i28]Chi Zhang, Sanmukh Rao Kuppannagari, Viktor K. Prasanna:
Parallel Actors and Learners: A Framework for Generating Scalable RL Implementations. CoRR abs/2110.01101 (2021) - [i27]Kartik Lakhotia, Rajgopal Kannan, Viktor K. Prasanna:
Parallel Peeling of Bipartite Networks for Hierarchical Dense Subgraph Discovery. CoRR abs/2110.12511 (2021) - [i26]Yi-Chien Lin, Bingyi Zhang, Viktor K. Prasanna:
HP-GNN: Generating High Throughput GNN Training Implementation on CPU-FPGA Heterogeneous Platform. CoRR abs/2112.11684 (2021) - 2020
- [j167]Kartik Lakhotia, Rajgopal Kannan, Viktor K. Prasanna, César A. F. De Rose:
RECEIPT: REfine CoarsE-grained IndePendent Tasks for Parallel Tip decomposition of Bipartite Graphs. Proc. VLDB Endow. 14(3): 404-417 (2020) - [j166]Kartik Lakhotia, Rajgopal Kannan, Sourav Pati, Viktor K. Prasanna:
GPOP: A Scalable Cache- and Memory-efficient Framework for Graph Processing over Parts. ACM Trans. Parallel Comput. 7(1): 7:1-7:24 (2020) - [j165]Shijie Zhou, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating Stochastic Gradient Descent Based Matrix Factorization on FPGA. IEEE Trans. Parallel Distributed Syst. 31(8): 1897-1911 (2020) - [c502]Bingyi Zhang, Hanqing Zeng, Viktor K. Prasanna:
Hardware Acceleration of Large Scale GCN Inference. ASAP 2020: 61-68 - [c501]Stéphane Kuendig, Constantinos Marios Angelopoulos, Sanmukh R. Kuppannagari, José D. P. Rolim, Viktor K. Prasanna:
Crowdsourced Edge: A Novel Networking Paradigm for the Collaborative Community. DCOSS 2020: 474-481 - [c500]Yuan Meng, Sanmukh R. Kuppannagari, Viktor K. Prasanna:
Accelerating Proximal Policy Optimization on CPU-FPGA Heterogeneous Platforms. FCCM 2020: 19-27 - [c499]Bingyi Zhang, Hanqing Zeng, Viktor K. Prasanna:
Accelerating Large Scale GCN Inference on FPGA. FCCM 2020: 241 - [c498]Hanqing Zeng, Viktor K. Prasanna:
GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platforms. FPGA 2020: 255-265 - [c497]Yue Niu, Rajgopal Kannan, Ajitesh Srivastava, Viktor K. Prasanna:
Reuse Kernels or Activations?: A Flexible Dataflow for Low-latency Spectral CNN Acceleration. FPGA 2020: 266-276 - [c496]Rachit Rajat, Yuan Meng, Sanmukh R. Kuppannagari, Ajitesh Srivastava, Viktor K. Prasanna, Rajgopal Kannan:
QTAccel: A Generic FPGA based Design for Q-Table based Reinforcement Learning Accelerators. FPGA 2020: 323 - [c495]Ajitesh Srivastava, Naifeng Zhang, Rajgopal Kannan, Viktor K. Prasanna:
Towards High Performance, Portability, and Productivity: Lightweight Augmented Neural Networks for Performance Prediction. HiPC 2020: 21-30 - [c494]Yuan Meng, Yang Yang, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
How to Efficiently Train Your AI Agent? Characterizing and Evaluating Deep Reinforcement Learning on Heterogeneous Platforms. HPEC 2020: 1-7 - [c493]Ta-Yang Wang, Ajitesh Srivastava, Viktor K. Prasanna:
A Framework for Task Mapping onto Heterogeneous Platforms. HPEC 2020: 1-6 - [c492]Tian Ye, Rajgopal Kannan, Viktor K. Prasanna:
Accelerator Design and Performance Modeling for Homomorphic Encrypted CNN Inference. HPEC 2020: 1-7 - [c491]Ruizhi Zhang, Sasindu Wijeratne, Yang Yang, Sanmukh R. Kuppannagari, Viktor K. Prasanna:
A High Throughput Parallel Hash Table on FPGA using XOR-based Memory. HPEC 2020: 1-7 - [c490]Yang Yang, Sanmukh R. Kuppannagari, Viktor K. Prasanna:
A High Throughput Parallel Hash Table Accelerator on HBM-enabled FPGAs. FPT 2020: 148-153 - [c489]Hanqing Zeng, Hongkuan Zhou, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
GraphSAINT: Graph Sampling Based Inductive Learning Method. ICLR 2020 - [c488]Yuan Meng, Sanmukh R. Kuppannagari, Rachit Rajat, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
QTAccel: A Generic FPGA based Design for Q-Table based Reinforcement Learning Accelerators. IPDPS Workshops 2020: 107-114 - [c487]Chung Ming Cheung, Sanmukh Rao Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Load Demand User Profiling in Smart Grids with Distributed Solar Generation. ISGT 2020: 1-5 - [c486]Pengmiao Zhang, Ajitesh Srivastava, Benjamin Brooks, Rajgopal Kannan, Viktor K. Prasanna:
RAOP: Recurrent Neural Network Augmented Offset Prefetcher. MEMSYS 2020: 352-362 - [c485]Ajitesh Srivastava, Ta-Yang Wang, Pengmiao Zhang, César Augusto Fonticielha De Rose, Rajgopal Kannan, Viktor K. Prasanna:
MemMAP: Compact and Generalizable Meta-LSTM Models for Memory Access Prediction. PAKDD (2) 2020: 57-68 - [c484]Connor Imes, Alexei Colin, Naifeng Zhang, Ajitesh Srivastava, Viktor K. Prasanna, John Paul Walters:
Compiler Abstractions and Runtime for Extreme-scale SAR and CFD Workloads. ESPM2@SC 2020: 1-7 - [c483]Yang Yang, Sanmukh R. Kuppannagari, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
FASTHash: FPGA-Based High Throughput Parallel Hash Table. ISC 2020: 3-22 - [i25]Hanqing Zeng, Viktor K. Prasanna:
GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platforms. CoRR abs/2001.02498 (2020) - [i24]Ajitesh Srivastava, Naifeng Zhang, Rajgopal Kannan, Viktor K. Prasanna:
Towards High Performance, Portability, and Productivity: Lightweight Augmented Neural Networks for Performance Prediction. CoRR abs/2003.07497 (2020) - [i23]Ajitesh Srivastava, Viktor K. Prasanna:
Learning to Forecast and Forecasting to Learn from the COVID-19 Pandemic. CoRR abs/2004.11372 (2020) - [i22]Ajitesh Srivastava, Viktor K. Prasanna:
Data-driven Identification of Number of Unreported Cases for COVID-19: Bounds and Limitations. CoRR abs/2006.02127 (2020) - [i21]Chi Zhang, Sanmukh Rao Kuppannagari, Viktor K. Prasanna:
Maximum Entropy Model Rollouts: Fast Model Based Policy Optimization without Compounding Errors. CoRR abs/2006.04802 (2020) - [i20]Ajitesh Srivastava, Tianjian Xu, Viktor K. Prasanna:
Fast and Accurate Forecasting of COVID-19 Deaths Using the SIkJα Model. CoRR abs/2007.05180 (2020) - [i19]Hanqing Zeng, Hongkuan Zhou, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
Accurate, Efficient and Scalable Training of Graph Neural Networks. CoRR abs/2010.03166 (2020) - [i18]Kartik Lakhotia, Rajgopal Kannan, Viktor K. Prasanna, César A. F. De Rose:
RECEIPT: REfine CoarsE-grained IndePendent Tasks for Parallel Tip decomposition of Bipartite Graphs. CoRR abs/2010.08695 (2020) - [i17]Yuan Meng, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
DYNAMAP: Dynamic Algorithm Mapping Framework for Low Latency CNN Inference. CoRR abs/2012.00912 (2020)
2010 – 2019
- 2019
- [j164]Kartik Lakhotia, Rajgopal Kannan, Qing Dong, Viktor K. Prasanna:
Planting Trees for scalable and efficient Canonical Hub Labeling. Proc. VLDB Endow. 13(4): 492-505 (2019) - [j163]Muhammad Rizwan Saeed, Charalampos Chelmis, Viktor K. Prasanna:
Extracting entity-specific substructures for RDF graph embeddings. Semantic Web 10(6): 1087-1108 (2019) - [j162]Ajitesh Srivastava, Robin Petering, Nicholas Barr, Rajgopal Kannan, Eric Rice, Viktor K. Prasanna:
Network-based intervention strategies to reduce violence among homeless. Soc. Netw. Anal. Min. 9(1): 38:1-38:12 (2019) - [j161]Ranjan Pal, Pan Hui, Viktor K. Prasanna:
Privacy Engineering for the Smart Micro-Grid. IEEE Trans. Knowl. Data Eng. 31(5): 965-980 (2019) - [j160]Shijie Zhou, Rajgopal Kannan, Viktor K. Prasanna, Guna Seetharaman, Qing Wu:
HitGraph: High-throughput Graph Processing Framework on FPGA. IEEE Trans. Parallel Distributed Syst. 30(10): 2249-2264 (2019) - [c482]Ajitesh Srivastava, Rajgopal Kannan, Charalampos Chelmis, Viktor K. Prasanna:
RecANt: Network-based Recruitment for Active Fake News Correction. IEEE BigData 2019: 940-949 - [c481]Kartik Lakhotia, Rajgopal Kannan, Aditya Gaur, Ajitesh Srivastava, Viktor K. Prasanna:
Parallel edge-based sampling for static and dynamic graphs. CF 2019: 125-134 - [c480]Aggelos Lazaris, Viktor K. Prasanna:
Deep Learning Models For Aggregated Network Traffic Prediction. CNSM 2019: 1-5 - [c479]Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Approximate Scheduling of DERs with Discrete Complex Injections. e-Energy 2019: 204-214 - [c478]Chung Ming Cheung, Sanmukh Rao Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Towards Improved Real-Time Observability of Behind-Meter PhotoVoltaic Systems: A Data-Driven Approach. e-Energy 2019: 447-455 - [c477]Rachit Rajat, Hanqing Zeng, Viktor K. Prasanna:
A Flexible Design Automation Tool for Accelerating Quantized Spectral CNNs. FPL 2019: 144-150 - [c476]Chuanxiu Xiong, Ajitesh Srivastava, Rajgopal Kannan, Omkar Damle, Viktor K. Prasanna, Erroll Southers:
On Predicting Crime with Heterogeneous Spatial Patterns: Methods and Evaluation. SIGSPATIAL/GIS 2019: 43-51 - [c475]Yue Niu, Hanqing Zeng, Ajitesh Srivastava, Kartik Lakhotia, Rajgopal Kannan, Yanzhi Wang, Viktor K. Prasanna:
SPEC2: SPECtral SParsE CNN Accelerator on FPGAs. HiPC 2019: 195-204 - [c474]Sanmukh R. Kuppannagari, Rachit Rajat, Rajgopal Kannan, Aravind Dasu, Viktor K. Prasanna:
IP Cores for Graph Kernels on FPGAs. HPEC 2019: 1-7 - [c473]Hongkuan Zhou, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
Design and Implementation of Knowledge Base for Runtime Management of Software Defined Hardware. HPEC 2019: 1-7 - [c472]Aggelos Lazaris, Viktor K. Prasanna:
An LSTM Framework For Modeling Network Traffic. IM 2019: 19-24 - [c471]Chi Zhang, Sanmukh R. Kuppannagari, Chuanxiu Xiong, Rajgopal Kannan, Viktor K. Prasanna:
A cooperative multi-agent deep reinforcement learning framework for real-time residential load scheduling. IoTDI 2019: 59-69 - [c470]Viktor K. Prasanna:
HCW 2019 Keynote Address. IPDPS Workshops 2019: 5 - [c469]Hanqing Zeng, Hongkuan Zhou, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
Accurate, Efficient and Scalable Graph Embedding. IPDPS 2019: 462-471 - [c468]Ajitesh Srivastava, Angelos Lazaris, Benjamin Brooks, Rajgopal Kannan, Viktor K. Prasanna:
Predicting memory accesses: the road to compact ML-driven prefetcher. MEMSYS 2019: 461-470 - [c467]Akshit Goel, Sanmukh R. Kuppannagari, Yang Yang, Ajitesh Srivastava, Viktor K. Prasanna:
Parallel Totally Induced Edge Sampling on FPGAs. PARCO 2019: 671-680 - [c466]Kartik Lakhotia, Rajgopal Kannan, Sourav Pati, Viktor K. Prasanna:
GPOP: a cache and memory-efficient framework for graph processing over partitions. PPoPP 2019: 393-394 - [c465]Chi Zhang, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Building HVAC Scheduling Using Reinforcement Learning via Neural Network Based Model Approximation. BuildSys 2019: 287-296 - [i16]Kartik Lakhotia, Qing Dong, Rajgopal Kannan, Viktor K. Prasanna:
Planting Trees for scalable and efficient Canonical Hub Labeling. CoRR abs/1907.00140 (2019) - [i15]Hanqing Zeng, Hongkuan Zhou, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
GraphSAINT: Graph Sampling Based Inductive Learning Method. CoRR abs/1907.04931 (2019) - [i14]Chi Zhang, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Building HVAC Scheduling Using Reinforcement Learning via Neural Network Based Model Approximation. CoRR abs/1910.05313 (2019) - [i13]Yue Niu, Hanqing Zeng, Ajitesh Srivastava, Kartik Lakhotia, Rajgopal Kannan, Yanzhi Wang, Viktor K. Prasanna:
SPEC2: SPECtral SParsE CNN Accelerator on FPGAs. CoRR abs/1910.11103 (2019) - 2018
- [j159]Muhammad Rizwan Saeed, Charalampos Chelmis, Viktor K. Prasanna:
ASQFor: Automatic SPARQL query formulation for the non-expert. AI Commun. 31(1): 19-32 (2018) - [j158]Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Optimal Discrete Net-Load Balancing in Smart Grids with High PV Penetration. ACM Trans. Sens. Networks 14(3-4): 24:1-24:30 (2018) - [j157]Da Tong, Viktor K. Prasanna:
Sketch Acceleration on FPGA and its Applications in Network Anomaly Detection. IEEE Trans. Parallel Distributed Syst. 29(4): 929-942 (2018) - [c464]Ajitesh Srivastava, Robin Petering, Rajgopal Kannan, Eric Rice, Viktor K. Prasanna:
How to Stop Violence Among Homeless: Extension of Voter Model and Intervention Strategies. ASONAM 2018: 83-86 - [c463]Ajitesh Srivastava, Rajgopal Kannan, Charalampos Chelmis, Viktor K. Prasanna:
FActCheck: Keeping Activation of Fake News at Check. AAMAS 2018: 2079-2081 - [c462]Shijie Zhou, Rajgopal Kannan, Hanqing Zeng, Viktor K. Prasanna:
An FPGA framework for edge-centric graph processing. CF 2018: 69-77 - [c461]Hanqing Zeng, Ren Chen, Chi Zhang, Viktor K. Prasanna:
A Framework for Generating High Throughput CNN Implementations on FPGAs. FPGA 2018: 117-126 - [c460]Shijie Zhou, Rajgopal Kannan, Yu Min, Viktor K. Prasanna:
FASTCF: FPGA-based Accelerator for STochastic-Gradient-Descent-based Collaborative Filtering. FPGA 2018: 259-268 - [c459]Qing Dong, Kartik Lakhotia, Hanqing Zeng, Rajgopal Karman, Viktor K. Prasanna, Guna Seetharaman:
A Fast and Efficient Parallel Algorithm for Pruned Landmark Labeling. HPEC 2018: 1-7 - [c458]Jürgen Becker, Viktor K. Prasanna, Markus Weimer, Wayne Luk, Kaveh Aasaraai, Derek Chiou:
RAW 2018 Invited Talks. IPDPS Workshops 2018: 81-82 - [c457]Muhammad Rizwan Saeed, Viktor K. Prasanna:
Extracting Entity-Specific Substructures for RDF Graph Embedding. IRI 2018: 378-385 - [c456]Chung Ming Cheung, Rajgopal Kannan, Viktor K. Prasanna:
Temporal ensemble learning of univariate methods for short term load forecasting. ISGT 2018: 1-5 - [c455]Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Risk aware net load balancing in micro grids with high DER penetration. ISGT 2018: 1-5 - [c454]Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
NO-LESS: Near optimal curtailment strategy selection for net load balancing in micro grids. ISGT 2018: 1-5 - [c453]Weiyi Sun, Hanqing Zeng, Yi-Hua Edward Yang, Viktor K. Prasanna:
Throughput-Optimized Frequency Domain CNN with Fixed-Point Quantization on FPGA. ReConFig 2018: 1-8 - [c452]Chung Ming Cheung, Wen Zhong, Chuanxiu Xiong, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
Behind-the-Meter Solar Generation Disaggregation using Consumer Mixture Models. SmartGridComm 2018: 1-6 - [c451]Chi Zhang, Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Generative Adversarial Network for Synthetic Time Series Data Generation in Smart Grids. SmartGridComm 2018: 1-6 - [c450]Kartik Lakhotia, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating PageRank using Partition-Centric Processing. USENIX ATC 2018: 427-440 - [i12]Muhammad Rizwan Saeed, Charalampos Chelmis, Viktor K. Prasanna:
Not all Embeddings are created Equal: Extracting Entity-specific Substructures for RDF Graph Embedding. CoRR abs/1804.05184 (2018) - [i11]Kartik Lakhotia, Sourav Pati, Rajgopal Kannan, Viktor K. Prasanna:
GPOP: A cache- and work-efficient framework for Graph Processing Over Partitions. CoRR abs/1806.08092 (2018) - [i10]Hanqing Zeng, Hongkuan Zhou, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
Accurate, Efficient and Scalable Graph Embedding. CoRR abs/1810.11899 (2018) - 2017
- [j156]Qunzhi Zhou, Yogesh Simmhan, Viktor K. Prasanna:
Knowledge-infused and consistent Complex Event Processing over real-time and persistent streams. Future Gener. Comput. Syst. 76: 391-406 (2017) - [j155]Ranjan Pal, Viktor K. Prasanna:
The STREAM Mechanism for CPS Security The Case of the Smart Grid. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(4): 537-550 (2017) - [j154]Ren Chen, Shreyas G. Singapura, Viktor K. Prasanna:
Optimal dynamic data layouts for 2D FFT on 3D memory integrated FPGA. J. Supercomput. 73(2): 652-663 (2017) - [j153]Da Tong, Yun Rock Qu, Viktor K. Prasanna:
Accelerating Decision Tree Based Traffic Classification on FPGA and Multicore Platforms. IEEE Trans. Parallel Distributed Syst. 28(11): 3046-3059 (2017) - [j152]Ren Chen, Viktor K. Prasanna:
Computer Generation of High Throughput and Memory Efficient Sorting Designs on FPGA. IEEE Trans. Parallel Distributed Syst. 28(11): 3100-3113 (2017) - [j151]Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang:
The First 25 Years of the FPL Conference: Significant Papers. ACM Trans. Reconfigurable Technol. Syst. 10(2): 15:1-15:17 (2017) - [c449]Abhinav Podili, Chi Zhang, Viktor K. Prasanna:
Fast and efficient implementation of Convolutional Neural Networks on FPGA. ASAP 2017: 11-18 - [c448]Chung Ming Cheung, Palash Goyal, Viktor K. Prasanna, Arash Saber Tehrani:
OReONet: Deep convolutional network for oil reservoir optimization. IEEE BigData 2017: 1277-1282 - [c447]Aggelos Lazaris, Viktor K. Prasanna:
DeepFlow: a deep learning framework for software-defined measurement. CAN@CoNEXT 2017: 43-48 - [c446]Michail Misyrlis, Chung Ming Cheung, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
Spatio-Temporal Modeling of Criminal Activity. SocialSens@CPSWeek 2017: 3-8 - [c445]Ren Chen, Viktor K. Prasanna:
Optimal Circuits for Parallel Bit Reversal. DAC 2017: 73:1-73:6 - [c444]Chi Zhang, Viktor K. Prasanna:
Frequency Domain Acceleration of Convolutional Neural Networks on CPU-FPGA Shared Memory System. FPGA 2017: 35-44 - [c443]Kartik Lakhotia, Shreyas G. Singapura, Rajgopal Kannan, Viktor K. Prasanna:
ReCALL: Reordered Cache Aware Locality Based Graph Processing. HiPC 2017: 273-282 - [c442]Oded Green, James Fox, Euna Kim, Federico Busato, Nicola Bombieri, Kartik Lakhotia, Shijie Zhou, Shreyas G. Singapura, Hanqing Zeng, Rajgopal Kannan, Viktor K. Prasanna, David A. Bader:
Quickly finding a truss in a haystack. HPEC 2017: 1-7 - [c441]Shreyas G. Singapura, Rajgopal Kannan, Viktor K. Prasanna:
Optimal data layout for block-level random accesses to scratchpad. HPEC 2017: 1-7 - [c440]Shreyas G. Singapura, Ajitesh Srivastava, Rajgopal Kannan, Viktor K. Prasanna:
OSCAR: Optimizing SCrAtchpad reuse for graph processing. HPEC 2017: 1-7 - [c439]Shijie Zhou, Kartik Lakhotia, Shreyas G. Singapura, Hanqing Zeng, Rajgopal Kannan, Viktor K. Prasanna, James Fox, Euna Kim, Oded Green, David A. Bader:
Design and implementation of parallel PageRank on multicore platforms. HPEC 2017: 1-6 - [c438]Charith Wickramaarachchi, Rajgopal Kannan, Charalampos Chelmis, Viktor K. Prasanna:
PReSS towards a secure smart grid: Protection recommendations against smart spoofing. ISGT 2017: 1-5 - [c437]Hanqing Zeng, Chi Zhang, Viktor K. Prasanna:
Fast generation of high throughput customized deep learning accelerators on FPGAs. ReConFig 2017: 1-8 - [c436]Shijie Zhou, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating low rank matrix completion on FPGA. ReConFig 2017: 1-7 - [c435]Shijie Zhou, Viktor K. Prasanna:
Accelerating Graph Analytics on CPU-FPGA Heterogeneous Platform. SBAC-PAD 2017: 137-144 - [c434]Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Optimal net-load balancing in smart grids with high PV penetration. BuildSys 2017: 27:1-27:10 - [p2]Muhammad Rizwan Saeed, Charalampos Chelmis, Viktor K. Prasanna:
Automatic Integration and Querying of Semantic Rich Heterogeneous Data: Laying the Foundations for Semantic Web of Things. Managing the Web of Things 2017: 251-273 - [i9]Sanmukh R. Kuppannagari, Rajgopal Kannan, Viktor K. Prasanna:
Optimal Net-Load Balancing in Smart Grids with High PV Penetration. CoRR abs/1709.00644 (2017) - [i8]Kartik Lakhotia, Rajgopal Kannan, Viktor K. Prasanna:
Accelerating PageRank using Partition-Centric Processing. CoRR abs/1709.07122 (2017) - 2016
- [j150]Om Prasad Patri, Anand V. Panangadan, Vikrambhai S. Sorathia, Viktor K. Prasanna:
Sensors to Events: Semantic Modeling and Recognition of Events from Data Streams. Int. J. Semantic Comput. 10(4): 461-502 (2016) - [j149]Viktor K. Prasanna:
Message from the Editor-in-Chief. J. Parallel Distributed Comput. 87: iii (2016) - [j148]Yun Rock Qu, Viktor K. Prasanna:
Compact hash tables for decision-trees. Parallel Comput. 54: 121-127 (2016) - [j147]Ajitesh Srivastava, Charalampos Chelmis, Viktor K. Prasanna:
Computing competing cascades on signed networks. Soc. Netw. Anal. Min. 6(1): 82:1-82:14 (2016) - [j146]Yun Rock Qu, Viktor K. Prasanna:
High-Performance and Dynamically Updatable Packet Classification Engine on FPGA. IEEE Trans. Parallel Distributed Syst. 27(1): 197-209 (2016) - [j145]Yun Rock Qu, Viktor K. Prasanna:
Fast Online Set Intersection for Network Processing on FPGA. IEEE Trans. Parallel Distributed Syst. 27(11): 3214-3225 (2016) - [j144]Ranjan Pal, Charalampos Chelmis, Marc Frîncu, Viktor K. Prasanna:
MATCH for the Prosumer Smart Grid The Algorithmics of Real-Time Power Balance. IEEE Trans. Parallel Distributed Syst. 27(12): 3532-3546 (2016) - [j143]Ranjan Pal, Charalampos Chelmis, Marc Frîncu, Viktor K. Prasanna:
Towards Dynamic Demand Response On Efficient Consumer Grouping Algorithmics. IEEE Trans. Sustain. Comput. 1(1): 20-34 (2016) - [c433]Saima Aman, Charalampos Chelmis, Viktor K. Prasanna:
Learning to REDUCE: A Reduced Electricity Consumption Prediction Ensemble. AAAI Workshop: AI for Smart Grids and Smart Buildings 2016 - [c432]Shreyas G. Singapura, Yi-Hua E. Yang, Anand V. Panangadan, Tamás Németh, Peter Ng, Viktor K. Prasanna:
FPGA-Based Acceleration of Pattern Matching in YARA. ARC 2016: 320-327 - [c431]Charith Wickramaarachchi, Rajgopal Kannan, Charalampos Chelmis, Viktor K. Prasanna:
Distributed exact subgraph matching in small diameter dynamic graphs. IEEE BigData 2016: 3360-3369 - [c430]Shijie Zhou, Charalampos Chelmis, Viktor K. Prasanna:
High-Throughput and Energy-Efficient Graph Processing on FPGA. FCCM 2016: 103-110 - [c429]Ren Chen, Viktor K. Prasanna:
Accelerating Equi-Join on a CPU-FPGA Heterogeneous Platform. FCCM 2016: 212-219 - [c428]Greg Harris, Anand V. Panangadan, Viktor K. Prasanna:
GPU-Accelerated Parameter Optimization for Classification Rule Learning. FLAIRS 2016: 436-441 - [c427]Ren Chen, Viktor K. Prasanna:
Optimizing interconnection complexity for realizing fixed permutation in data and signal processing algorithms. FPL 2016: 1-9 - [c426]Shreyas G. Singapura, Rajgopal Kannan, Viktor K. Prasanna:
On-chip memory efficient data layout for 2D FFT on 3D memory integrated FPGA. HPEC 2016: 1-7 - [c425]Sanmukh R. Kuppannagari, Rajgopal Kannan, Charalampos Chelmis, Arash Saber Tehrani, Viktor K. Prasanna:
Optimal Customer Targeting for Sustainable Demand Response in Smart Grids. ICCS 2016: 324-334 - [c424]Sanmukh R. Kuppannagari, Rajgopal Kannan, Charalampos Chelmis, Viktor K. Prasanna:
Implementation of Learning-Based Dynamic Demand Response on a Campus Micro-Grid. IJCAI 2016: 4250-4251 - [c423]Muhammad Rizwan Saeed, Charalampos Chelmis, Viktor K. Prasanna:
Thou Shalt ASQFor and Shalt Receive the Semantic Answer. IJCAI 2016: 4264-4265 - [c422]Chi Zhang, Ren Chen, Viktor K. Prasanna:
High Throughput Large Scale Sorting on a CPU-FPGA Heterogeneous Platform. IPDPS Workshops 2016: 148-155 - [c421]Vasileios Zois, Anand V. Panangadan, Viktor K. Prasanna:
Accelerating Support Count for Association Rule Mining on GPUs. IPDPS Workshops 2016: 1423-1432 - [c420]Greg Harris, Anand V. Panangadan, Viktor K. Prasanna:
PRIMER - A Regression-Rule Learning System for Intervention Optimization. RuleML 2016: 307-321 - [c419]Charalampos Chelmis, Rajgopal Kannan, Viktor K. Prasanna:
Software defined connected prosumer communities. WF-IoT 2016: 684-685 - [c418]Ajitesh Srivastava, Charalampos Chelmis, Viktor K. Prasanna:
Mining Large Dense Subgraphs. WWW (Companion Volume) 2016: 111-112 - [i7]Qunzhi Zhou, Yogesh L. Simmhan, Viktor K. Prasanna:
Knowledge-infused and Consistent Complex Event Processing over Real-time and Persistent Streams. CoRR abs/1611.00676 (2016) - 2015
- [j142]Yun Rock Qu, Shijie Zhou, Viktor K. Prasanna:
A Decomposition-Based Approach for Scalable Many-Field Packet Classification on Multi-core Processors. Int. J. Parallel Program. 43(6): 965-987 (2015) - [j141]Da Tong, Viktor K. Prasanna:
High Throughput Sketch Based Online Heavy Hitter Detection on FPGA. SIGARCH Comput. Archit. News 43(4): 70-75 (2015) - [j140]Ajitesh Srivastava, Charalampos Chelmis, Viktor K. Prasanna:
The unified model of social influence and its application in influence maximization. Soc. Netw. Anal. Min. 5(1): 66:1-66:15 (2015) - [j139]Alok Gautam Kumbhare, Yogesh L. Simmhan, Marc Frîncu, Viktor K. Prasanna:
Reactive Resource Provisioning Heuristics for Dynamic Dataflows on Cloud Infrastructure. IEEE Trans. Cloud Comput. 3(2): 105-118 (2015) - [j138]Saima Aman, Yogesh L. Simmhan, Viktor K. Prasanna:
Holistic Measures for Evaluating Prediction Models in Smart Grids. IEEE Trans. Knowl. Data Eng. 27(2): 475-488 (2015) - [c417]Saima Aman, Charalampos Chelmis, Viktor K. Prasanna:
Influence-Driven Model for Time Series Prediction from Partial Observations. AAAI 2015: 601-607 - [c416]Charalampos Chelmis, Saima Aman, Muhammad Rizwan Saeed, Marc Frîncu, Viktor K. Prasanna:
Estimating Reduced Consumption for Dynamic Demand Response. AAAI Workshop: Computational Sustainability 2015 - [c415]Yun Rock Qu, Hao H. Zhang, Shijie Zhou, Viktor K. Prasanna:
Optimizing Many-field Packet Classification on FPGA, Multi-core General Purpose Processor, and GPU. ANCS 2015: 87-98 - [c414]Ren Chen, Viktor K. Prasanna:
DRAM Row Activation Energy Optimization for Stride Memory Access on FPGA-Based Systems. ARC 2015: 349-356 - [c413]Shreyas G. Singapura, Anand V. Panangadan, Viktor K. Prasanna:
Towards Performance Modeling of 3D Memory Integrated FPGA Architectures. ARC 2015: 443-450 - [c412]Shijie Zhou, Yun Rock Qu, Viktor K. Prasanna:
Large-scale packet classification on FPGA. ASAP 2015: 226-233 - [c411]Ajitesh Srivastava, Charalampos Chelmis, Viktor K. Prasanna:
Social Influence Computation and Maximization in Signed Networks with Competing Cascades. ASONAM 2015: 41-48 - [c410]Charalampos Chelmis, Jahanvi Kolte, Viktor K. Prasanna:
Big data analytics for demand response: Clustering over space and time. IEEE BigData 2015: 2223-2232 - [c409]Charith Wickramaarachchi, Alok Gautam Kumbhare, Marc Frîncu, Charalampos Chelmis, Viktor K. Prasanna:
Real-Time Analytics for Fast Evolving Social Graphs. CCGRID 2015: 829-834 - [c408]Yinuo Zhang, Anand V. Panangadan, Viktor K. Prasanna:
FP-CPNNQ: A Filter-Based Protocol for Continuous Probabilistic Nearest Neighbor Query. DASFAA (2) 2015: 57-73 - [c407]Yinuo Zhang, Anand V. Panangadan, Viktor K. Prasanna:
UFOMQ: An Algorithm for Querying for Similar Individuals in Heterogeneous Ontologies. DaWaK 2015: 178-189 - [c406]Chao Shang, Anand V. Panangadan, Viktor K. Prasanna:
Event Extraction from Unstructured Text Data. DEXA (1) 2015: 543-557 - [c405]Ranjan Pal, Charalampos Chelmis, Chandra Tadepalli, Marc Frîncu, Saima Aman, Viktor K. Prasanna:
Challenge: On Online Time Series Clustering for Demand Response: Optic - A Theory to Break the 'Curse of Dimensionality'. e-Energy 2015: 95-100 - [c404]Charalampos Chelmis, Muhammad Rizwan Saeed, Marc Frîncu, Viktor K. Prasanna:
Curtailment Estimation Methods for Demand Response: Lessons Learned by Comparing Apples to Oranges. e-Energy 2015: 217-218 - [c403]Marc Frîncu, Charalampos Chelmis, Muhammad Rizwan Saeed, Viktor K. Prasanna, Saima Aman, Vasileios Zois, Carol Fern, Aras Akbari:
Enabling Automated Dynamic Demand Response: From Theory to Practice. e-Energy 2015: 229-230 - [c402]Yun Rock Qu, Viktor K. Prasanna:
Enabling High Throughput and Virtualization for Traffic Classification on FPGA. FCCM 2015: 44-51 - [c401]Ren Chen, Sruja Siriyal, Viktor K. Prasanna:
Energy and Memory Efficient Mapping of Bitonic Sorting on FPGA. FPGA 2015: 240-249 - [c400]Sanmukh R. Kuppannagari, Viktor K. Prasanna:
Efficient Generation of Energy and Performance Pareto Front for FPGA Designs (Abstract Only). FPGA 2015: 273 - [c399]Ren Chen, Viktor K. Prasanna:
Automatic generation of high throughput energy efficient streaming architectures for arbitrary fixed permutations. FPL 2015: 1-8 - [c398]Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang:
Significant papers from the first 25 years of the FPL conference. FPL 2015: 1-3 - [c397]Yun Rock Qu, Viktor K. Prasanna:
Power-efficient range-match-based packet classification on FPGA. FPL 2015: 1-8 - [c396]Shijie Zhou, Viktor K. Prasanna:
Scalable GPU-Accelerated IPv6 Lookup Using Hierarchical Perfect Hashing. GLOBECOM 2015: 1-6 - [c395]Da Tong, Viktor K. Prasanna:
High Throughput Hierarchical Heavy Hitter Detection in Data Streams. HiPC 2015: 224-233 - [c394]Alok Gautam Kumbhare, Marc Frîncu, Yogesh L. Simmhan, Viktor K. Prasanna:
Fault-Tolerant and Elastic Streaming MapReduce with Decentralized Coordination. ICDCS 2015: 328-338 - [c393]Fabian Knirsch, Dominik Engel, Christian Neureiter, Marc Frîncu, Viktor K. Prasanna:
Privacy Assessment of Data Flow Graphs for an Advanced Recommender System in the Smart Grid. ICISSP (Revised Selected Papers) 2015: 89-106 - [c392]Fabian Knirsch, Dominik Engel, Christian Neureiter, Marc Frîncu, Viktor K. Prasanna:
Model-driven Privacy Assessment in the Smart Grid. ICISSP 2015: 173-181 - [c391]Viktor K. Prasanna:
RAW 2015 Keynote. IPDPS Workshops 2015: 70 - [c390]Da Tong, Shijie Zhou, Viktor K. Prasanna:
High-Throughput Online Hash Table on FPGA. IPDPS Workshops 2015: 105-112 - [c389]Shijie Zhou, Charalampos Chelmis, Viktor K. Prasanna:
Accelerating Large-Scale Single-Source Shortest Path on FPGA. IPDPS Workshops 2015: 129-136 - [c388]Shreyas G. Singapura, Anand V. Panangadan, Viktor K. Prasanna:
Performance Modeling of Matrix Multiplication on 3D Memory Integrated FPGA. IPDPS Workshops 2015: 154-162 - [c387]Yogesh L. Simmhan, Neel Choudhury, Charith Wickramaarachchi, Alok Gautam Kumbhare, Marc Frîncu, Cauligi S. Raghavendra, Viktor K. Prasanna:
Distributed Programming over Time-Series Graphs. IPDPS 2015: 809-818 - [c386]Charith Wickramaarachchi, Charalampos Chelmis, Viktor K. Prasanna:
Empowering Fast Incremental Computation over Large Scale Dynamic Graphs. IPDPS Workshops 2015: 1166-1171 - [c385]Yinuo Zhang, Hao Wu, Anand V. Panangadan, Viktor K. Prasanna:
Integration of Heterogeneous Web Services for Event-Based Social Networks. IRI 2015: 57-63 - [c384]Chung Ming Cheung, Yinuo Zhang, Anand V. Panangadan, Viktor K. Prasanna:
Computational Cost of Querying for Related Entities in Different Ontologies. IRI 2015: 534-541 - [c383]Fabian Knirsch, Dominik Engel, Marc Frîncu, Viktor K. Prasanna:
Model-based assessment for balancing privacy requirements and operational capabilities in the smart grid. ISGT 2015: 1-5 - [c382]Ren Chen, Shreyas G. Singapura, Viktor K. Prasanna:
Optimal Dynamic Data Layouts for 2D FFT on 3D Memory Integrated FPGA. PaCT 2015: 338-348 - [c381]Greg Harris, Anand V. Panangadan, Viktor K. Prasanna:
Learning of Performance Measures from Crowd-Sourced Data with Application to Ranking of Investments. PAKDD (1) 2015: 538-549 - [c380]Ajitesh Srivastava, Ren Chen, Viktor K. Prasanna, Charalampos Chelmis:
A hybrid design for high performance large-scale sorting on FPGA. ReConFig 2015: 1-6 - [c379]Da Tong, Viktor K. Prasanna:
High throughput sketch based online heavy change detection on FPGA. ReConFig 2015: 1-8 - [c378]Shijie Zhou, Charalampos Chelmis, Viktor K. Prasanna:
Optimizing memory performance for FPGA implementation of pagerank. ReConFig 2015: 1-6 - [c377]Om Prasad Patri, Ketan Singh, Pedro A. Szekely, Anand V. Panangadan, Viktor K. Prasanna:
Personalized trip planning by integrating multimodal user-generated content. ICSC 2015: 381-388 - [c376]Saima Aman, Marc Frîncu, Charalampos Chelmis, Muhammad Usman Noor, Yogesh Simmhan, Viktor K. Prasanna:
Prediction models for dynamic demand response: Requirements, challenges, and insights. SmartGridComm 2015: 338-343 - [r6]Weirong Jiang, Viktor K. Prasanna:
Network Virtualization in Data Centers: A Data Plane Perspective. Handbook on Data Centers 2015: 327-349 - [r5]Yun Rock Qu, Shijie Zhou, Viktor K. Prasanna:
Packet Classification on Multi-core Platforms. Handbook on Data Centers 2015: 425-447 - 2014
- [j137]Charalampos Chelmis, Hao Wu, Vikram Sorathia, Viktor K. Prasanna:
Semantic Social Network Analysis for the Enterprise. Comput. Informatics 33(3): 479-502 (2014) - [j136]Nam Ma, Yinglong Xia, Viktor K. Prasanna:
Data Parallel Implementation of Belief Propagation in Factor Graphs on Multi-core Platforms. Int. J. Parallel Program. 42(1): 219-237 (2014) - [j135]Viktor K. Prasanna, Yves Robert, Per Stenström:
Introduction to the JPDC special issue on Perspectives on Parallel and Distributed Processing. J. Parallel Distributed Comput. 74(7): 2543 (2014) - [j134]Ying-Dar Lin, Po-Ching Lin, Viktor K. Prasanna, H. Jonathan Chao, John W. Lockwood:
Guest Editorial Deep Packet Inspection: Algorithms, Hardware, and Applications. IEEE J. Sel. Areas Commun. 32(10): 1781-1783 (2014) - [j133]Charalampos Chelmis, Ajitesh Srivastava, Viktor K. Prasanna:
Computational models of technology adoption at the workplace. Soc. Netw. Anal. Min. 4(1): 199 (2014) - [j132]Shijie Zhou, Yun Rock Qu, Viktor K. Prasanna:
Multi-core implementation of decomposition-based packet classification algorithms. J. Supercomput. 69(1): 34-42 (2014) - [j131]Thilan Ganegedara, Weirong Jiang, Viktor K. Prasanna:
A Scalable and Modular Architecture for High-Performance Packet Classification. IEEE Trans. Parallel Distributed Syst. 25(5): 1135-1144 (2014) - [c375]Ajitesh Srivastava, Charalampos Chelmis, Viktor K. Prasanna:
Influence in social networks: A unified model? ASONAM 2014: 451-454 - [c374]Saima Aman, Charalampos Chelmis, Viktor K. Prasanna:
Addressing data veracity in big data applications. IEEE BigData 2014: 1-3 - [c373]Marc Frîncu, Charalampos Chelmis, Muhammad Usman Noor, Viktor K. Prasanna:
Accurate and efficient selection of the best consumption prediction method in smart grids. IEEE BigData 2014: 721-729 - [c372]Om Prasad Patri, Abhishek B. Sharma, Haifeng Chen, Guofei Jiang, Anand V. Panangadan, Viktor K. Prasanna:
Extracting discriminative shapelets from heterogeneous sensor data. IEEE BigData 2014: 1095-1104 - [c371]Alok Gautam Kumbhare, Yogesh Simmhan, Viktor K. Prasanna:
PLAStiCC: Predictive Look-Ahead Scheduling for Continuous Dataflows on Clouds. CCGRID 2014: 344-353 - [c370]Om Prasad Patri, Vikrambhai S. Sorathia, Anand V. Panangadan, Viktor K. Prasanna:
The process-oriented event model (PoEM): a conceptual model for industrial events. DEBS 2014: 154-165 - [c369]Yogesh Simmhan, Alok Gautam Kumbhare, Charith Wickramaarachchi, Soonil Nagarkar, Santosh Ravi, Cauligi S. Raghavendra, Viktor K. Prasanna:
GoFFish: A Sub-graph Centric Framework for Large-Scale Graph Analytics. Euro-Par 2014: 451-462 - [c368]Ren Chen, Viktor K. Prasanna:
Algorithmic optimizations for energy efficient throughput-oriented FFT architectures on FPGA. IGCC 2014: 1-6 - [c367]Yusong Hu, Viktor K. Prasanna:
Energy-efficient parameterized 2-D separable convolution on FPGA. IGCC 2014: 1-10 - [c366]Sanmukh R. Kuppannagari, Yusong Hu, Viktor K. Prasanna:
High level performance model based design space exploration for energy-efficient designs on FPGAs. IGCC 2014: 1-6 - [c365]Vasileios Zois, Marc Frîncu, Charalampos Chelmis, Muhammad Rizwan Saeed, Viktor K. Prasanna:
Efficient customer selection for sustainable demand response in smart grids. IGCC 2014: 1-6 - [c364]Ren Chen, Viktor K. Prasanna:
Energy optimizations for FPGA-based 2-D FFT architecture. HPEC 2014: 1-6 - [c363]Yusong Hu, Viktor K. Prasanna:
Energy- and area-efficient parameterized lifting-based 2-D DWT architecture on FPGA. HPEC 2014: 1-6 - [c362]Alok Gautam Kumbhare, Marc Frîncu, Cauligi S. Raghavendra, Viktor K. Prasanna:
Efficient extraction of high centrality vertices in distributed graphs. HPEC 2014: 1-7 - [c361]Sanmukh R. Kuppannagari, Ren Chen, Andrea Sanny, Shreyas G. Singapura, Geoffrey Phi C. Tran, Shijie Zhou, Yusong Hu, Stephen P. Crago, Viktor K. Prasanna:
Energy performance of FPGAs on PERFECT suite kernels. HPEC 2014: 1-6 - [c360]Yun Rock Qu, Viktor K. Prasanna:
Scalable and dynamically updatable lookup engine for decision-trees on FPGA. HPEC 2014: 1-6 - [c359]Andrea Sanny, Yi-Hua E. Yang, Viktor K. Prasanna:
Energy-efficient histogram equalization on FPGA. HPEC 2014: 1-6 - [c358]Charith Wickramaarachchi, Marc Frîncu, Patrick Small, Viktor K. Prasanna:
Fast parallel algorithm for unfolding of communities in large graphs. HPEC 2014: 1-6 - [c357]Shijie Zhou, Shreyas G. Singapura, Viktor K. Prasanna:
High-performance packet classification on GPU. HPEC 2014: 1-6 - [c356]Da Tong, Yun Rock Qu, Viktor K. Prasanna:
High-throughput traffic classification on multi-core processors. HPSR 2014: 138-145 - [c355]Yun Rock Qu, Shijie Zhou, Viktor K. Prasanna:
Performance modeling and optimizations for decomposition-based large-scale packet classification on multi-core processors. HPSR 2014: 154-161 - [c354]Om Prasad Patri, Anand V. Panangadan, Vikrambhai S. Sorathia, Viktor K. Prasanna:
Semantic management of Enterprise Integration Patterns: A use case in Smart Grids. ICDE Workshops 2014: 50-55 - [c353]Shijie Zhou, Weirong Jiang, Viktor K. Prasanna:
A flexible and scalable high-performance OpenFlow switch on heterogeneous SoC platforms. IPCCC 2014: 1-8 - [c352]Hsuan-Yi Chu, Yinglong Xia, Anand V. Panangadan, Viktor K. Prasanna:
Wait-Free Primitives for Initializing Bayesian Network Structure Learning on Multicore Processors. IPDPS Workshops 2014: 1602-1611 - [c351]Greg Harris, Anand V. Panangadan, Viktor K. Prasanna:
Peer review in online forums: Classifying feedback-sentiment. IRI 2014: 619-626 - [c350]Yinuo Zhang, Anand V. Panangadan, Viktor K. Prasanna:
UFOM: Unified fuzzy ontology matching. IRI 2014: 787-794 - [c349]Vaibhav R. Gandhi, Yun Rock Qu, Viktor K. Prasanna:
High-throughput hash-based online traffic classification engines on FPGA. ReConFig 2014: 1-6 - [c348]Andrea Sanny, Yi-Hua E. Yang, Viktor K. Prasanna:
Energy-efficient histogram on FPGA. ReConFig 2014: 1-6 - [c347]Shijie Zhou, Sihan Zhao, Viktor K. Prasanna:
400 Gbps energy-efficient multi-field packet classification on FPGA. ReConFig 2014: 1-6 - [c346]Yun Rock Qu, Viktor K. Prasanna:
Compact Hash Tables for High-Performance Traffic Classification on Multi-core Processors. SBAC-PAD 2014: 17-24 - [c345]Shijie Zhou, Prashant Rao Nittoor, Viktor K. Prasanna:
High-Performance Traffic Classification on GPU. SBAC-PAD 2014: 97-104 - [c344]Shijie Zhou, Weirong Jiang, Viktor K. Prasanna:
A programmable and scalable openflow switch using heterogeneous soc platforms. HotSDN 2014: 239-240 - [e22]Viktor K. Prasanna, Gordon J. Brebner, Isaac Keslassy:
Proceedings of the tenth ACM/IEEE symposium on Architectures for networking and communications systems, ANCS 2014, Los Angeles, CA, USA, October 20-21, 2014. ACM 2014, ISBN 978-1-4503-2839-5 [contents] - [i6]Saima Aman, Yogesh Simmhan, Viktor K. Prasanna:
Holistic Measures for Evaluating Prediction Models in Smart Grids. CoRR abs/1406.0223 (2014) - [i5]Yogesh Simmhan, Charith Wickramaarachchi, Alok Gautam Kumbhare, Marc Frîncu, Soonil Nagarkar, Santosh Ravi, Cauligi S. Raghavendra, Viktor K. Prasanna:
Scalable Analytics over Distributed Time-series Graphs using GoFFish. CoRR abs/1406.5975 (2014) - 2013
- [j130]Saima Aman, Yogesh Simmhan, Viktor K. Prasanna:
Energy management systems: state of the art and emerging trends. IEEE Commun. Mag. 51(1): 114-119 (2013) - [j129]Yogesh Simmhan, Saima Aman, Alok Gautam Kumbhare, Rongyang Liu, Sam Stevens, Qunzhi Zhou, Viktor K. Prasanna:
Cloud-Based Software Platform for Big Data Analytics in Smart Grids. Comput. Sci. Eng. 15(4): 38-47 (2013) - [j128]Calin Cascaval, Pedro Trancoso, Viktor K. Prasanna:
Guest Editorial: Computing Frontiers. Int. J. Parallel Program. 41(3): 355-356 (2013) - [j127]Charalampos Chelmis, Viktor K. Prasanna:
An empirical analysis of microblogging behavior in the enterprise. Soc. Netw. Anal. Min. 3(3): 611-633 (2013) - [j126]Hoang Le, Viktor K. Prasanna:
A Memory-Efficient and Modular Approach for Large-Scale String Pattern Matching. IEEE Trans. Computers 62(5): 844-857 (2013) - [j125]Weirong Jiang, Viktor K. Prasanna:
Data Structure Optimization for Power- Efficient IP Lookup Architectures. IEEE Trans. Computers 62(11): 2169-2182 (2013) - [j124]Charalampos Chelmis, Viktor K. Prasanna:
Social Link Prediction in Online Social Tagging Systems. ACM Trans. Inf. Syst. 31(4): 20:1-20:27 (2013) - [j123]Yi-Hua E. Yang, Viktor K. Prasanna:
Robust and Scalable String Pattern Matching for Deep Packet Inspection on Multicore Processors. IEEE Trans. Parallel Distributed Syst. 24(11): 2283-2292 (2013) - [j122]Thilan Ganegedara, Viktor K. Prasanna:
A comprehensive performance analysis of virtual routers on FPGA. ACM Trans. Reconfigurable Technol. Syst. 6(2): 9:1-9:21 (2013) - [j121]Na Chen, Viktor K. Prasanna:
A bag-of-semantics model for image clustering. Vis. Comput. 29(11): 1221-1229 (2013) - [c343]Yun Rock Qu, Shijie Zhou, Viktor K. Prasanna:
High-performance architecture for dynamically updatable packet classification on FPGA. ANCS 2013: 125-136 - [c342]Kiran Kumar Matam, Viktor K. Prasanna:
Algorithm Design Methodology for Embedded Architectures. ARC 2013: 231-232 - [c341]Charalampos Chelmis, Viktor K. Prasanna:
The role of organization hierarchy in technology adoption at the workplace. ASONAM 2013: 8-15 - [c340]Hao Wu, Charalampos Chelmis, Vikrambhai S. Sorathia, Yinuo Zhang, Om Prasad Patri, Viktor K. Prasanna:
Enriching employee ontology for enterprises with knowledge discovery from social networks. ASONAM 2013: 1315-1322 - [c339]Qunzhi Zhou, Yogesh Simmhan, Viktor K. Prasanna:
Towards hybrid online on-demand querying of realtime data with stateful complex event processing. IEEE BigData 2013: 199-205 - [c338]Da Tong, Lu Sun, Kiran Kumar Matam, Viktor K. Prasanna:
High throughput and programmable online trafficclassifier on FPGA. FPGA 2013: 255-264 - [c337]Swapnil Haria, Viktor K. Prasanna:
AutoMapper: an automated tool for optimal hardware resource allocation for networking applications on FPGA (abstract only). FPGA 2013: 274 - [c336]Yun Qu, Viktor K. Prasanna:
Scalable high-throughput architecture for large balanced tree structures on FPGA (abstract only). FPGA 2013: 278 - [c335]Ren Chen, Hoang Le, Viktor K. Prasanna:
Energy efficient parameterized FFT architecture. FPL 2013: 1-7 - [c334]Thilan Ganegedara, Viktor K. Prasanna:
A high-performance IPV6 lookup engine on FPGA. FPL 2013: 1-4 - [c333]Kiran Kumar Matam, Hoang Le, Viktor K. Prasanna:
Energy efficient architecture for matrix multiplication on FPGAs. FPL 2013: 1-4 - [c332]Yun Rock Qu, Viktor K. Prasanna:
Fast dynamically updatable packet classifier on FPGA. FPL 2013: 1-4 - [c331]Thilan Ganegedara, Viktor K. Prasanna:
100+ Gbps IPv6 packet forwarding on multi-core platforms. GLOBECOM 2013: 2096-2101 - [c330]Ren Chen, Neungsoo Park, Viktor K. Prasanna:
High throughput energy efficient parallel FFT architecture on FPGAs. HPEC 2013: 1-6 - [c329]Da Tong, Viktor K. Prasanna:
Dynamically configurable online statistical flow feature extractor on FPGA. HPEC 2013: 1-6 - [c328]Yi-Hua E. Yang, Yun Qu, Swapnil Haria, Viktor K. Prasanna:
Architecture and performance models for scalable IP lookup engines on FPGA. HPSR 2013: 156-163 - [c327]Charalampos Chelmis, Viktor K. Prasanna:
Exploring generative models of tripartite graphs for recommendation in social media. MSM 2013: 2:1-2:8 - [c326]Yinuo Zhang, Hao Wu, Vikrambhai S. Sorathia, Viktor K. Prasanna:
Event Recommendation in Social Networks with Linked Data Enablement. ICEIS (2) 2013: 371-379 - [c325]Yun Qu, Viktor K. Prasanna:
High-Performance Pipelined Architecture for Tree-Based IP Lookup Engine on FPGA. IPDPS Workshops 2013: 114-123 - [c324]Andrea Sanny, Thilan Ganegedara, Viktor K. Prasanna:
A Comparison of Ruleset Feature Independent Packet Classification Engines on FPGA. IPDPS Workshops 2013: 124-133 - [c323]Mark Redekopp, Yogesh Simmhan, Viktor K. Prasanna:
Optimizations and Analysis of BSP Graph Processing Models on Public Clouds. IPDPS 2013: 203-214 - [c322]Thilan Ganegedara, Viktor K. Prasanna:
Wire Speed IPv6 Forwarding on Multi-core Platforms. IPDPS Workshops 2013: 2246-2249 - [c321]Amol Bakshi, Viktor K. Prasanna, Jim Reich, Daniel Larner:
The Abstract Task Graph: A Methodology for Architecture-Independent Programming of Networked Sensor Systems. EESR 2013 - [c320]Shijie Zhou, Yun Rock Qu, Viktor K. Prasanna:
Multi-core Implementation of Decomposition-Based Packet Classification Algorithms. PaCT 2013: 105-119 - [c319]Ren Chen, Viktor K. Prasanna:
Energy-efficient architecture for stride permutation on streaming data. ReConFig 2013: 1-7 - [c318]Swapnil Haria, Viktor K. Prasanna:
Optimal mapping of multiple packet lookup schemes onto FPGA. ReConFig 2013: 1-8 - [c317]Kiran Kumar Matam, Viktor K. Prasanna:
Energy-efficient large-scale matrix multiplication on FPGAs. ReConFig 2013: 1-8 - [c316]Andrea Sanny, Viktor K. Prasanna:
Energy-efficient Median filter on FPGA. ReConFig 2013: 1-8 - [c315]Da Tong, Viktor K. Prasanna:
Online heavy hitter detector on FPGA. ReConFig 2013: 1-6 - [c314]Yun Qu, Shijie Zhou, Viktor K. Prasanna:
Scalable Many-Field Packet Classification on Multi-core Processors. SBAC-PAD 2013: 33-40 - [c313]Alok Gautam Kumbhare, Yogesh Simmhan, Viktor K. Prasanna:
Exploiting application dynamism and cloud elasticity for continuous dataflows. SC 2013: 57:1-57:12 - [i4]Shel Swenson, Yogesh Simmhan, Viktor K. Prasanna, Manish Parashar, E. Jason Riedy, David A. Bader, Richard W. Vuduc:
Sustainable Software Development for Next-Gen Sequencing (NGS) Bioinformatics on Emerging Platforms. CoRR abs/1309.1828 (2013) - [i3]Yogesh Simmhan, Alok Gautam Kumbhare, Charith Wickramaarachchi, Soonil Nagarkar, Santosh Ravi, Cauligi S. Raghavendra, Viktor K. Prasanna:
GoFFish: A Sub-Graph Centric Framework for Large-Scale Graph Analytics. CoRR abs/1311.5949 (2013) - [i2]Qunzhi Zhou, Yogesh Simmhan, Viktor K. Prasanna:
On Using Complex Event Processing for Dynamic Demand Response Optimization in Microgrid. CoRR abs/1311.6146 (2013) - 2012
- [j120]Claudia Feregrino, Miguel Arias, Kris Gaj, Viktor K. Prasanna, Marco D. Santambrogio, Ron Sass:
Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10). Int. J. Reconfigurable Comput. 2012: 319827:1-319827:2 (2012) - [j119]Na Chen, Viktor K. Prasanna:
Learning to Rank Complex Semantic Relationships. Int. J. Semantic Web Inf. Syst. 8(4): 1-19 (2012) - [j118]Yi-Hua E. Yang, Viktor K. Prasanna:
High-Performance and Compact Architecture for Regular Expression Matching on FPGA. IEEE Trans. Computers 61(7): 1013-1025 (2012) - [j117]Hoang Le, Viktor K. Prasanna:
Scalable Tree-Based Architectures for IPv4/v6 Lookup Using Prefix Partitioning. IEEE Trans. Computers 61(7): 1026-1039 (2012) - [j116]Yinglong Xia, Viktor K. Prasanna:
Distributed Evidence Propagation in Junction Trees on Clusters. IEEE Trans. Parallel Distributed Syst. 23(7): 1169-1177 (2012) - [j115]Weirong Jiang, Viktor K. Prasanna:
Scalable Packet Classification on FPGA. IEEE Trans. Very Large Scale Integr. Syst. 20(9): 1668-1680 (2012) - [c312]Alok Gautam Kumbhare, Yogesh Simmhan, Viktor K. Prasanna:
Cryptonite: A Secure and Performant Data Repository on Public Clouds. IEEE CLOUD 2012: 510-517 - [c311]Charalampos Chelmis, Viktor K. Prasanna:
Microblogging in the Enterprise: A Few Comments are in Order. ASONAM 2012: 62-70 - [c310]Charalampos Chelmis, Vikrambhai S. Sorathia, Viktor K. Prasanna:
Enterprise Wisdom Captured Socially. ASONAM 2012: 1228-1235 - [c309]Na Chen, Viktor K. Prasanna:
Semantic Image Clustering Using Object Relation Network. CVM 2012: 59-66 - [c308]Sotiris E. Nikoletseas, Dimitra Patroumpa, Viktor K. Prasanna, Christoforos L. Raptopoulos, José D. P. Rolim:
Radiation Awareness in Three-Dimensional Wireless Sensor Networks. DCOSS 2012: 176-185 - [c307]Yi-Hua E. Yang, Oguzhan Erdem, Viktor K. Prasanna:
Scalable architecture for 135 GBPS IPv6 lookup on FPGA (abstract only). FPGA 2012: 272 - [c306]Thilan Ganegedara, Viktor K. Prasanna, Gordon J. Brebner:
Optimizing packet lookup in time and space on FPGA. FPL 2012: 270-276 - [c305]Thilan Ganegedara, Viktor K. Prasanna:
StrideBV: Single chip 400G+ packet classification. HPSR 2012: 1-6 - [c304]Yun Qu, Yi-Hua E. Yang, Viktor K. Prasanna:
Large-scale multi-flow regular expression matching on FPGA. HPSR 2012: 70-75 - [c303]Oguzhan Erdem, Hoang Le, Viktor K. Prasanna:
Hierarchical hybrid search structure for high performance packet classification. INFOCOM 2012: 1898-1906 - [c302]Jing Zhao, Yogesh Simmhan, Viktor K. Prasanna:
On Presenting Apropos Provenance for Situation Awareness and Data Forensics. IPAW 2012: 250-253 - [c301]Thilan Ganegedara, Viktor K. Prasanna:
FPGA-based Router Virtualization: A Power Perspective. IPDPS Workshops 2012: 360-367 - [c300]Nam Ma, Yinglong Xia, Viktor K. Prasanna:
Task Parallel Implementation of Belief Propagation in Factor Graphs. IPDPS Workshops 2012: 1944-1953 - [c299]Na Chen, Viktor K. Prasanna:
Rankbox: An adaptive ranking system for mining complex semantic relationships using user feedback. IRI 2012: 77-84 - [c298]Qunzhi Zhou, Sreedhar Natarajan, Yogesh Simmhan, Viktor K. Prasanna:
Semantic Information Modeling for Emerging Applications in Smart Grid. ITNG 2012: 775-782 - [c297]Swapnil Haria, Thilan Ganegedara, Viktor K. Prasanna:
Power-efficient and scalable virtual router architecture on FPGA. ReConFig 2012: 1-7 - [c296]Da Tong, Yi-Hua E. Yang, Viktor K. Prasanna:
A memory efficient IPv6 lookup engine on FPGA. ReConFig 2012: 1-6 - [c295]Nam Ma, Yinglong Xia, Viktor K. Prasanna:
Parallel Exact Inference on Multicore Using MapReduce. SBAC-PAD 2012: 187-194 - [c294]Qunzhi Zhou, Yogesh Simmhan, Viktor K. Prasanna:
Incorporating Semantic Knowledge into Dynamic Data Processing for Smart Power Grids. ISWC (2) 2012: 257-273 - [c293]Charalampos Chelmis, Viktor K. Prasanna:
Predicting Communication Intention in Social Networks. SocialCom/PASSAT 2012: 184-194 - [c292]Hao Wu, Vikrambhai S. Sorathia, Viktor K. Prasanna:
Predict Whom One Will Follow: Followee Recommendation in Microblogs. SocialInformatics 2012: 260-264 - [c291]Na Chen, Qian-Yi Zhou, Viktor K. Prasanna:
Understanding web images by object relation network. WWW 2012: 291-300 - [e21]Tilman Wolf, Andrew W. Moore, Viktor K. Prasanna:
Symposium on Architecture for Networking and Communications Systems, ANCS '12, Austin, TX, USA - October 29 - 30, 2012. ACM 2012, ISBN 978-1-4503-1685-9 [contents] - [r4]Yi-Hua E. Yang, Viktor K. Prasanna:
Large-Scale Regular Expression Matching on FPGA. Handbook of Finite State Based Models and Applications 2012: 19-43 - 2011
- [j114]Jing Zhao, Viktor K. Prasanna, Karthik Gomadam:
A Semantic-Based Approach for Handling Incomplete and Inaccurate Provenance in Reservoir Engineering. Int. J. Semantic Comput. 5(4): 383-406 (2011) - [j113]Jing Zhao, Yogesh Simmhan, Karthik Gomadam, Viktor K. Prasanna:
Querying Provenance Information in Distributed Environments. Int. J. Comput. Their Appl. 18(3): 196-215 (2011) - [j112]Yinglong Xia, Viktor K. Prasanna:
Parallel evidence propagation on multicore processors. J. Supercomput. 57(2): 189-202 (2011) - [c290]Yogesh Simmhan, Alok Gautam Kumbhare, Baohua Cao, Viktor K. Prasanna:
An Analysis of Security and Privacy Issues in Smart Grid Software Architectures on Clouds. IEEE CLOUD 2011: 582-589 - [c289]Yi-Hua E. Yang, Viktor K. Prasanna:
Optimizing Regular Expression Matching with SR-NFA on Multi-Core Systems. PACT 2011: 424-433 - [c288]Viktor K. Prasanna:
Architectures for Green routers. ASAP 2011: 5 - [c287]Oguzhan Erdem, Hoang Le, Viktor K. Prasanna, Cüneyt F. Bazlamaçci:
Hybrid data structure for IP lookup in virtual routers using FPGAs. ASAP 2011: 95-102 - [c286]Daniel Zinn, Quinn J. Hart, Timothy M. McPhillips, Bertram Ludäscher, Yogesh Simmhan, Michail Giakkoupis, Viktor K. Prasanna:
Towards Reliable, Performant Workflows for Streaming-Applications on Cloud Platforms. CCGRID 2011: 235-244 - [c285]Qunzhi Zhou, Yogesh Simmhan, Viktor K. Prasanna:
Towards an inexact semantic complex event processing framework. DEBS 2011: 401-402 - [c284]Yi-Hua Edward Yang, Oguzhan Erdem, Viktor K. Prasanna:
High Performance IP Lookup on FPGA with Combined Length-Infix Pipelined Search. FCCM 2011: 77-80 - [c283]Hoang Le, Weirong Jiang, Viktor K. Prasanna:
Memory-Efficient IPv4/v6 Lookup on FPGAs Using Distance-Bounded Path Compression. FCCM 2011: 242-249 - [c282]Oguzhan Erdem, Hoang Le, Viktor K. Prasanna, Cüneyt F. Bazlamaçci:
Hybrid Data Structure for IP Lookup in Virtual Routers Using FPGAs. FCCM 2011: 253 - [c281]Hoang Le, Thilan Ganegedara, Viktor K. Prasanna:
Memory-efficient and scalable virtual routers using FPGA. FPGA 2011: 257-266 - [c280]Oguzhan Erdem, Hoang Le, Viktor K. Prasanna:
Clustered Hierarchical Search Structure for Large-Scale Packet Classification on FPGA. FPL 2011: 201-206 - [c279]Thilan Ganegedara, Hoang Le, Viktor K. Prasanna:
Towards On-the-Fly Incremental Updates for Virtualized Routers on FPGA. FPL 2011: 213-218 - [c278]Thilan Ganegedara, Weirong Jiang, Viktor K. Prasanna:
Multiroot: Towards Memory-Efficient Router Virtualization. ICC 2011: 1-5 - [c277]Saima Aman, Yogesh Simmhan, Viktor K. Prasanna:
Improving Energy Use Forecast for Campus Micro-grids Using Indirect Indicators. ICDM Workshops 2011: 389-397 - [c276]Yi-Hua E. Yang, Viktor K. Prasanna:
Space-time tradeoff in regular expression matching with semi-deterministic finite automata. INFOCOM 2011: 1853-1861 - [c275]Yaxuan Qi, Kai Wang, Jeffrey Fong, Yibo Xue, Jun Li, Weirong Jiang, Viktor K. Prasanna:
FEACAN: Front-end acceleration for content-aware network processing. INFOCOM 2011: 2114-2122 - [c274]Nam Ma, Yinglong Xia, Viktor K. Prasanna:
Exploring Weak Dependencies in DAG Scheduling. IPDPS Workshops 2011: 591-598 - [c273]Yinglong Xia, Viktor K. Prasanna:
Self-Adaptive Evidence Propagation on Manycore Processors. IPDPS Workshops 2011: 1407-1416 - [c272]Yun Qu, Yi-Hua E. Yang, Viktor K. Prasanna:
Multi-stream Regular Expression Matching on FPGA. ReConFig 2011: 86-91 - [c271]Lu Sun, Hoang Le, Viktor K. Prasanna:
Optimizing Decomposition-Based Packet Classification Implementation on FPGAs. ReConFig 2011: 170-175 - [c270]Nam Ma, Yinglong Xia, Viktor K. Prasanna:
Data Parallelism for Belief Propagation in Factor Graphs. SBAC-PAD 2011: 56-63 - [c269]Jing Zhao, Karthik Gomadam, Viktor K. Prasanna:
Predicting Missing Provenance Using Semantic Associations in Reservoir Engineering. ICSC 2011: 141-148 - [c268]Yogesh L. Simmhan, Viktor K. Prasanna, Saima Aman, Sreedhar Natarajan, Wei Yin, Qunzhi Zhou:
Toward data-driven demand-response optimization in a campus microgrid. BuildSys@SenSys 2011: 41-42 - [c267]Sushil K. Prasad, Almadena Yu. Chtchelkanova, Sajal K. Das, Frank Dehne, Mohamed G. Gouda, Anshul Gupta, Joseph F. JáJá, Krishna Kant, Anita La Salle, Richard LeBlanc, Manish Lumsdaine, David A. Padua, Manish Parashar, Viktor K. Prasanna, Yves Robert, Arnold L. Rosenberg, Sartaj Sahni, Behrooz A. Shirazi, Alan Sussman, Charles C. Weems, Jie Wu:
NSF/IEEE-TCPP curriculum initiative on parallel and distributed computing: core topics for undergraduates. SIGCSE 2011: 617-618 - [c266]Charalampos Chelmis, Viktor K. Prasanna:
Social Networking Analysis: A State of the Art and the Effect of Semantics. SocialCom/PASSAT 2011: 531-536 - [p1]Animesh Pathak, Viktor K. Prasanna:
High-Level Application Development for Sensor Networks: Data-Driven Approach. Theoretical Aspects of Distributed Computing in Sensor Networks 2011: 865-891 - [e20]Calin Cascaval, Pedro Trancoso, Viktor K. Prasanna:
Proceedings of the 8th Conference on Computing Frontiers, 2011, Ischia, Italy, May 3-5, 2011. ACM 2011, ISBN 978-1-4503-0698-0 [contents] - [i1]Weirong Jiang, Hoang Le, Viktor K. Prasanna:
Bidirectional Pipelining for Scalable IP Lookup and Packet Classification. CoRR abs/1107.5372 (2011) - 2010
- [j111]Lionel Torres, Viktor K. Prasanna:
Selected Papers from ReconFig 2009 International Conference on Reconfigurable Computing and FPGAs (ReconFig 2009). Int. J. Reconfigurable Comput. 2010: 679484:1-679484:2 (2010) - [j110]Yinglong Xia, Viktor K. Prasanna:
Parallel exact inference on the Cell Broadband Engine processor. J. Parallel Distributed Comput. 70(5): 558-572 (2010) - [j109]Yinglong Xia, Viktor K. Prasanna:
Scalable Node-Level Computation Kernels for Parallel Exact Inference. IEEE Trans. Computers 59(1): 103-115 (2010) - [j108]Animesh Pathak, Viktor K. Prasanna:
Energy-Efficient Task Mapping for Data-Driven Sensor Network Macroprogramming. IEEE Trans. Computers 59(7): 955-968 (2010) - [c265]Yinglong Xia, Viktor K. Prasanna:
Collaborative scheduling of DAG structured computations on multicore processors. Conf. Computing Frontiers 2010: 63-72 - [c264]Hoang Le, Viktor K. Prasanna:
A Memory-Efficient and Modular Approach for String Matching on FPGAs. FCCM 2010: 193-200 - [c263]Yi-Hua E. Yang, Viktor K. Prasanna:
High throughput and large capacity pipelined dynamic search tree on FPGA. FPGA 2010: 83-92 - [c262]Hoang Le, Yi-Hua E. Yang, Viktor K. Prasanna:
Memory efficient string matching: a modular approach on FPGAs (abstract only). FPGA 2010: 285 - [c261]Thilan Ganegedara, Yi-Hua E. Yang, Viktor K. Prasanna:
Automation Framework for Large-Scale Regular Expression Matching on FPGA. FPL 2010: 50-55 - [c260]Weirong Jiang, Viktor K. Prasanna, Norio Yamagaki:
Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA. FPL 2010: 394-399 - [c259]Qingbo Wang, Weirong Jiang, Yinglong Xia, Viktor K. Prasanna:
A message-passing multi-softcore architecture on FPGA for Breadth-first Search. FPT 2010: 70-77 - [c258]Yaxuan Qi, Jeffrey Fong, Weirong Jiang, Bo Xu, Jun Li, Viktor K. Prasanna:
Multi-dimensional packet classification on FPGA: 100 Gbps and beyond. FPT 2010: 241-248 - [c257]Hoang Le, Viktor K. Prasanna:
High-throughput IP-lookup supporting dynamic routing tables using FPGA. FPT 2010: 287-290 - [c256]Weirong Jiang, Viktor K. Prasanna:
Architecture-aware data structure optimization for green IP lookup. HPSR 2010: 113-118 - [c255]Hyeran Jeon, Yinglong Xia, Viktor K. Prasanna:
Parallel Exact Inference on a CPU-GPGPU Heterogenous System. ICPP 2010: 61-70 - [c254]Yi-Hua Edward Yang, Hoang Le, Viktor K. Prasanna:
High Performance Dictionary-Based String Matching for Deep Packet Inspection. INFOCOM 2010: 86-90 - [c253]Thilan Ganegedara, Weirong Jiang, Viktor K. Prasanna:
FRuG: A benchmark for packet forwarding in future networks. IPCCC 2010: 231-238 - [c252]Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasanna:
Scalable multi-pipeline architecture for high performance multi-pattern string matching. IPDPS 2010: 1-12 - [c251]Viktor K. Prasanna:
Message from steering co-chairs. IPDPS 2010: 1 - [c250]Yi-Hua E. Yang, Viktor K. Prasanna, Chenqian Jiang:
Head-body partitioned string matching for Deep Packet Inspection with scalable and attack-resilient performance. IPDPS 2010: 1-11 - [c249]Qunzhi Zhou, Viktor K. Prasanna:
Workflow management of simulation based computation processes in transportation domain. IRI 2010: 19-24 - [c248]Fan Sun, Jing Zhao, Karthik Gomadam, Viktor K. Prasanna:
Provenance Collection in Reservoir Management Workflow Environments. ITNG 2010: 82-87 - [c247]Tao Zhu, Amol Bakshi, Viktor K. Prasanna, Karthik Gomadam:
Applying Semantic Web Techniques to Reservoir Engineering: Challenges and Experiences from Event Modeling. ITNG 2010: 586-591 - [c246]Yinglong Xia, Viktor K. Prasanna, James Li:
Hierarchical Scheduling of DAG Structured Computations on Manycore Processors with Dynamic Thread Grouping. JSSPP 2010: 154-174 - [c245]Yinglong Xia, Viktor K. Prasanna:
Distributed Evidence Propagation in Junction Trees. SBAC-PAD 2010: 143-150 - [c244]Jing Zhao, Na Chen, Karthik Gomadam, Viktor K. Prasanna:
Integrating Provenance Information in Reservoir Engineering. Web Intelligence 2010: 46-49 - [e19]Viktor K. Prasanna, Jürgen Becker, René Cumplido:
ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 13-15 December 2010, Proceedings. IEEE Computer Society 2010 [contents]
2000 – 2009
- 2009
- [j107]Yi-Hua Edward Yang, Viktor K. Prasanna:
Software Toolchain for Large-Scale RE-NFA Construction on FPGA. Int. J. Reconfigurable Comput. 2009: 301512:1-301512:10 (2009) - [j106]Weirong Jiang, Viktor K. Prasanna:
Sequence-preserving parallel IP lookup using multiple SRAM-based pipelines. J. Parallel Distributed Comput. 69(9): 778-789 (2009) - [c243]Weirong Jiang, Viktor K. Prasanna:
A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification. ASAP 2009: 24-31 - [c242]Viktor K. Prasanna:
Algorithm Design for Reconfigurable Computing Systems. ERSA 2009: 3 - [c241]Qingbo Wang, Viktor K. Prasanna:
Multi-Core Architecture on FPGA for Large Dictionary String Matching. FCCM 2009: 96-103 - [c240]Yi-Hua Edward Yang, Viktor K. Prasanna:
Memory-Efficient Pipelined Architecture for Large-Scale String Matching. FCCM 2009: 104-111 - [c239]Hoang Le, Viktor K. Prasanna:
Scalable High Throughput and Power Efficient IP-Lookup on FPGA. FCCM 2009: 167-174 - [c238]Weirong Jiang, Viktor K. Prasanna:
Large-scale wire-speed packet classification on FPGAs. FPGA 2009: 219-228 - [c237]Weirong Jiang, Viktor K. Prasanna:
Energy-Efficient Multi-Pipeline Architecture for Terabit Packet Classification. GLOBECOM 2009: 1-6 - [c236]Weirong Jiang, Viktor K. Prasanna:
Scalable Packet Classification: Cutting or Merging? ICCCN 2009: 1-6 - [c235]Weirong Jiang, Viktor K. Prasanna:
Reducing dynamic power dissipation in pipelined forwarding engines. ICCD 2009: 144-149 - [c234]Sudhir Vinjamuri, Viktor K. Prasanna:
Transitive closure on the cell broadband engine: A study on self-scheduling in a multicore processor. IPDPS 2009: 1-11 - [c233]Sudhir Vinjamuri, Viktor K. Prasanna:
Hierarchical Dependency Graphs: Abstraction and Methodology for Mapping Systolic Array Designs to Multicore Processors. PaCT 2009: 284-298 - [c232]Yinglong Xia, Xiaojun Feng, Viktor K. Prasanna:
Parallel Evidence Propagation on Multicore Processors. PaCT 2009: 377-391 - [c231]Weirong Jiang, Viktor K. Prasanna:
Field-split parallel architecture for high performance multi-match packet classification using FPGAs. SPAA 2009: 188-196 - [e18]Yuanyuan Yang, Manish Parashar, Rajeev Muralidhar, Viktor K. Prasanna:
16th International Conference on High Performance Computing, HiPC 2009, December 16-19, 2009, Kochi, India, Proceedings. IEEE Computer Society 2009, ISBN 978-1-4244-4922-4 [contents] - [e17]Viktor K. Prasanna, Lionel Torres, René Cumplido:
ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, Proceedings. IEEE Computer Society 2009, ISBN 978-0-7695-3917-1 [contents] - 2008
- [b2]Amol B. Bakshi, Viktor K. Prasanna:
Architecture-Independent Programming for Wireless Sensor Networks. Wiley 2008, ISBN 978-0-471-77889-9, pp. I-XV, 1-187 - [j105]Gerald R. Morris, Viktor K. Prasanna:
A pipelined-loop-compatible architecture and algorithm to reduce variable-length sets of floating-point data on a reconfigurable computer. J. Parallel Distributed Comput. 68(7): 913-921 (2008) - [j104]Ling Zhuo, Viktor K. Prasanna:
High-Performance Designs for Linear Algebra Operations on Reconfigurable Hardware. IEEE Trans. Computers 57(8): 1057-1071 (2008) - [j103]Ling Zhuo, Viktor K. Prasanna:
Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems. IEEE Trans. Computers 57(12): 1661-1675 (2008) - [j102]Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna:
Data Gathering with Tunable Compression in Sensor Networks. IEEE Trans. Parallel Distributed Syst. 19(2): 276-287 (2008) - [j101]Ronald Scrofano, Maya B. Gokhale, Frans Trouw, Viktor K. Prasanna:
Accelerating Molecular Dynamics Simulations with Reconfigurable Computers. IEEE Trans. Parallel Distributed Syst. 19(6): 764-778 (2008) - [j100]Jingzhao Ou, Viktor K. Prasanna:
A Cooperative Management Scheme for Power Efficient Implementations of Real-Time Operating Systems on Soft Processors. IEEE Trans. Very Large Scale Integr. Syst. 16(1): 45-56 (2008) - [j99]Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna:
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores. IEEE Trans. Very Large Scale Integr. Syst. 16(2): 167-176 (2008) - [c230]Ramakrishna Soma, Viktor K. Prasanna:
A Data Partitioning Approach for Parallelizing Rule Based Inferencing for Materialized OWL Knowledge Bases. PDCCS 2008: 19-25 - [c229]Yi-Hua E. Yang, Weirong Jiang, Viktor K. Prasanna:
Compact architecture for high-throughput regular expression matching on FPGA. ANCS 2008: 30-39 - [c228]Weirong Jiang, Viktor K. Prasanna:
Multi-terabit ip lookup using parallel bidirectional pipelines. Conf. Computing Frontiers 2008: 241-250 - [c227]Animesh Pathak, Viktor K. Prasanna:
Energy-Efficient Task Mapping for Data-Driven Sensor Network Macroprogramming. DCOSS 2008: 516-524 - [c226]Hoang Le, Weirong Jiang, Viktor K. Prasanna:
A SRAM-based Architecture for Trie-based IP Lookup Using FPGA. FCCM 2008: 33-42 - [c225]Ling Zhuo, Qingbo Wang, Viktor K. Prasanna:
Matrix Computations on Heterogeneous Reconfigurable Systems. FCCM 2008: 310-311 - [c224]Hoang Le, Weirong Jiang, Viktor K. Prasanna:
Scalable high-throughput SRAM-based architecture for IP-lookup using FPGA. FPL 2008: 137-142 - [c223]Weirong Jiang, Viktor K. Prasanna:
Multi-Way Pipelining for Power-Efficient IP Lookup. GLOBECOM 2008: 2339-2343 - [c222]Ramakrishna Soma, Viktor K. Prasanna:
Parallel Inferencing for OWL Knowledge Bases. ICPP 2008: 75-82 - [c221]Weirong Jiang, Qingbo Wang, Viktor K. Prasanna:
Beyond TCAMs: An SRAM-Based Parallel Multi-Pipeline Architecture for Terabit IP Lookup. INFOCOM 2008: 1786-1794 - [c220]Weirong Jiang, Viktor K. Prasanna:
Towards Green Routers: Depth-Bounded Multi-Pipeline Architecture for Power-Efficient IP Lookup. IPCCC 2008: 185-192 - [c219]David A. Bader, Viktor K. Prasanna:
DOSA: design optimizer for scientific applications. IPDPS 2008: 1-5 - [c218]Weirong Jiang, Viktor K. Prasanna:
Parallel IP lookup using multiple SRAM-based pipelines. IPDPS 2008: 1-14 - [c217]Yinglong Xia, Viktor K. Prasanna:
Junction tree decomposition for parallel exact inference. IPDPS 2008: 1-12 - [c216]Qunzhi Zhou, Amol Bakshi, Viktor K. Prasanna, Ramakrishna Soma:
Towards an integrated modeling and simulation framework for freight transportation in metropolitan areas. IRI 2008: 280-285 - [c215]Fan Sun, Viktor K. Prasanna, Amol Bakshi, Laurent Pianelo:
Workflow instance detection: Toward a knowledge capture methodology for smart oilfields. IRI 2008: 363-369 - [c214]Cong Zhang, Amol Bakshi, Viktor K. Prasanna:
Data component based management of reservoir simulation models. IRI 2008: 386-392 - [c213]Ramakrishna Soma, Viktor K. Prasanna:
Detecting Dirty Queries during Iterative Development of OWL Based Applications. OTM Conferences (2) 2008: 1500-1516 - [c212]Yi-Hua E. Yang, Viktor K. Prasanna:
Automatic Construction of Large-Scale Regular Expression Matching Engines on FPGA. ReConFig 2008: 73-78 - [c211]Yinglong Xia, Viktor K. Prasanna:
Parallel exact inference on the cell broadband engine processor. SC 2008: 58 - [e16]P. Sadayappan, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna:
High Performance Computing - HiPC 2008, 15th International Conference, Bangalore, India, December 17-20, 2008. Proceedings. Lecture Notes in Computer Science 5374, Springer 2008, ISBN 978-3-540-89893-1 [contents] - [e15]Edson Norberto Cácares, Walfredo Cirne, Viktor K. Prasanna:
20th International Symposium on Computer Architecture and High Performance Computing, SBAC-PAD 2008, October 29 - November 1, 2008, Campo Grande, MS, Brazil. IEEE Computer Society 2008, ISBN 978-0-7695-3423-7 [contents] - 2007
- [j98]Gerald R. Morris, Viktor K. Prasanna:
Sparse Matrix Computations on Reconfigurable Hardware. Computer 40(3): 58-64 (2007) - [j97]Xiaorong Li, Bharadwaj Veeravalli, Viktor K. Prasanna:
A window-assisted video partitioning strategy for partitioning and caching video streams in distributed multimedia systems. J. Parallel Distributed Comput. 67(6): 738-754 (2007) - [j96]Bharadwaj Veeravalli, Chaoyang Chen, Viktor K. Prasanna:
Fault-tolerant analysis for multiple servers movie retrieval strategy for distributed multimedia applications. Multim. Tools Appl. 32(1): 1-27 (2007) - [j95]Sumit Mohanty, Viktor K. Prasanna:
A model-based extensible framework for efficient application design using FPGA. ACM Trans. Design Autom. Electr. Syst. 12(2): 13 (2007) - [j94]Ling Zhuo, Viktor K. Prasanna:
Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on Reconfigurable Computing Systems. IEEE Trans. Parallel Distributed Syst. 18(4): 433-448 (2007) - [j93]Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna:
High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAs. IEEE Trans. Parallel Distributed Syst. 18(10): 1377-1392 (2007) - [j92]Bo Hong, Viktor K. Prasanna:
Adaptive Allocation of Independent Tasks to Maximize Throughput. IEEE Trans. Parallel Distributed Syst. 18(10): 1420-1435 (2007) - [c210]Ramakrishna Soma, Amol Bakshi, Viktor K. Prasanna:
An Architecture of a Workflow System for Integrated Asset Management in the Smart Oil Field Domain. IEEE SCW 2007: 191-198 - [c209]Ramakrishna Soma, Amol Bakshi, Viktor K. Prasanna:
A Semantic Framework for Integrated Asset Management in Smart Oilfields. CCGRID 2007: 119-126 - [c208]Animesh Pathak, Luca Mottola, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco:
A Compilation Framework for Macroprogramming Networked Sensors. DCOSS 2007: 189-204 - [c207]Viktor K. Prasanna:
Scientific Computing using Reconfigurable Hardware. ERSA 2007: 13 - [c206]Weirong Jiang, Viktor K. Prasanna:
A Memory-Balanced Linear Pipeline Architecture for Trie-based IP Lookup. Hot Interconnects 2007: 83-90 - [c205]David A. Bader, Viktor K. Prasanna:
DOSA: Design Optimizer for Scientific Applications. IPDPS 2007: 1-6 - [c204]Ling Zhuo, Viktor K. Prasanna:
Hardware/Software Co-Design for Matrix Computations on Reconfigurable Computing Systems. IPDPS 2007: 1-10 - [c203]Cong Zhang, Amol Bakshi, Viktor K. Prasanna:
ModelML: a Markup Language for Automatic Model Synthesis. IRI 2007: 317-322 - [c202]Luca Mottola, Animesh Pathak, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco:
Enabling Scope-Based Interactions in Sensor Network Macroprogramming. MASS 2007: 1-9 - [c201]Yinglong Xia, Viktor K. Prasanna:
Parallel Exact Inference. PARCO 2007: 185-192 - [c200]Ling Zhuo, Viktor K. Prasanna:
Optimizing Matrix Multiplication on Heterogeneous Reconfigurable Systems. PARCO 2007: 561-568 - [c199]Animesh Pathak, Luca Mottola, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco:
Expressing Sensor Network Interaction Patterns Using Data-Driven Macroprogramming. PerCom Workshops 2007: 255-260 - [c198]Yinglong Xia, Viktor K. Prasanna:
Node Level Primitives for Parallel Exact Inference. SBAC-PAD 2007: 221-228 - [e14]Srinivas Aluru, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna:
High Performance Computing - HiPC 2007, 14th International Conference, Goa, India, December 18-21, 2007, Proceedings. Lecture Notes in Computer Science 4873, Springer 2007, ISBN 978-3-540-77219-4 [contents] - [e13]Hai Jin, Omer F. Rana, Yi Pan, Viktor K. Prasanna:
Algorithms and Architectures for Parallel Processing, 7th International Conference, ICA3PP 2007, Hangzhou, China, June 11-14, 2007, Proceedings. Lecture Notes in Computer Science 4494, Springer 2007, ISBN 978-3-540-72904-4 [contents] - [r3]Viktor K. Prasanna, Ronald Scrofano:
A Hierarchical Performance Model for Reconfigurable Computers. Handbook of Parallel Computing 2007 - 2006
- [b1]Yang Yu, Viktor K. Prasanna, Bhaskar Krishnamachari:
Information Processing and Routing in Wireless Sensor Networks. World Scientific 2006, ISBN 978-981-270-146-6, pp. I-XV, 1-185 - [j91]Jong-Kook Kim, Debra A. Hensgen, Taylor Kidd, Howard Jay Siegel, David St. John, Cynthia E. Irvine, Timothy E. Levin, N. Wayne Porter, Viktor K. Prasanna, Richard F. Freund:
A flexible multi-dimensional QoS performance measure framework for distributed heterogeneous systems. Clust. Comput. 9(3): 281-296 (2006) - [j90]Michael Penner, Viktor K. Prasanna:
Cache-Friendly implementations of transitive closure. ACM J. Exp. Algorithmics 11 (2006) - [j89]Bo Hong, Viktor K. Prasanna:
Maximum lifetime data sensing and extraction in energy constrained networked sensor systems. J. Parallel Distributed Comput. 66(4): 566-577 (2006) - [j88]Viktor K. Prasanna, Fabrizio Lombardi:
Editors' Note. IEEE Trans. Computers 55(1): 1 (2006) - [j87]Viktor K. Prasanna:
Editor's Note. IEEE Trans. Computers 55(3): 241-242 (2006) - [j86]Viktor K. Prasanna:
Introducting the New Editor-in-Chief of the IEEE Transactions on Computers. IEEE Trans. Computers 55(12): 1489-1490 (2006) - [j85]Zachary K. Baker, Viktor K. Prasanna:
Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs. IEEE Trans. Dependable Secur. Comput. 3(4): 289-300 (2006) - [j84]Jingzhao Ou, Viktor K. Prasanna:
Design space exploration using arithmetic-level hardware--software cosimulation for configurable multiprocessor platforms. ACM Trans. Embed. Comput. Syst. 5(2): 355-382 (2006) - [j83]Yang Yu, Viktor K. Prasanna, Bhaskar Krishnamachari:
Energy Minimization for Real-Time Data Gathering in Wireless Sensor Networks. IEEE Trans. Wirel. Commun. 5(11): 3087-3096 (2006) - [c197]Gerald R. Morris, Viktor K. Prasanna, Richard D. Anderson:
An FPGA-Based Application-Specific Processor for Efficient Reduction of Multiple Variable-Length Floating-Point Data Sets. ASAP 2006: 323-330 - [c196]Manbir Singh, Aditya Kwatra, Chi-Wah Wong, Viktor K. Prasanna:
Acceleration of Fiber Tracking in DTI Tractography by Reconfigurable Computer Hardware. EMBC 2006: 4819-4822 - [c195]Jeoong Sung Park, Hong-Jip Jung, Viktor K. Prasanna:
Efficient FPGA-based Implementations of the MIMO-OFDM Physical Layer. ERSA 2006: 153-163 - [c194]Gerald R. Morris, Viktor K. Prasanna, Richard D. Anderson:
A Hybrid Approach for Mapping Conjugate Gradient onto an FPGA-Augmented Reconfigurable Supercomputer. FCCM 2006: 3-12 - [c193]Ronald Scrofano, Maya B. Gokhale, Frans Trouw, Viktor K. Prasanna:
Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers. FCCM 2006: 23-34 - [c192]Zachary K. Baker, Viktor K. Prasanna:
An Architecture for Efficient Hardware Data Mining using Reconfigurable Computing Systems. FCCM 2006: 67-75 - [c191]Ronald Scrofano, Viktor K. Prasanna:
A Performance model for accelerating scientific applications on reconfigurable computers. FPGA 2006: 234 - [c190]Zachary K. Baker, Viktor K. Prasanna, Hong-Jip Jung:
Regular Expression Software Deceleration for Intrusion Detection Systems. FPL 2006: 1-8 - [c189]Ling Zhuo, Viktor K. Prasanna:
High-Performance and Parameterized Matrix Factorization on FPGAs. FPL 2006: 1-6 - [c188]Ling Zhuo, Viktor K. Prasanna:
Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing Systems. ICPADS (1) 2006: 87-95 - [c187]Vasanth Krishna Namasivayam, Viktor K. Prasanna:
Scalable Parallel Implementation of Exact Inference in Bayesian Networks. ICPADS (1) 2006: 143-150 - [c186]Mitali Singh, Viktor K. Prasanna:
Energy-Efficient and Fault-Tolerant Resolution of Topographic Queries in Networked Sensor Systems. ICPADS (1) 2006: 271-280 - [c185]Ramakrishna Soma, Amol Bakshi, Viktor K. Prasanna, Will Da Sie:
A Model-Based Framework for Developing and Deploying Data Aggregation Services. ICSOC 2006: 227-239 - [c184]Animesh Pathak, Viktor K. Prasanna:
Issues in designing a compilation framework for macroprogrammed networked sensor systems. InterSense 2006: 7 - [c183]Hong-Jip Jung, Zachary K. Baker, Viktor K. Prasanna:
Performance of FPGA implementation of bit-split architecture for intrusion detection systems. IPDPS 2006 - [c182]Kwatra Kwatra, Viktor K. Prasanna, Mitali Singh:
Accelerating DTI tractography using FPGAs. IPDPS 2006 - [c181]Cong Zhang, Amol Bakshi, Viktor K. Prasanna, Will Da Sie:
Towards a model-based application integration framework for smart oilfields. IRI 2006: 545-550 - [c180]Vasanth Krishna Namasivayam, Animesh Pathak, Viktor K. Prasanna:
Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference. SBAC-PAD 2006: 167-176 - [c179]Ronald Scrofano, Viktor K. Prasanna:
Molecular dynamics - Preliminary investigation of advanced electrostatics in molecular dynamics on reconfigurable computers. SC 2006: 90 - [e12]Yves Robert, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna:
High Performance Computing - HiPC 2006, 13th International Conference, Bangalore, India, December 18-21, 2006, Proceedings. Lecture Notes in Computer Science 4297, Springer 2006, ISBN 3-540-68039-X [contents] - 2005
- [j82]Bo Hong, Viktor K. Prasanna:
Maximum Data Gathering in Networked Sensor Systems. Int. J. Distributed Sens. Networks 1(1): 57-80 (2005) - [j81]Jingzhao Ou, Seonil B. Choi, Viktor K. Prasanna:
Energy-efficient hardware/software co-synthesis for a class of applications on reconfigurable SoCs. Int. J. Embed. Syst. 1(1/2): 91-102 (2005) - [j80]Jingzhao Ou, Viktor K. Prasanna:
Arithmetic-Level Instruction Based Energy Estimation for FPGA based Soft Processors. J. Low Power Electron. 1(2): 161-171 (2005) - [j79]Sethavidh Gertphol, Viktor K. Prasanna:
MIP formulation for robust resource allocation in dynamic real-time systems. J. Syst. Softw. 77(1): 55-65 (2005) - [j78]Yang Yu, Viktor K. Prasanna:
Energy-Balanced Task Allocation for Collaborative Processing in Wireless Sensor Networks. Mob. Networks Appl. 10(1-2): 115-131 (2005) - [j77]Yang Yu, Bo Hong, Viktor K. Prasanna:
On communication models for algorithm design in networked sensor systems: A case study, . Pervasive Mob. Comput. 1(1): 95-121 (2005) - [j76]Viktor K. Prasanna, Fabrizio Lombardi:
Editor's Note. IEEE Trans. Computers 54(2): 97- (2005) - [j75]Viktor K. Prasanna:
Editor's Note. IEEE Trans. Computers 54(7): 785-787 (2005) - [j74]Viktor K. Prasanna:
Energy-Efficient Computations on FPGAs. J. Supercomput. 32(2): 139-162 (2005) - [j73]Zachary K. Baker, Viktor K. Prasanna:
A computationally efficient engine for flexible intrusion detection. IEEE Trans. Very Large Scale Integr. Syst. 13(10): 1179-1189 (2005) - [j72]Ju-wook Jang, Seonil B. Choi, Viktor K. Prasanna:
Energy- and time-efficient matrix multiplication on FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 13(11): 1305-1319 (2005) - [j71]Andreas Dandalis, Viktor K. Prasanna:
Configuration compression for FPGA-based embedded systems. IEEE Trans. Very Large Scale Integr. Syst. 13(12): 1394-1398 (2005) - [c178]Zachary K. Baker, Viktor K. Prasanna:
High-throughput linked-pattern matching for intrusion detection systems. ANCS 2005: 193-202 - [c177]Amol Bakshi, Animesh Pathak, Viktor K. Prasanna:
System-level Support for Macroprogramming of Networked Sensing Applications. PSC 2005: 3-11 - [c176]Viktor K. Prasanna:
High Performance Computing using Reconfigurable Hardware. ENC 2005 - [c175]Jingzhao Ou, Viktor K. Prasanna:
Rapid Arithmetic Level Simulation Based Energy Estimation for Hardware/Software Co-Design Using FPGAs. ERSA 2005: 55-61 - [c174]Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna:
Area-Efficient Evaluation of a Class of Arithmetic Expressions Using Deeply Pipelined Floating-Point Cores. ERSA 2005: 119-128 - [c173]Ronald Scrofano, Gokul Govindu, Viktor K. Prasanna:
A Library of Parameterizable Floating-Point Cores for FPGAs and Their Application to Scientific Computing. ERSA 2005: 137-148 - [c172]Zachary K. Baker, Viktor K. Prasanna:
Efficient Hardware Data Mining with the Apriori Algorithm on FPGAs. FCCM 2005: 3-12 - [c171]Jingzhao Ou, Viktor K. Prasanna:
COMA: A COoperative MAnagement Scheme for Energy Efficient Implementation of Real-Time Operating Systems on FPGA Based Soft Processors. FCCM 2005: 139-148 - [c170]Gerald R. Morris, Ling Zhuo, Viktor K. Prasanna:
High-Performance FPGA-Based General Reduction Methods. FCCM 2005: 323-324 - [c169]Ling Zhuo, Viktor K. Prasanna:
Sparse Matrix-Vector multiplication on FPGAs. FPGA 2005: 63-74 - [c168]Jingzhao Ou, Viktor K. Prasanna:
Time and energy efficient Viterbi decoding using FPGAs. ICASSP (5) 2005: 33-36 - [c167]Ling Zhuo, Viktor K. Prasanna:
Design Tradeoffs for BLAS Operations on Reconfigurable Hardware. ICPP 2005: 78-86 - [c166]Jingzhao Ou, Viktor K. Prasanna:
MATLAB/Simulink Based Hardware/Software Co-Simulation for Designing Using FPGA Configured Soft Processors. IPDPS 2005 - [c165]Yang Yu, Viktor K. Prasanna, Bo Hong:
Communication Models for Algorithm Design in Networked Sensor Systems. IPDPS 2005 - [c164]Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna:
Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores. IPDPS 2005 - [c163]Cong Zhang, Viktor K. Prasanna, Abdollah Orangi, Will Da Sie, Aditya Kwatra:
Modeling methodology for application development in petroleum industry. IRI 2005: 445-451 - [c162]Gerald R. Morris, Viktor K. Prasanna:
An FPGA-Based Floating-Point Jacobi Iterative Solver. ISPAN 2005: 420-427 - [c161]Amol Bakshi, Viktor K. Prasanna:
Programming Paradigms for Networked Sensing: A Distributed Systems' Perspective. IWDC 2005: 451-462 - [c160]Mitali Singh, Viktor K. Prasanna:
Supporting Topographic Queries in a Class of Networked Sensor Systems. PerCom Workshops 2005: 362-368 - [c159]Ling Zhuo, Viktor K. Prasanna:
High-Performance and Area-Efficient Reduction Circuits on FPGAs. SBAC-PAD 2005: 52-59 - [c158]Ling Zhuo, Viktor K. Prasanna:
High Performance Linear Algebra Operations on Reconfigurable Systems. SC 2005: 2 - [e11]Viktor K. Prasanna, S. Sitharama Iyengar, Paul G. Spirakis, Matt Welsh:
Distributed Computing in Sensor Systems, First IEEE International Conference, DCOSS 2005, Marina del Rey, CA, USA, June 30 - July 1, 2005, Proceedings. Lecture Notes in Computer Science 3560, Springer 2005, ISBN 3-540-26422-1 [contents] - [e10]David A. Bader, Manish Parashar, Sridhar Varadarajan, Viktor K. Prasanna:
High Performance Computing - HiPC 2005, 12th International Conference, Goa, India, December 18-21, 2005, Proceedings. Lecture Notes in Computer Science 3769, Springer 2005, ISBN 3-540-30936-5 [contents] - [r2]Mitali Singh, Viktor K. Prasanna:
Distributed Collaborative Computation in Wireless Sensor Systems. Handbook of Algorithms for Wireless Networking and Mobile Computing 2005 - [r1]Yang Yu, Viktor K. Prasanna:
Cross-Layer Optimization for Energy-Efficient Information Processing and Routing. Handbook of Algorithms for Wireless Networking and Mobile Computing 2005 - 2004
- [j70]Mitali Singh, Viktor K. Prasanna:
A Hierarchical Model For Distributed Collaborative Computation In Wireless Sensor Networks. Int. J. Found. Comput. Sci. 15(3): 485-506 (2004) - [j69]Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna:
Issues in Designing Middleware for Wireless Sensor Networks. IEEE Netw. 18(1): 15-21 (2004) - [j68]Andreas Dandalis, Viktor K. Prasanna:
An adaptive cryptographic engine for internet protocol security architectures. ACM Trans. Design Autom. Electr. Syst. 9(3): 333-353 (2004) - [j67]Joon-Sang Park, Michael Penner, Viktor K. Prasanna:
Optimizing Graph Algorithms for Improved Cache Performance. IEEE Trans. Parallel Distributed Syst. 15(9): 769-782 (2004) - [j66]Neungsoo Park, Viktor K. Prasanna:
Dynamic data layouts for cache-conscious implementation of a class of signal transforms. IEEE Trans. Signal Process. 52(7): 2120-2134 (2004) - [c157]Viktor K. Prasanna:
Algorithm Design and Optimization for Sensor Systems: (Invited Talk). ALGOSENSORS 2004: 1-2 - [c156]Bo Hong, Viktor K. Prasanna:
Constrained Flow Optimization with Applications to Data Gathering in Sensor Networks. ALGOSENSORS 2004: 187-200 - [c155]Bo Hong, Viktor K. Prasanna:
Performance Optimization of a De-centralized Task Allocation Protocol via Bandwidth and Buffer Management. CLADE 2004: 108 - [c154]Viktor K. Prasanna:
Invited Paper: Energy-Efficient Computations on FPGAs. ERSA 2004: 264-275 - [c153]Gokul Govindu, Viktor K. Prasanna, Vikash Daga, Sridhar Gangadharpalli, V. Sridhar:
Efficient Floating-point Based Block LU Decomposition on FPGAs. ERSA 2004: 276-279 - [c152]Jingzhao Ou, Viktor K. Prasanna:
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs. ERSA 2004: 280-283 - [c151]Ronald Scrofano, Viktor K. Prasanna:
Computing Lennard-Jones Potentials and Forces with Reconfigurable Hardware. ERSA 2004: 284-292 - [c150]Ling Zhuo, Viktor K. Prasanna:
Energy Performance of Floating-Point Matrix Multiplication on FPGAs. ERSA 2004: 316 - [c149]Amol Bakshi, Viktor K. Prasanna:
Structured Communication in Single Hop Sensor Networks. EWSN 2004: 138-153 - [c148]Jingzhao Ou, Viktor K. Prasanna:
PyGen: A MATLAB/Simulink Based Tool for Synthesizing Parameterized and Energy Efficient Designs Using FPGAs. FCCM 2004: 47-56 - [c147]Zachary K. Baker, Viktor K. Prasanna:
A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs. FCCM 2004: 135-144 - [c146]Sumit Mohanty, Viktor K. Prasanna:
Duty Cycle Aware Application Design using FPGAs. FCCM 2004: 338-339 - [c145]Zachary K. Baker, Viktor K. Prasanna:
Time and area efficient pattern matching on FPGAs. FPGA 2004: 223-232 - [c144]Zachary K. Baker, Viktor K. Prasanna:
Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs. FPL 2004: 311-321 - [c143]Sumit Mohanty, Viktor K. Prasanna:
A Framework for Energy Efficient Design of Multi-rate Applications Using Hybrid Reconfigurable Systems. FPL 2004: 658-668 - [c142]Jingzhao Ou, Viktor K. Prasanna:
A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms. FPL 2004: 729-739 - [c141]Jingzhao Ou, Viktor K. Prasanna:
Parameterized and energy efficient adaptive beamforming on FPGAs using MATLAB/Simulink. ICASSP (5) 2004: 181-184 - [c140]Amol Bakshi, Viktor K. Prasanna:
Energy-Efficient Communication in Multi-Channel Single-Hop Sensor Networks. ICPADS 2004: 403-410 - [c139]Amol Bakshi, Viktor K. Prasanna:
Algorithm Design and Synthesis for Wireless Sensor Networks. ICPP 2004: 423-430 - [c138]Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna:
Energy-Latency Tradeoffs for Data Gathering in Wireless Sensor Networks. INFOCOM 2004 - [c137]Sethavidh Gertphol, Viktor K. Prasanna:
Iterative Integer Programming Formuation for Robust Resource Allocation in Dynamic Real-Time Systems. IPDPS 2004 - [c136]Gokul Govindu, Seonil Choi, Viktor K. Prasanna, Vikash Daga, Sridhar Gangadharpalli, V. Sridhar:
A High-Performance and Energy-Efficient Architecture for Floating-Point Based LU Decomposition on FPGAs. IPDPS 2004 - [c135]Gokul Govindu, Ling Zhuo, Seonil Choi, Viktor K. Prasanna:
Analysis of High-Performance Floating-Point Arithmetic on FPGAs. IPDPS 2004 - [c134]Bo Hong, Viktor K. Prasanna:
Distributed Adaptive Task Allocation in Heterogeneous Computing Environments to Maximize Throughput. IPDPS 2004 - [c133]Ling Zhuo, Viktor K. Prasanna:
Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on FPGAs. IPDPS 2004 - [c132]Caimu Tang, Cauligi S. Raghavendra, Viktor K. Prasanna:
Power aware coding for spatio-temporally correlated wireless sensor data. MASS 2004: 134-143 - [c131]Bo Hong, Viktor K. Prasanna:
Optimizing a class of in-network processing applications in networked sensor systems. MASS 2004: 154-163 - [c130]Jingzhao Ou, Viktor K. Prasanna:
Rapid energy estimation of computations on FPGA based soft processors. SoCC 2004: 285-288 - [e9]Luc Bougé, Viktor K. Prasanna:
High Performance Computing - HiPC 2004, 11th International Conference, Bangalore, India, December 19-22, 2004, Proceedings. Lecture Notes in Computer Science 3296, Springer 2004, ISBN 3-540-24129-9 [contents] - 2003
- [j65]Yang Yu, Viktor K. Prasanna:
Resource Allocation for Independent Real-Time Tasks in Heterogeneous Systems for Energy Minimization. J. Inf. Sci. Eng. 19(3): 433-449 (2003) - [j64]Prashanth B. Bhat, Cauligi S. Raghavendra, Viktor K. Prasanna:
Efficient collective communication in distributed heterogeneous systems. J. Parallel Distributed Comput. 63(3): 251-263 (2003) - [j63]Viktor K. Prasanna:
Editor's Note. IEEE Trans. Computers 52(1): 3 (2003) - [j62]Viktor K. Prasanna:
Editor's Note. IEEE Trans. Computers 52(3): 257-259 (2003) - [j61]Viktor K. Prasanna:
Editor's Note. IEEE Trans. Computers 52(7): 833-834 (2003) - [j60]Viktor K. Prasanna:
Editor's Note. IEEE Trans. Computers 52(11): 1377-1378 (2003) - [j59]Seonil Choi, Ju-wook Jang, Sumit Mohanty, Viktor K. Prasanna:
Domain-Specific Modeling for Rapid Energy Estimation of Reconfigurable Architectures. J. Supercomput. 26(3): 259-281 (2003) - [j58]Neungsoo Park, Bo Hong, Viktor K. Prasanna:
Tiling, Block Data Layout, and Memory Hierarchy Performance. IEEE Trans. Parallel Distributed Syst. 14(7): 640-654 (2003) - [c129]Sumit Mohanty, Viktor K. Prasanna:
A hierarchical approach for energy efficient application design using heterogeneous embedded systems. CASES 2003: 243-254 - [c128]Ronald Scrofano, Ju-wook Jang, Viktor K. Prasanna:
Energy-Efficient Discrete Cosine Transform on FPGAs. Engineering of Reconfigurable Systems and Algorithms 2003: 215-221 - [c127]Jingzhao Ou, Seonil Choi, Viktor K. Prasanna:
Performance Modeling of Reconfigurable SoC Architectures and Energy-Efficient Mapping of a Class of Applications. FCCM 2003: 241-250 - [c126]Sumit Mohanty, Jingzhao Ou, Viktor K. Prasanna:
An Estimation and Simulation Framework for Energy Efficient Design using Platform FPGAs. FCCM 2003: 290-291 - [c125]Seonil Choi, Ronald Scrofano, Viktor K. Prasanna, Ju-wook Jang:
Energy-efficient signal processing using FPGAs. FPGA 2003: 225-234 - [c124]Sumit Mohanty, Viktor K. Prasanna:
An Algorithm Designer's Workbench for Platform FPGA's. FPL 2003: 41-50 - [c123]Seonil Choi, Viktor K. Prasanna:
Time and Energy Efficient Matrix Factorization Using FPGAs. FPL 2003: 507-519 - [c122]Yang Yu, Viktor K. Prasanna:
Energy-balanced multi-hop packet transmission in wireless sensor networks. GLOBECOM 2003: 480-486 - [c121]Seonil Choi, Gokul Govindu, Ju-wook Jang, Viktor K. Prasanna:
Energy-efficient and parameterized designs for fast Fourier transform on FPGAs. ICASSP (2) 2003: 521-524 - [c120]Caimu Tang, Cauligi S. Raghavendra, Viktor K. Prasanna:
An energy efficient adaptive distributed source coding scheme in wireless sensor networks. ICC 2003: 732-737 - [c119]Bo Hong, Viktor K. Prasanna:
Bandwidth-Aware Resource Allocation for Heterogeneous Computing Systems to Maximize Throughput. ICPP 2003: 539-546 - [c118]Mitali Singh, Viktor K. Prasanna, José D. P. Rolim, Cauligi S. Raghavendra:
Collaborative and Distributed Computation in Mesh-Like Wireless Sensor Arrays. PWC 2003: 1-11 - [c117]Sethavidh Gertphol, Viktor K. Prasanna:
MIP Formulation for Robust Resource Allocation in Dynamic Real-Time Systems. IPDPS 2003: 117 - [c116]Mitali Singh, Viktor K. Prasanna:
A Hierarchical Model for Distributed Collaborative Computation in Wireless Sensor Networks. IPDPS 2003: 166 - [c115]Akis Spyropoulos, Cauligi S. Raghavendra, Viktor K. Prasanna:
A Distributed Algorithm for Waking-up in Heterogeneous Sensor Networks. IPSN 2003: 609-624 - [c114]Yang Yu, Viktor K. Prasanna:
Energy-balanced task allocation for collaborative processing in networked embedded systems. LCTES 2003: 265-274 - [c113]Amol Bakshi, Viktor K. Prasanna:
Energy Balanced Communication in Wireless Sensor Networks. MWCN 2003 - [c112]Mitali Singh, Viktor K. Prasanna:
Energy-Optimal and Energy-Balanced Sorting in a Single-Hop Wireless Sensor Network. PerCom 2003: 50-59 - [c111]Claude Tadonki, Mitali Singh, José D. P. Rolim, Viktor K. Prasanna:
Combinatorial Techniques for Memory Power State Scheduling in Energy-Constrained Systems. WAOA 2003: 265-268 - [c110]Mitali Singh, Viktor K. Prasanna:
Algorithmic Techniques for Memory Energy Reduction. WEA 2003: 237-252 - [e8]Timothy Mark Pinkston, Viktor K. Prasanna:
High Performance Computing - HiPC 2003, 10th International Conference, Hyderabad, India, December 17-20, 2003, Proceedings. Lecture Notes in Computer Science 2913, Springer 2003, ISBN 3-540-20626-4 [contents] - 2002
- [j57]Wenheng Liu, Cho-Li Wang, Viktor K. Prasanna:
Portable and Scalable Algorithm for Irregular All-to-All Communication. J. Parallel Distributed Comput. 62(10): 1493-1526 (2002) - [j56]Kiran Bondalapati, Viktor K. Prasanna:
Reconfigurable computing systems. Proc. IEEE 90(7): 1201-1217 (2002) - [j55]Shoukat Ali, Jong-Kook Kim, Yang Yu, Shriram B. Gundala, Sethavidh Gertphol, Howard Jay Siegel, Anthony A. Maciejewski, Viktor K. Prasanna:
Utilization-Based Techniques for Statically Mapping Heterogeneous Applications onto the HiPer-D Heterogeneous Computing System. Parallel Distributed Comput. Pract. 5(4) (2002) - [j54]Jinwoo Suh, Viktor K. Prasanna:
An Efficient Algorithm for Out-of-Core Matrix Transposition. IEEE Trans. Computers 51(4): 420-438 (2002) - [j53]Andreas Dandalis, Viktor K. Prasanna:
Run-time performance optimization of an FPGA-based deduction engine for SAT solvers. ACM Trans. Design Autom. Electr. Syst. 7(4): 547-562 (2002) - [c109]Sumit Mohanty, Seonil Choi, Ju-wook Jang, Viktor K. Prasanna:
A Model-Based Methodology for Application Specific Energy Efficient Data Path Design Using FPGAs. ASAP 2002: 76-87 - [c108]Amol Bakshi, Jingzhao Ou, Viktor K. Prasanna:
Towards automatic synthesis of a class of application-specific sensor networks. CASES 2002: 50-58 - [c107]Zachary K. Baker, Viktor K. Prasanna:
Performance Modeling and Interpretive Simulation of PIM Architectures and Applications (Research Note). Euro-Par 2002: 157-161 - [c106]Ju-wook Jang, Seonil Choi, Viktor K. Prasanna:
Energy-Efficient Matrix Multiplication on FPGAs. FPL 2002: 534-544 - [c105]Reetinder P. S. Sidhu, Viktor K. Prasanna:
Efficient Metacomputation Using Self-Reconfiguration. FPL 2002: 698-709 - [c104]Ju-wook Jang, Seonil Choi, Viktor K. Prasanna:
Area and time efficient implementations of matrix multiplication on FPGAs. FPT 2002: 93-100 - [c103]Ronald Scrofano, Seonil Choi, Viktor K. Prasanna:
Energy efficiency of FPGAs and programmable processors for matrix multiplication. FPT 2002: 422-425 - [c102]Bo Hong, Viktor K. Prasanna:
Adaptive Matrix Multiplication in Heterogeneous Environments. ICPADS 2002: 129- - [c101]Yang Yu, Viktor K. Prasanna:
Power-Aware Resource Allocation for Independent Tasks in Heterogeneous Real-Time Systems. ICPADS 2002: 341-348 - [c100]Neungsoo Park, Bo Hong, Viktor K. Prasanna:
Analysis of Memory Hierarchy Performance of Block Data Layout. ICPP 2002: 35-46 - [c99]Shoukat Ali, Jong-Kook Kim, Yang Yu, Shriram B. Gundala, Sethavidh Gertphol, Howard Jay Siegel, Anthony A. Maciejewski, Viktor K. Prasanna:
Utilization-Based Heuristics for Statically Mapping Real-Time Applications onto the HiPer-D Heterogeneous Computing System. IPDPS 2002 - [c98]Sethavidh Gertphol, Yang Yu, Shriram B. Gundala, Viktor K. Prasanna, Shoukat Ali, Jong-Kook Kim, Anthony A. Maciejewski, Howard Jay Siegel:
A Metric and Mixed-Integer-Programming-Based Approach for Resource Allocation in Dynamic Real-Time Systems. IPDPS 2002 - [c97]Joon-Sang Park, Michael Penner, Viktor K. Prasanna:
Optimizing Graph Algorithms for Improved Cache Performance. IPDPS 2002 - [c96]Caimu Tang, Cauligi S. Raghavendra, Viktor K. Prasanna:
Energy Efficient Adaptation of Multicast Protocols in Power Controlled Wireless Ad Hoc Networks. ISPAN 2002: 91- - [c95]Sumit Mohanty, Viktor K. Prasanna, Sandeep Neema, James R. Davis:
Rapid design space exploration of heterogeneous embedded systems using symbolic search and multi-granular simulation. LCTES-SCOPES 2002: 18-27 - [c94]Shoukat Ali, Jong-Kook Kim, Howard Jay Siegel, Anthony A. Maciejewski, Yang Yu, Shriram B. Gundala, Sethavidh Gertphol, Viktor K. Prasanna:
Greedy Heuristics for Resource Allocation in Dynamic Distributed Real-Time Heterogeneous Computing Systems. PDPTA 2002: 519-530 - [e7]Sartaj Sahni, Viktor K. Prasanna, Uday Shukla:
High Performance Computing - HiPC 2002, 9th International Conference, Bangalore, India, December 18-21, 2002, Proceedings. Lecture Notes in Computer Science 2552, Springer 2002, ISBN 3-540-00303-7 [contents] - 2001
- [j52]Myungho Lee, Wenheng Liu, Viktor K. Prasanna:
Parallel Implementation of a Class of Adaptive Signal Processing Applications. Algorithmica 30(4): 645-684 (2001) - [c93]Michael Penner, Viktor K. Prasanna:
Cache-Friendly Implementations of Transitive Closure. IEEE PACT 2001: 185-196 - [c92]Reetinder P. S. Sidhu, Viktor K. Prasanna:
Fast Regular Expression Matching Using FPGAs. FCCM 2001: 227-238 - [c91]Andreas Dandalis, Viktor K. Prasanna:
Configuration compression for FPGA-based embedded systems. FPGA 2001: 173-182 - [c90]Andreas Dandalis, Viktor K. Prasanna, Bharani Thiruvengadam:
Run-Time Performance Optimization of an FPGA-Based Deduction Engine for SAT Solvers. FPL 2001: 315-325 - [c89]Neungsoo Park, Viktor K. Prasanna:
Cache conscious Walsh-Hadamard transform. ICASSP 2001: 1205-1208 - [c88]Jong-Kook Kim, Taylor Kidd, Howard Jay Siegel, Cynthia E. Irvine, Timothy E. Levin, Debra A. Hensgen, David St. John, Viktor K. Prasanna, Richard F. Freund, N. Wayne Porter:
Collective Value of QoS: A Performance Measure Framework for Distributed Heterogeneous Networks. IPDPS 2001: 84 - [c87]Ammar H. Alhusaini, Cauligi S. Raghavendra, Viktor K. Prasanna:
Run-Time Adaptation for Grid Environments. IPDPS 2001: 87 - [c86]Sethavidh Gertphol, Yang Yu, Ammar H. Alhusaini, Viktor K. Prasanna:
An integer programming approach for static mapping onto heterogeneous real-time systems. IPDPS 2001: 95 - [c85]Amol Bakshi, Viktor K. Prasanna, Ákos Lédeczi:
MILAN: A Model Based Integrated Simulation Framework for Desgin of Embedded Suystems. LCTES/OM 2001: 82-87 - [c84]Amol Bakshi, Viktor K. Prasanna, Ákos Lédeczi:
MILAN: A Model Based Integrated Simulation Framework for Design of Embedded Systems. OM@PLDI 2001: 82-93 - [e6]Burkhard Monien, Viktor K. Prasanna, Sriram Vajapeyam:
High Performance Computing - HiPC 2001, 8th International Conference, Hyderabad, India, December, 17-20, 2001, Proceedings. Lecture Notes in Computer Science 2228, Springer 2001, ISBN 3-540-43009-1 [contents] - 2000
- [j51]Prashanth B. Bhat, Viktor K. Prasanna, Cauligi S. Raghavendra:
Block-cyclic redistribution over heterogeneous networks. Clust. Comput. 3(1): 25-34 (2000) - [c83]Andreas Dandalis, Viktor K. Prasanna, José D. P. Rolim:
A Comparative Study of Performance of AES Final Candidates Using FPGAs. CHES 2000: 125-140 - [c82]Andreas Dandalis, Viktor K. Prasanna, José D. P. Rolim:
An Adaptive Cryptographic Engine for IPSec Architectures. FCCM 2000: 132-144 - [c81]Reetinder P. S. Sidhu, Sameer Wadhwa, Alessandro Mei, Viktor K. Prasanna:
A Self-Reconfigurable Gate Array Architecture. FPL 2000: 106-120 - [c80]Ammar H. Alhusaini, Viktor K. Prasanna, Cauligi S. Raghavendra:
A Framework for Mapping with Resource Co-Allocation in Heterogeneous Computing Systems. Heterogeneous Computing Workshop 2000: 273-286 - [c79]Jinwoo Suh, Viktor K. Prasanna:
An Efficient Algorithm for Large-Scale Matrix Transposition. ICPP 2000: 327-334 - [c78]Yongwha Chung, K. Park, W. Hahn, Neungsoo Park, Viktor K. Prasanna:
Performance of On-Chip Multiprocessors for Vision Tasks. IPDPS Workshops 2000: 242-249 - [c77]Neungsoo Park, Dongsoo Kang, Kiran Bondalapati, Viktor K. Prasanna:
Dynamic Data Layouts for Cache-Conscious Factorization of DFT. IPDPS 2000: 693-702 - [c76]Hossam A. ElGindy, Viktor K. Prasanna, Hartmut Schmeck, Oliver Diessel:
Configurable Architectures Workshop (RAW 2000). IPDPS Workshops 2000: 870-872 - [c75]Kiran Bondalapati, Viktor K. Prasanna:
Loop Pipelining and Optimization for Run Time Reconfiguration. IPDPS Workshops 2000: 906-915 - [c74]Viktor K. Prasanna, Cauligi S. Raghavendra:
Heterogeneous Computing Workshop (HCW 2000). IPDPS Workshops 2000: 1301-1306 - [c73]Jong-Kook Kim, Debra A. Hensgen, Taylor Kidd, Howard Jay Siegel, David St. John, Cynthia E. Irvine, Timothy E. Levin, N. Wayne Porter, Viktor K. Prasanna, Richard F. Freund:
A QoS performance measure framework for distributed heterogeneous networks. PDP 2000: 18-27 - [e5]Mateo Valero, Viktor K. Prasanna, Sriram Vajapeyam:
High Performance Computing - HiPC 2000, 7th International Conference, Bangalore, India, December 17-20, 2000, Proceedings. Lecture Notes in Computer Science 1970, Springer 2000, ISBN 3-540-41429-0 [contents]
1990 – 1999
- 1999
- [j50]Young Won Lim, Prashanth B. Bhat, Viktor K. Prasanna:
Efficient Algorithms for Block-Cyclic Redistribution of Arrays. Algorithmica 24(3-4): 298-330 (1999) - [j49]Prashanth B. Bhat, Viktor K. Prasanna, Cauligi S. Raghavendra:
Adaptive Communication Algorithms for Distributed Heterogeneous Systems. J. Parallel Distributed Comput. 59(2): 252-279 (1999) - [j48]Neungsoo Park, Viktor K. Prasanna, Cauligi S. Raghavendra:
Efficient Algorithms for Block-Cyclic Array Redistribution Between Processor Sets. IEEE Trans. Parallel Distributed Syst. 10(12): 1217-1240 (1999) - [c72]Kiran Bondalapati, Viktor K. Prasanna:
Dynamic Precision Management for Loop Computations on Reconfigurable Architectures. FCCM 1999: 249- - [c71]Reetinder P. S. Sidhu, Alessandro Mei, Viktor K. Prasanna:
String Natching on Nulticontext FPGAs Using Self-Reconfiguration. FPGA 1999: 217-226 - [c70]Kiran Bondalapati, Viktor K. Prasanna:
DRIVE: An Interpretive Simulation and Visualization Environment for Dynamically Reconfigurable Systems. FPL 1999: 31-40 - [c69]Reetinder P. S. Sidhu, Alessandro Mei, Viktor K. Prasanna:
Genetic Programming Using Self-Reconfigurable FPGAs. FPL 1999: 301-312 - [c68]Ammar H. Alhusaini, Viktor K. Prasanna, Cauligi S. Raghavendra:
A Unified Resource Scheduling Framework for Heterogeneous Computing Environments. Heterogeneous Computing Workshop 1999: 156- - [c67]Debra A. Hensgen, Taylor Kidd, David St. John, Matthew C. Schnaidt, Howard Jay Siegel, Tracy D. Braun, Muthucumaru Maheswaran, Shoukat Ali, Jong-Kook Kim, Cynthia E. Irvine, Timothy E. Levin, Richard F. Freund, Matt Kussow, Michael W. Godfrey, Alpay Duman, Paul Carff, Shirley Kidd, Viktor K. Prasanna, Prashanth B. Bhat, Ammar H. Alhusaini:
An Overview of MSHN: The Management System for Heterogeneous Networks. Heterogeneous Computing Workshop 1999: 184-198 - [c66]Prashanth B. Bhat, Cauligi S. Raghavendra, Viktor K. Prasanna:
Efficient Collective Communication in Distributed Heterogeneous Systems. ICDCS 1999: 15-24 - [c65]Andreas Dandalis, Alessandro Mei, Viktor K. Prasanna:
Domain Specific Mapping for Solving Graph Problems on Reconfigurable Devices. IPPS/SPDP Workshops 1999: 652-660 - [c64]Kiran Bondalapati, Viktor K. Prasanna:
Hardware Object Selection for Mapping Loops onto Reconfigurable Architectures. PDPTA 1999: 1104-1110 - [e4]Prithviraj Banerjee, Viktor K. Prasanna, Bhabani P. Sinha:
High Performance Computing - HiPC'99, 6th International Conference, Calcutta, India, December 17-20, 1999, Proceedings. Lecture Notes in Computer Science 1745, Springer 1999, ISBN 3-540-66907-8 [contents] - [e3]José D. P. Rolim, Frank Mueller, Albert Y. Zomaya, Fikret Erçal, Stephan Olariu, Binoy Ravindran, Jan Gustafsson, Hiroaki Takada, Ronald A. Olsson, Laxmikant V. Kalé, Peter H. Beckman, Matthew Haines, Hossam A. ElGindy, Denis Caromel, Serge Chaumette, Geoffrey C. Fox, Yi Pan, Keqin Li, Tao Yang, G. Ghiola, Gianni Conte, Luigi V. Mancini, Dominique Méry, Beverly A. Sanders, Devesh Bhatt, Viktor K. Prasanna:
Parallel and Distributed Processing, 11 IPPS/SPDP'99 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing, San Juan, Puerto Rico, USA, April 12-16, 1999, Proceedings. Lecture Notes in Computer Science 1586, Springer 1999, ISBN 3-540-65831-9 [contents] - 1998
- [j47]Yongwha Chung, Cho-Li Wang, Viktor K. Prasanna:
Parallel Algorithms for Perceptual Grouping on Distributed Memory Machines. J. Parallel Distributed Comput. 50(1/2): 123-143 (1998) - [j46]Yongwha Chung, Viktor K. Prasanna:
Parallelizing Image Feature Extraction on Coarse-Grain Machines. IEEE Trans. Pattern Anal. Mach. Intell. 20(12): 1389-1394 (1998) - [j45]Wenheng Liu, Viktor K. Prasanna:
Utilizing the power of high-performance computing. IEEE Signal Process. Mag. 15(5): 85-100 (1998) - [j44]Jongwoo Bae, Viktor K. Prasanna:
Synthesis of area-efficient and high-throughput rate data format converters. IEEE Trans. Very Large Scale Integr. Syst. 6(4): 697-706 (1998) - [c63]Andreas Dandalis, Viktor K. Prasanna:
Mapping Homogeneous Computations onto Dynamically Configurable Coarse-Grained Architectures. FCCM 1998: 314-315 - [c62]Kiran Bondalapati, Viktor K. Prasanna:
Mapping Loops onto Reconfigurable Architectures. FPL 1998: 268-277 - [c61]Andreas Dandalis, Viktor K. Prasanna:
Space-efficient Mapping of 2D-DCT onto Dynamically Configurable Coarse-Grained Architectures. FPL 1998: 471-475 - [c60]Prashanth B. Bhat, Viktor K. Prasanna, Cauligi S. Raghavendra:
Adaptive Communication Algorithms for Distributed Heterogeneous Systems. HPDC 1998: 310-321 - [c59]Myungho Lee, Wenheng Liu, Viktor K. Prasanna:
A Mapping Methodology for Designing Software Task Pipelines for Embedded Signal Processing. IPPS/SPDP Workshops 1998: 937-944 - [c58]Jinwoo Suh, Viktor K. Prasanna:
Portable Implementation of Real-Time Signal Processing Benchmarks on HPC Platforms. PARA 1998: 527-536 - [c57]Neungsoo Park, Viktor K. Prasanna, Cauligi S. Raghavendra:
Efficient Algorithms for Block-Cyclic Array Redistribution between Processor Sets. SC 1998: 10 - 1997
- [j43]William H. Mangione-Smith, Brad Hutchins, David L. Andrews, André DeHon, Carl Ebeling, Reiner W. Hartenstein, Oskar Mencer, John Morris, Krishna V. Palem, Viktor K. Prasanna, Henk A. E. Spaanenburg:
Seeking Solutions in Configurable Computing. Computer 30(12): 38-43 (1997) - [j42]Ju-wook Jang, Madhusudan Nigam, Viktor K. Prasanna, Sartaj Sahni:
Constant Time Algorithms for Computational Geometry on the Reconfigurable Mesh. IEEE Trans. Parallel Distributed Syst. 8(1): 1-12 (1997) - [j41]Ju-wook Jang, Heonchul Park, Viktor K. Prasanna:
An Optimal Multiplication Algorithm on Reconfigurable Mesh. IEEE Trans. Parallel Distributed Syst. 8(5): 521-532 (1997) - [c56]Andreas Dandalis, Viktor K. Prasanna:
Fast parallel implementation of DFT using configurable devices. FPL 1997: 314-323 - [c55]Seonil Choi, Viktor K. Prasanna, Yongwha Chung:
Configurable Hardware for Symbolic Search Operations. ICPADS 1997: 122-131 - [c54]Young Won Lim, Neungsoo Park, Viktor K. Prasanna:
Efficient Algorithms for Multi-dimensional Block-Cyclic Redistribution of Arrays. ICPP 1997: 234-241 - 1996
- [j40]Cho-Li Wang, Prashanth B. Bhat, Viktor K. Prasanna:
High-performance computing for vision. Proc. IEEE 84(7): 931-946 (1996) - [c53]Yongwha Chung, Viktor K. Prasanna:
An Asynchronous Parallel Algorithm for Symbolic Grouping Operations in Vision. Euro-Par, Vol. II 1996: 123-130 - [c52]Seonil Choi, Jongwoo Bae, Viktor K. Prasanna:
Synthesis of memory-based VLSI architectures for discrete wavelet transforms. EUSIPCO 1996: 1-4 - [c51]Yongwha Chung, Jongwook Woo, Ramakant Nevatia, Viktor K. Prasanna:
Load balancing strategies for symbolic vision computations. HiPC 1996: 263-269 - [c50]W. H. Liu, Cho-Li Wang, Viktor K. Prasanna:
Portable Message Passing Algorithms for Irregular All-to-all Communication. ICDCS 1996: 428-435 - [c49]Neungsoo Park, Jongwoo Bae, Viktor K. Prasanna:
Synthesis of VLSI architectures for tree-structured image coding. ICIP (2) 1996: 999-1002 - [c48]Young Won Lim, Prashanth B. Bhat, Viktor K. Prasanna:
Efficient algorithms for block-cyclic redistribution of arrays. SPDP 1996: 74-83 - 1995
- [j39]Ju-wook Jang, Viktor K. Prasanna:
An Optimal Sorting Algorithm on Reconfigurable Mesh. J. Parallel Distributed Comput. 25(1): 31-41 (1995) - [j38]Cho-Chin Lin, Viktor K. Prasanna:
Bounds on the Diameter of One-Dimensional PEC Networks. J. Parallel Distributed Comput. 29(1): 1-16 (1995) - [j37]Ju-wook Jang, Heonchul Park, Viktor K. Prasanna:
A Fast Algorithm for Computing a Histogram on Reconfigurable Mesh. IEEE Trans. Pattern Anal. Mach. Intell. 17(2): 97-106 (1995) - [c47]Jongwoo Bae, Viktor K. Prasanna:
Synthesis of VLSI Architectures for Two-Dimensional Discrete Wavelet Transforms. ASAP 1995: 174- - [c46]Jongwoo Bae, Viktor K. Prasanna:
A fast and area-efficient VLSI architecture for embedded image coding. ICIP (3) 1995: 452-455 - [c45]Prashanth B. Bhat, Young Won Lim, Viktor K. Prasanna:
Issues in using heterogeneous HPC systems for embedded real time signal processing applications. RTCSA 1995: 134-141 - 1994
- [j36]Hussein M. Alnuweiri, Viktor K. Prasanna:
Efficient Parallel Computation on the Reduced Mesh of Tress Organization. J. Parallel Distributed Comput. 20(2): 121-135 (1994) - [j35]Cho-Li Wang, Viktor K. Prasanna, Hyoung Joong Kim, Ashfaq A. Khokhar:
Scalable Data Parallel Implementations of Object Recognition Using Geometric Hashing. J. Parallel Distributed Comput. 21(1): 96-109 (1994) - [c44]Jongwoo Bae, Viktor K. Prasanna, Heonchul Park:
Synthesis of a class of data format converters with specified delays. ASAP 1994: 283-294 - [c43]Ashfaq A. Khokhar, Viktor K. Prasanna, Cho-Li Wang:
Scalable Data Parallel Implementations of Object Recognition on Connection Machine CM-. HICSS (2) 1994: 130-139 - [c42]Jongwoo Bae, Viktor K. Prasanna:
A General Framework for Synthesis of Data Format Converters. ICPP (2) 1994: 197-200 - [c41]Viktor K. Prasanna, Cho-Li Wang:
Scalable parallel implementations of perceptual grouping on connection machine CM-5. ICPR (3) 1994: 229-233 - [c40]Heonchul Park, Viktor K. Prasanna:
A Fast Algorithm for Performing Vector Quantization and its VLSI Implementation. VLSI Design 1994: 91-94 - 1993
- [j34]Ashfaq A. Khokhar, Viktor K. Prasanna, Muhammad E. Shaaban, Cho-Li Wang:
Heterogeneous Computing: Challenges and Opportunities. Computer 26(6): 18-27 (1993) - [j33]Heonchul Park, Hyoung Joong Kim, Viktor K. Prasanna:
An O(1) Time Optimal Algorithm for Multiplying Matrices on Reconfigurable Mesh. Inf. Process. Lett. 47(2): 109-113 (1993) - [j32]Manavendra Misra, David Nassimi, Viktor K. Prasanna:
Efficient VLSI Implementation of Iterative Solutions to Sparse Linear Systems. Parallel Comput. 19(5): 525-544 (1993) - [j31]Russ Miller, Viktor K. Prasanna, Dionisios I. Reisis, Quentin F. Stout:
Parallel Computations on Reconfigurable Meshes. IEEE Trans. Computers 42(6): 678-692 (1993) - [j30]Heonchul Park, Viktor K. Prasanna:
Modular VLSI architectures for real-time full-search-based vector quantization. IEEE Trans. Circuits Syst. Video Technol. 3(4): 309-317 (1993) - [j29]Kichul Kim, Viktor K. Prasanna:
Latin Squares for Parallel Array Access. IEEE Trans. Parallel Distributed Syst. 4(4): 361-370 (1993) - [j28]Heonchul Park, Viktor K. Prasanna:
Modular VLSI architectures for computing the arithmetic Fourier transform. IEEE Trans. Signal Process. 41(6): 2236-2246 (1993) - [c39]Ashfaq A. Khokhar, Viktor K. Prasanna, Hyoung Joong Kim:
Scalable geometric hashing on MasPar machines. CVPR 1993: 594-595 - [c38]Heonchul Park, Viktor K. Prasanna:
Area efficient VLSI architectures for Huffman coding. ICASSP (1) 1993: 437-440 - [c37]Heonchul Park, Viktor K. Prasanna, Ju-wook Jang:
Fast Arithmetic on Reconfigurable Meshes. ICPP (3) 1993: 236-243 - 1992
- [j27]Katherine Heinrich, Kichul Kim, Viktor K. Prasanna:
Perfect Latin Squares. Discret. Appl. Math. 37/38: 281-286 (1992) - [j26]Hussein M. Alnuweiri, Viktor K. Prasanna:
Parallel Architectures and Algorithms for Image Component Labeling. IEEE Trans. Pattern Anal. Mach. Intell. 14(10): 1014-1034 (1992) - [j25]Viktor K. Prasanna, Anil S. Rao:
Parallel orientation of polygonal parts. IEEE Trans. Robotics Autom. 8(5): 678-687 (1992) - [j24]K. Wojtek Przytula, Viktor K. Prasanna, Wei-Ming Lin:
Parallel implementation of neural networks. J. VLSI Signal Process. 4(2-3): 111-123 (1992) - [c36]Heonchul Park, Viktor K. Prasanna, Cho-Li Wang:
An architecture for tree search based vector quantization for single chip implementation. ASAP 1992: 385-399 - [c35]Heonchul Park, Viktor K. Prasanna:
A Class of Optimal VLSI Architectures for Computing Discrete Fourier Transform. ICPP (3) 1992: 61-68 - [c34]Viktor K. Prasanna, Anil S. Rao:
Parallel Orientation of Polygonal Parts. ICPP (3) 1992: 115-122 - [c33]Hussein M. Alnuweiri, Viktor K. Prasanna:
Optimal Multipass Self-Routing Algorithms for Clos-Type Multistage Networks. ICPP (1) 1992: 118-122 - [c32]Ju-wook Jang, Viktor K. Prasanna:
Efficient Parallel Algorithms for Some Geometric Problems on Reconfigurable Mesh. ICPP (3) 1992: 127-130 - [c31]Pani N. Chakrapani, Ashfaq A. Khokhar, Viktor K. Prasanna:
Parallel stereo on fixed size arrays using zero crossings. ICPR (4) 1992: 79-82 - [c30]Manavendra Misra, Viktor K. Prasanna:
Parallel computation of 2-D wavelet transforms. ICPR (4) 1992: 111-114 - [c29]Ju-wook Jang, Viktor K. Prasanna:
An Optimal Sorting Algorithm on Reconfigurable Mesh. IPPS 1992: 130-137 - [c28]Cho-Chin Lin, Viktor K. Prasanna:
A Tight Bound on the Diameter of One-Dimensional PEC Networks. SPDP 1992: 368-375 - [c27]Ju-wook Jang, Heonchul Park, Viktor K. Prasanna:
An Optimal Multiplication Algorithm for Reconfigurable Mesh. SPDP 1992: 384-391 - [e2]Viktor K. Prasanna, Larry H. Canter:
Proceedings of the 6th International Parallel Processing Symposium, Beverly Hills, CA, USA, March 1992. IEEE Computer Society 1992, ISBN 0-8186-2672-0 [contents] - 1991
- [j23]Hussein M. Alnuweiri, Viktor K. Prasanna:
Processor-Time Optimal Parallel Algorithms for Digitized Images on Mesh-Connected Processor Arrays. Algorithmica 6(5): 698-733 (1991) - [j22]Kai Hwang, Hussein M. Alnuweiri, V. K. Prasanna Kumar, Dongseung Kim:
Orthogonal multiprocessor sharing memory with an enhanced mesh for integrated image understanding. CVGIP Image Underst. 53(1): 31-45 (1991) - [j21]Hussein M. Alnuweiri, Viktor K. Prasanna:
Optimal Geometric Algorithms for Digitized Images on Fixed-Size Linear Arrays and Scan-Line Arrays. Distributed Comput. 5: 55-65 (1991) - [j20]Viktor K. Prasanna:
Special Issue on Massively Parallel Computation. J. Parallel Distributed Comput. 13(2): 123 (1991) - [j19]Hussein M. Alnuweiri, Viktor K. Prasanna:
Fast Image Labeling Using Local Operators on Mesh-Connected Computers. IEEE Trans. Pattern Anal. Mach. Intell. 13(2): 202-207 (1991) - [j18]Hussein M. Alnuweiri, Viktor K. Prasanna:
Optimal VLSI Sorting with Reduced Number of Processors. IEEE Trans. Computers 40(1): 105-110 (1991) - [j17]Viktor K. Prasanna, Yu-Chen Tsai:
On Synthesizing Optimal Family of Linear Systolic Arrays for Matrix Multiplication. IEEE Trans. Computers 40(6): 770-774 (1991) - [j16]Wei-Ming Lin, Viktor K. Prasanna, K. Wojtek Przytula:
Algorithmic Mapping of Neural Network Models onto Parallel SIMD Machines. IEEE Trans. Computers 40(12): 1390-1401 (1991) - [c26]Wei-Ming Lin, Viktor K. Prasanna:
Parallel implementations of discrete relaxation technique on fixed size processor arrays. ASAP 1991: 184-198 - [c25]Wei-Ming Lin, V. K. Prasanna Kumar:
Parallel algorithms and architectures for discrete relaxation technique. CVPR 1991: 514-519 - [c24]Heonchul Park, V. K. Prasanna Kumar:
VLSI architectures for computing the arithmetic Fourier transform. ICASSP 1991: 1029-1032 - [c23]Kichul Kim, Viktor K. Prasanna:
An Iterative Sparse Linear System Solver on Star Graphs. ICPP (3) 1991: 9-16 - [e1]V. K. Prasanna Kumar:
The Fifth International Parallel Processing Symposium, Proceedings, Anaheim, California, USA, April 30 - May 2, 1991. IEEE Computer Society 1991, ISBN 0-8186-9167-0 [contents] - 1990
- [j15]Milind Mahajan, Viktor K. Prasanna:
Efficient parallel implementation of RETE pattern matching. Comput. Syst. Sci. Eng. 5(3): 187-192 (1990) - [j14]Wei-Ming Lin, Viktor K. Prasanna:
Efficient Histogramming on Hypercube SIMD Machines. Comput. Vis. Graph. Image Process. 49(1): 104-120 (1990) - [j13]Wei-Ming Lin, Viktor K. Prasanna:
A Note on the Linear Transformation Method for Systolic Array Design. IEEE Trans. Computers 39(3): 393-399 (1990) - [j12]V. K. Prasanna Kumar, Yu-Chen Tsai:
Mapping dynamic programming onto a linear systolic array. J. VLSI Signal Process. 1(4): 335-343 (1990) - [c22]V. K. Prasanna Kumar, K. Wojtek Przytula:
Algorithmic mapping of neural network models onto parallel SIMD machines. ASAP 1990: 259-271 - [c21]Kichul Kim, Viktor K. Prasanna:
An Efficient Mapping of Directed Graph Based Computations onto SIMD Hypercube Arrays and Applications. ICPP (2) 1990: 296-297 - [c20]Manavendra Misra, V. K. Prasanna Kumar:
Massive memory organizations for implementing neural networks. ICPR (2) 1990: 259-264 - [c19]Hussein M. Alnuweiri, V. K. Prasanna Kumar:
Optimal image algorithms on an orthogonally-connected memory-based architecture. ICPR (2) 1990: 350-355 - [c18]Hussein M. Alnuweiri, Viktor K. Prasanna:
Parallel Convexity Algorithms for Digitized Images on a Linear Array of Processors. SIGAL International Symposium on Algorithms 1990: 397-406
1980 – 1989
- 1989
- [j11]Viktor K. Prasanna, Yu-Chen Tsai:
Designing Linear Systolic Arrays. J. Parallel Distributed Comput. 7(3): 441-463 (1989) - [j10]Viktor K. Prasanna, Venkatesh Krishnan:
Efficient Parallel Algorithms for Image Template Matching on Hypercube SIMD Machines. IEEE Trans. Pattern Anal. Mach. Intell. 11(6): 665-669 (1989) - [j9]Viktor K. Prasanna, Dionisios I. Reisis:
Image Computations on Meshes with Multiple Broadcast. IEEE Trans. Pattern Anal. Mach. Intell. 11(11): 1194-1202 (1989) - [j8]Hussein M. Alnuweiri, Viktor K. Prasanna:
An efficient VLSI architecture with applications to geometric problems. Parallel Comput. 12(1): 71-93 (1989) - [j7]Viktor K. Prasanna, Yu-Chen Tsai:
On Mapping Algorithms to Linear and Fault-Tolerant Systolic Arrays. IEEE Trans. Computers 38(3): 470-478 (1989) - [c17]Kichul Kim, V. K. Prasanna Kumar:
Parallel memory systems for image processing. CVPR 1989: 654-659 - [c16]M. Mary Eshaghian, V. K. Prasanna Kumar:
Fine grain image computations on electro-optical arrays. CVPR 1989: 666-671 - [c15]Hussein M. Alnuweiri, Viktor K. Prasanna:
Fast Image Labeling using Local Operators On Mesh-Connected Computers. ICPP (3) 1989: 32-39 - [c14]Kichul Kim, Viktor K. Prasanna:
Perfect Latin Squares and Parallel Array Access. ISCA 1989: 372-379 - 1988
- [j6]Cauligi S. Raghavendra, Viktor K. Prasanna, Salim Hariri:
Reliability Analysis in Distributed Systems. IEEE Trans. Computers 37(3): 352-358 (1988) - [c13]Russ Miller, V. K. Prasanna Kumar, Dionysios I. Reisis, Quentin F. Stout:
Image computations on reconfigurable VLSI arrays. CVPR 1988: 925-930 - [c12]Hussein M. Alnuweiri, V. K. Prasanna Kumar:
Optimal geometric algorithms on fixed-size linear arrays and scan line arrays. CVPR 1988: 931-936 - [c11]Viktor K. Prasanna, Yu-Chen Tsai:
Mapping Two Dimensional Systolic Arrays to One Dimensional Arrays and Applications. ICPP (1) 1988: 39-46 - [c10]Russ Miller, Viktor K. Prasanna, Dionisios I. Reisis, Quentin F. Stout:
Data Movement Operations and Applications on Reconfigurable VLSI Arrays. ICPP (1) 1988: 205-208 - 1987
- [j5]Viktor K. Prasanna, Cauligi S. Raghavendra:
Array Processor with Multiple Broadcasting. J. Parallel Distributed Comput. 4(2): 173-190 (1987) - [c9]Viktor K. Prasanna, Venkatesh Krishnan:
Efficient Image Template Matching on Hypercube SIMD Arrays. ICPP 1987: 765-771 - [c8]Dionisios I. Reisis, Viktor K. Prasanna:
Parallel Image Processing On Enhanced Arrays. ICPP 1987: 909-912 - [c7]Viktor K. Prasanna, Sarma Sastry:
A General Purpose VLSI Array for Efficient Signal and Image Processsing. ICPP 1987: 917-920 - [c6]Dionisios I. Reisis, Viktor K. Prasanna:
VLSI Arrays with Reconfigurable Buses. ICS 1987: 732-743 - [c5]Afshin Daghi, Viktor K. Prasanna, Ali Safavi:
An Efficient Fixed Size Array for Solving Large Scale Toeplitz Systems-Abstract. PP 1987: 19 - 1986
- [j4]Cauligi S. Raghavendra, Viktor K. Prasanna:
Permutations on Illiac IV-Type Networks. IEEE Trans. Computers 35(7): 663-669 (1986) - [j3]Viktor K. Prasanna, Salim Hariri, Cauligi S. Raghavendra:
Distributed Program Reliability Analysis. IEEE Trans. Software Eng. 12(1): 42-50 (1986) - [c4]Salim Hariri, Cauligi S. Raghavendra, Viktor K. Prasanna:
Reliability Analysis in Distributed Systems. ICDCS 1986: 564-571 - [c3]Viktor K. Prasanna, Mary Mehrnoosh Eshaghian:
Parallel Geometric Algorithms for Digitized Pictures on Mesh of Trees. ICPP 1986: 270-273 - 1985
- [c2]Ping-Sheng Tseng, Kai Hwang, Viktor K. Prasanna:
A VLSI-Based Multiprocessor Architecture for Implementing Parallel Algorithms. ICPP 1985: 657-664 - [c1]Viktor K. Prasanna, Cauligi S. Raghavendra:
Array Processor with Multiple Broadcasting. ISCA 1985: 2-10 - 1984
- [j2]Joseph F. JáJá, Viktor K. Prasanna:
Information Transfer in Distributed Computing with Applications to VLSI. J. ACM 31(1): 150-162 (1984) - [j1]Joseph F. JáJá, Viktor K. Prasanna, Janos Simon:
Information Transfer under Different Sets of Protocols. SIAM J. Comput. 13(4): 840-849 (1984)
Coauthor Index
Amol Bakshi
aka: Amol B. Bakshi
aka: Amol B. Bakshi
[p3] [j163] [c482] [j159] [c463] [i12] [c438] [p2] [j147] [j144] [j143] [c433] [c431] [c430] [c425] [c424] [c423] [c419] [c418] [j140] [c417] [c416] [c411] [c410] [c409] [c405] [c404] [c403] [c389] [c386] [c380] [c378] [c376] [j137] [j133] [c375] [c374] [c373] [c365] [j127] [j124] [c341] [c340] [c327] [c311] [c310] [c293] [c266]
Seonil B. Choi
aka: Seonil Choi
aka: Seonil Choi
[j183] [j181] [c589] [c585] [c584] [c583] [c582] [c578] [c577] [i81] [i80] [i78] [i77] [i76] [i74] [i73] [i72] [i70] [i69] [i67] [i66] [i64] [j180] [j177] [c576] [c575] [c573] [c572] [c571] [c568] [c567] [c566] [c565] [c564] [c563] [c562] [c559] [c557] [i63] [i58] [i57] [i54] [i53] [i52] [i50] [i48] [i47] [j176] [j175] [j174] [c551] [c549] [c548] [c547] [c546] [c544] [c543] [c540] [c539] [c538] [c535] [c532] [c530] [c527] [c526] [c525] [i46] [i45] [i44] [i43] [i42] [i40] [i38] [i36] [j170] [j169] [c522] [c520] [c519] [c518] [c517] [c514] [c513] [c511] [c510] [c508] [c507] [c506] [c505] [c504] [c503] [i34] [i32] [i31] [i30] [i27] [j167] [j166] [j165] [c497] [c496] [c495] [c494] [c492] [c489] [c488] [c487] [c486] [c485] [c483] [i24] [i19] [i18] [i17] [j164] [j162] [j160] [c482] [c481] [c479] [c478] [c476] [c475] [c474] [c473] [c471] [c469] [c468] [c466] [c465] [i16] [i15] [i14] [i13] [j158] [c464] [c463] [c462] [c460] [c456] [c455] [c454] [c452] [c451] [c450] [i11] [i10] [c446] [c443] [c442] [c441] [c440] [c439] [c438] [c436] [c434] [i9] [i8] [c431] [c426] [c425] [c424] [c419]
Sanmukh R. Kuppannagari
aka: Sanmukh Rao Kuppannagari
aka: Sanmukh Rao Kuppannagari
[j177] [j174] [j171] [c551] [c544] [c538] [c534] [c529] [c526] [c523] [c521] [c518] [c517] [c516] [c515] [c513] [c507] [c506] [c503] [i33] [i29] [i28] [c501] [c500] [c496] [c494] [c491] [c490] [c488] [c487] [c483] [i21] [i17] [c479] [c478] [c474] [c471] [c467] [c465] [i14] [j158] [c455] [c454] [c451] [c434] [i9] [c425] [c424] [c400] [c366] [c361]
Yogesh L. Simmhan
aka: Yogesh Simmhan
aka: Yogesh Simmhan
Vikrambhai S. Sorathia
aka: Vikram Sorathia
aka: Vikram Sorathia
[j177] [i50] [j176] [c549] [c525] [p3] [i46] [i44] [i43] [i42] [j170] [j169] [c514] [c505] [c504] [i35] [i34] [c497] [c496] [c495] [c493] [c489] [c488] [c486] [c485] [c484] [c483] [i24] [i23] [i22] [i20] [i19] [j162] [c482] [c481] [c476] [c475] [c473] [c469] [c468] [c467] [i15] [i13] [c464] [c463] [c452] [i10] [c446] [c440] [j147] [c418] [j140] [c411] [c380] [j133] [c375]
Yi-Hua Edward Yang
aka: Yi-Hua E. Yang
aka: Yi-Hua E. Yang
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