"Towards Performance Modeling of 3D Memory Integrated FPGA Architectures."

Shreyas G. Singapura, Anand V. Panangadan, Viktor K. Prasanna (2015)

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DOI: 10.1007/978-3-319-16214-0_41

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Shreyas G. Singapura, Anand V. Panangadan, Viktor K. Prasanna:
Towards Performance Modeling of 3D Memory Integrated FPGA Architectures. ARC 2015: 443-450

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