"Architecture and performance models for scalable IP lookup engines on FPGA."

Yi-Hua E. Yang et al. (2013)

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DOI: 10.1109/HPSR.2013.6602306

access: closed

type: Conference or Workshop Paper

metadata version: 2024-08-08

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Yi-Hua E. Yang, Yun Qu, Swapnil Haria, Viktor K. Prasanna:
Architecture and performance models for scalable IP lookup engines on FPGA. HPSR 2013: 156-163

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