default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDIEEE Embedded Systems Letters, Volume 13
Volume 13, Number 1, March 2021
- Leonard Masing
, Fabian Lesniak, Jürgen Becker:
A Hybrid Prototyping Framework in a Virtual Platform Centered Design and Verification Flow. 1-4 - James R. B. Bantock, Bashir M. Al-Hashimi, Geoff V. Merrett:
Mitigating Interactive Performance Degradation From Mobile Device Thermal Throttling. 5-8 - Bruce Belson, Wei Xiang, Jason Holdsworth, Bronson Philippa:
C++20 Coroutines on Microcontrollers - What We Learned. 9-12 - Oscar Ferraz, Gabriel Falcão, Vítor Silva:
Gbit/s Throughput Under 6.3-W Lossless Hyperspectral Image Compression on Parallel Embedded Devices. 13-16 - Pantea Kiaei, Patrick Schaumont:
Synthesis of Parallel Synchronous Software. 17-20 - Cyril Bresch, David Hély, Stéphanie Chollet, Roman Lysecky:
SecPump: A Connected Open-Source Infusion Pump for Security Research Purposes. 21-24 - Ehsan Atoofian:
Trivial Bypassing in GPGPUs. 25-28 - Zhijie Yang, Lei Wang, Li Luo, Shiming Li, Shasha Guo, Shuquan Wang:
Bactran: A Hardware Batch Normalization Implementation for CNN Training Engine. 29-32
Volume 13, Number 2, June 2021
- Ioannis Galanis, Sai Saketh Nandan Perala, Lincoln Kinley, Iraklis Anagnostopoulos:
Edge-First Resource Management for Video-Based Applications: A Face Detection Use Case. 33-36 - Muhammad Irfan, Zahid Ullah, Abdurrashid Ibrahim Sanka, Ray C. C. Cheung:
Accelerated Updating Mechanisms for FPGA-Based Ternary Content-Addressable Memory. 37-40 - Salim Ullah, Tuan Duy Anh Nguyen, Akash Kumar:
Energy-Efficient Low-Latency Signed Multiplier for FPGA-Based Hardware Accelerators. 41-44 - Yiming Wen, Weize Yu:
Combining Thermal Maps With Inception Neural Networks for Hardware Trojan Detection. 45-48 - Semin Ryu, Seung-Chan Kim:
Embedded Identification of Surface Based on Multirate Sensor Fusion With Deep Neural Network. 49-52 - Marcos Cervetto, Edgardo Marchi, Cecilia G. Galarza:
A Fully Configurable SoC-Based IR-UWB Platform for Data Acquisition and Algorithm Testing. 53-56 - Cong Thuan Do, Jeong Hwan Choi, Young Seo Lee, Cheol Hong Kim, Sung Woo Chung:
Enhancing Matrix Multiplication With a Monolithic 3-D-Based Scratchpad Memory. 57-60 - Mattia Tibaldi, Christian Pilato, Fabrizio Ferrandi:
Automatic Generation of Heterogeneous SoC Architectures With Secure Communications. 61-64 - Rami Amiri, Omar S. Elkeelany:
FPGA Design of Elliptic Curve Cryptosystem (ECC) for Isomorphic Transformation and EC ElGamal Encryption. 65-68
Volume 13, Number 3, September 2021
- Saehwa Kim:
Efficient Exact Response Time Analysis for Fixed Priority Scheduling in Lowest Priority First-Based Feasibility Tests. 69-72 - James Timothy Meech, Phillip Stanley-Marbell:
Efficient Programmable Random Variate Generation Accelerator From Sensor Noise. 73-76 - Petar Jokic, Stéphane Emery, Luca Benini:
Improving Memory Utilization in Convolutional Neural Network Accelerators. 77-80 - Brooks Olney, Robert Karam:
WATERMARCH: IP Protection Through Authenticated Obfuscation in FPGA Bitstreams. 81-84 - Tianyi Zhang, Minjun Seo, Bryan Donyanavard, Nikil D. Dutt, Fadi J. Kurdahi:
Predicting Failures in Embedded Systems Using Long Short-Term Inference. 85-89 - Yishan Su, Lijie Dong, Zhaojia Zhou, Xuan Liu, Xing Wei:
A General Embedded Underwater Acoustic Communication System Based on Advance STM32. 90-93 - Hammond A. Pearce, Xin Yang, Partha S. Roop, Marc Katzef, Tórur Biskopstø Strøm:
Designing Neural Networks for Real-Time Systems. 94-97 - Sumit K. Mandal, Raid Ayoub, Michael Kishinevsky, Mohammad M. Islam, Ümit Y. Ogras:
Analytical Performance Modeling of NoCs under Priority Arbitration and Bursty Traffic. 98-101 - Giacomo Valente, Tania Di Mascio, Luigi Pomante, Gabriella D'Andrea:
Dynamic Partial Reconfiguration Profitability for Real-Time Systems. 102-105 - Sudipa Mandal, Aritra Hazra, Pallab Dasgupta:
Usage-Driven Personalization of Power Management Logic. 106-109 - Shuo Tian, Kai Hu, Shasha Guo, Shiming Li, Lei Wang, Weixia Xu:
Evolutionary Recurrent Neural Architecture Search. 110-113 - Rajesh Kedia, Shikha Goel, M. Balakrishnan, Kolin Paul, Rijurekha Sen:
Design Space Exploration of FPGA-Based System With Multiple DNN Accelerators. 114-117 - J. Sujanth Roy, G. Lakshminarayanan, Seok-Bum Ko:
High-Speed Architecture for Successive Cancellation Decoder With Split-g Node Block. 118-121 - Thiarles S. Medeiros, Gustavo P. Berned, Antoni C. Navarro, Fábio D. Rossi, Marcelo Caggiani Luizelli, Marcelo Brandalero, Michael Hübner, Antonio Carlos Schneider Beck, Arthur Francisco Lorenzon:
Aging-Aware Parallel Execution. 122-125 - Deyu Lin, Weidong Min, Jianfeng Xu, Jiaxun Yang, Jianlin Zhang:
An Energy-Efficient Routing Method in WSNs Based on Compressive Sensing: From the Perspective of Social Welfare. 126-129 - Alexis Arcaya-Jordan, Alain Pegatoquet, Andrea Castagnetti, Julien Raybaut, Pierre Le Coz:
Deep Learning for Eye Blink Detection Implemented at the Edge. 130-133 - Nada Lachtar, Duha Ibdah, Anys Bacha:
Toward Mobile Malware Detection Through Convolutional Neural Networks. 134-137 - Adarsha Balaji, Shihao Song, Anup Das, Jeffrey L. Krichmar, Nikil D. Dutt, James A. Shackleford, Nagarajan Kandasamy, Francky Catthoor:
Enabling Resource-Aware Mapping of Spiking Neural Networks via Spatial Decomposition. 142-145 - Sunandan Adhikary, Amit Gurung, Jay Thakkar, Antonio Anastasio Bruto da Costa, Soumyajit Dey, Aritra Hazra, Pallab Dasgupta:
SMT-Based Verification of Safety-Critical Embedded Control Software. 138-141 - Amir Yeganeh-Khaksar, Mohsen Ansari, Sepideh Safari, Sina Yari-Karin, Alireza Ejlali:
Ring-DVFS: Reliability-Aware Reinforcement Learning-Based DVFS for Real-Time Embedded Systems. 146-149
Volume 13, Number 4, December 2021
- Chia-Hung Chang, Wei-Wen Hu:
Design and Implementation of an Embedded Cardiorespiratory Monitoring System for Wheelchair Users. 150-153 - C. Mani Krishna:
Task Sequencing in Frame-Based CPS. 154-157 - Daeyeal Lee, Bill Lin, Chung-Kuan Cheng:
SMT-Based Contention-Free Task Mapping and Scheduling on SMART NoC. 158-161 - Young Seo Lee, Eui-Young Chung, Young-Ho Gong, Sung Woo Chung:
Quant-PIM: An Energy-Efficient Processing-in-Memory Accelerator for Layerwise Quantized Neural Networks. 162-165 - Corentin Lavaud, Robin Gerzaguet, Matthieu Gautier, Olivier Berder:
AbstractSDRs: Bring Down the Two-Language Barrier With Julia Language for Efficient SDR Prototyping. 166-169 - Jonathan Ling, Paul Cautereels:
Fast LDPC GPU Decoder for Cloud RAN. 170-173 - Suresh Nambi, Uppugunduru Anil Kumar, Kavya Radhakrishnan, Mythreye Venkatesan, Syed Ershad Ahmed:
DeBAM: Decoder-Based Approximate Multiplier for Low Power Applications. 174-177 - Pedro Henrique Penna, Lucas Andrade Maciel, João Vicente Souto, Davidson Francis Lima, Márcio Castro, François Broquedis, Henrique Cota de Freitas, Jean-François Méhaut:
Co-Designing Clusters of Lightweight Manycores and Asymmetric Operating System Kernels. 178-181 - Tao Zhang, Jingyi Chen, Dianjun Lv, Ying Liu, Wentao Zhang, Chunyan Ma:
Automatic Generation of Reconfiguration Blueprints for IMA Systems Using Reinforcement Learning. 182-185 - Ramazan Cetin, Selen Gecgel, Gunes Karabulut-Kurt, Faik Baskaya:
Convolutional Neural Network-Based Signal Classification in Real Time. 186-189 - Anees Ullah, Pedro Reviriego, Adeel Akram, Malik Najmus Siraj:
Switch-Based High Cardinality Node Detection. 190-193 - Lorenzo Ferretti, Jihye Kwon, Giovanni Ansaloni, Giuseppe Di Guglielmo, Luca P. Carloni, Laura Pozzi:
DB4HLS: A Database of High-Level Synthesis Design Space Explorations. 194-197 - Seon Young Kim, Yon Dohn Chung, Sung Woo Chung:
IDRA: An In-Storage Data Reorganization Accelerator for Multidimensional Databases. 198-201 - Niklas Bruns, Vladimir Herdt, Daniel Große, Rolf Drechsler:
Toward RISC-V CSR Compliance Testing. 202-205 - Muhammad Adib Kamali, Angela C. Caliwag, Wansu Lim:
Novel SOH Estimation of Lithium-Ion Batteries for Real-Time Embedded Applications. 206-209 - Benedetta Mazzoni, Simone Benatti, Luca Benini, Giuseppe Tagliavini:
Efficient Transform Algorithms for Parallel Ultra-Low-Power IoT End Nodes. 210-213 - Dezhi Peng, Jin Sha:
Efficient HLS Implementation of Fast Linear Discriminant Analysis Classifier. 214-217 - Jim Luo, Myong H. Kang, Emmanuel Bisse, Mike Veldink, Dmitriy Okunev, Scott Kolb, Joseph G. Tylka, Arquimedes Canedo:
A Quad-Redundant PLC Architecture for Cyber-Resilient Industrial Control Systems. 218-221
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-02-20 19:45 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
