default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDPartha S. Roop
Person information
- affiliation: University of Auckland, New Zealand
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[j53]Alex Baird
, Abhinandan Panda, Hammond Pearce, Srinivas Pinisetty, Partha S. Roop:
Scalable Security Enforcement for Cyber Physical Systems. IEEE Access 12: 14385-14410 (2024)- [j52]Logan Kenwright, Partha S. Roop, Nathan Allen, Sanjay Lall, Calin Cascaval, Tammo Spalink, Martin Izzard:
Logical Synchrony Networks: A Formal Model for Deterministic Distribution. IEEE Access 12: 80872-80883 (2024) - [j51]Sobhan Chatterjee, Jyoti Mishra, Frederick Sundram, Partha S. Roop:
Towards Personalised Mood Prediction and Explanation for Depression from Biophysical Data. Sensors 24(1): 164 (2024) - [c99]Sobhan Chatterjee, Nathan Allen, Nitish D. Patel, Partha S. Roop:
Exploring Compositional Neural Networks for Real-Time Systems. MEMOCODE 2024: 46-57 - [c98]Sai Rohan Harshavardhan Vuppala, Nathan Allen, Srinivas Pinisetty, Partha S. Roop:
A Formal Approach for Safe Reinforcement Learning: A Rate-Adaptive Pacemaker Case Study. RV 2024: 3-21 - [c97]Dhiren Tripuramallu, Ayush Anand, Srinivas Pinisetty, Hammond Pearce, Partha S. Roop:
Runtime Verified Neural Networks for Cyber-Physical Systems. VORTEX@ISSTA 2024: 44-51 - [i13]Logan Kenwright, Partha S. Roop, Nathan Allen, Sanjay Lall, Calin Cascaval, Tammo Spalink, Martin Izzard:
Logical Synchrony Networks: A formal model for deterministic distribution. CoRR abs/2402.07433 (2024) - [i12]Valerio Terragni, Partha S. Roop, Kelly Blincoe:
The Future of Software Engineering in an AI-Driven World. CoRR abs/2406.07737 (2024) - 2023
- [j50]Abhinandan Panda, Alex Baird, Srinivas Pinisetty, Partha S. Roop:
Incremental Security Enforcement for Cyber-Physical Systems. IEEE Access 11: 18475-18498 (2023) - [j49]Kelvin Anto, Akshya Kumar Swain, Partha S. Roop:
A Novel Framework for the Design of Resilient Cyber-Physical Systems Using Control Theory and Formal Methods. IEEE Access 11: 73556-73567 (2023) - [j48]Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop:
A Novel Mapping of ECG and PPG to Ensure the Safety of Health Monitoring Applications. IEEE Embed. Syst. Lett. 15(1): 49-52 (2023) - [j47]Ankit Pradhan, Jonathan King, Srinivas Pinisetty, Partha S. Roop:
Model Based Verification of Spiking Neural Networks in Cyber Physical Systems. IEEE Trans. Computers 72(9): 2426-2439 (2023) - [j46]Eugene Yip, Alain Girault, Partha S. Roop, Morteza Biglari-Abhari:
Synchronous Deterministic Parallel Programming for Multi-Cores with ForeC. ACM Trans. Program. Lang. Syst. 45(2): 11:1-11:74 (2023) - [c96]Pengqian Han, Partha S. Roop, Jiamou Liu, Tianzhe Bao, Yifei Wang:
STF: Spatial Temporal Fusion for Trajectory Prediction. M2VIP 2023: 1-6 - [c95]Nasser Giacaman, Partha S. Roop, Valerio Terragni:
Evolving a Programming CS2 Course: A Decade-Long Experience Report. SIGCSE (1) 2023: 507-513 - [i11]Pengqian Han, Partha S. Roop, Jiamou Liu, Tianzhe Bao, Yifei Wang:
STF: Spatial Temporal Fusion for Trajectory Prediction. CoRR abs/2311.18149 (2023) - [i10]Pengqian Han, Jiamou Liu, Jialing He, Zeyu Zhang, Song Yang, Yanni Tang, Partha S. Roop:
S-T CRF: Spatial-Temporal Conditional Random Field for Human Trajectory Prediction. CoRR abs/2311.18198 (2023) - 2022
- [j45]Weiwei Ai, Vinod Suresh, Partha S. Roop:
Development of closed-loop modelling framework for adaptive respiratory pacemakers. Comput. Biol. Medicine 141: 105136 (2022) - [j44]Luman Wang, Avinash Malik, Partha S. Roop, Leo K. Cheng, Niranchan Paskaranandavadivel:
A framework for the design of a closed-loop gastric pacemaker for treating conduction block. Comput. Methods Programs Biomed. 216: 106652 (2022) - [j43]Jin Woo Ro, Avinash Malik, Partha S. Roop:
High Fidelity Simulation of Hybrid Systems using Higher Order Hybrid Automata. IEEE Trans. Computers 71(7): 1668-1680 (2022) - [c94]Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop:
Policy-Based Diabetes Detection using Formal Runtime Verification Monitors. CBMS 2022: 333-338 - [c93]Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop:
Policy-Based Hypertension Monitoring Using Formal Runtime Verification Monitors. ISBRA 2022: 169-179 - [c92]Alex Baird, Srinivas Pinisetty, Nathan Allen, Nitish D. Patel, Partha S. Roop:
Runtime Verification for Clinically Interpretable Arrhythmia Classification. MEMOCODE 2022: 1-10 - [c91]Alex Baird, Hammond Pearce, Srinivas Pinisetty, Partha S. Roop:
Runtime Interchange of Enforcers for Adaptive Attacks: A Security Analysis Framework for Drones. MEMOCODE 2022: 1-11 - [c90]Surinder Sood, Avinash Malik, Partha S. Roop:
Robust hardware-software Co-simulation framework for design and validation of Hybrid Systems. MEMOCODE 2022: 1-11 - [c89]Surinder Sood, Avinash Malik, Partha S. Roop:
A novel approach to Real-time contract based reasoning for Hybrid Systems. MEMOCODE 2022: 1-11 - [i9]Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop:
Runtime Monitoring and Statistical Approaches for Correlation Analysis of ECG and PPG. CoRR abs/2202.00559 (2022) - 2021
- [j42]Hammond A. Pearce, Xin Yang, Partha S. Roop, Marc Katzef, Tórur Biskopstø Strøm:
Designing Neural Networks for Real-Time Systems. IEEE Embed. Syst. Lett. 13(3): 94-97 (2021) - [j41]Srinivas Pinisetty, Ankit Pradhan, Partha S. Roop, Stavros Tripakis:
Compositional runtime enforcement revisited. Formal Methods Syst. Des. 59(1): 205-252 (2021) - [j40]Jin Woo Ro, Partha S. Roop, Avinash Malik:
A New Safety Distance Calculation for Rear-End Collision Avoidance. IEEE Trans. Intell. Transp. Syst. 22(3): 1742-1747 (2021) - [c88]Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop:
A secure insulin infusion system using verification monitors. MEMOCODE 2021: 56-65 - [c87]Kelvin Anto, Partha S. Roop, Akshya K. Swain:
Formal modelling of attack scenarios and mitigation strategies in IEEE 1588. MEMOCODE 2021: 134-141 - [c86]Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop, K. Ajay Babu, M. Sabarimalai Manikandan:
Runtime verification of implantable medical devices using multiple physiological signals. SAC 2021: 1837-1840 - [i8]Hammond Pearce, Xin Yang, Srinivas Pinisetty, Partha S. Roop:
Runtime Interchange for Adaptive Re-use of Intelligent Cyber-Physical System Controllers. CoRR abs/2110.01974 (2021) - 2020
- [j39]Luman Wang, Avinash Malik, Partha S. Roop, Leo K. Cheng, Niranchan Paskaranandavadivel, Weiwei Ai:
A novel approach for model-based design of gastric pacemakers. Comput. Biol. Medicine 116: 103576 (2020) - [j38]Shweta Bhandari, Frédéric Herbreteau, Vijay Laxmi, Akka Zemmari, Manoj Singh Gaur, Partha S. Roop:
SneakLeak+: Large-scale klepto apps analysis. Future Gener. Comput. Syst. 109: 593-603 (2020) - [j37]Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Mark L. Trew:
Cardiac Electrical Modeling for Closed-Loop Validation of Implantable Devices. IEEE Trans. Biomed. Eng. 67(2): 536-544 (2020) - [j36]Surinder Sood, Avinash Malik, Partha S. Roop:
Robust Design and Validation of Cyber-physical Systems. ACM Trans. Embed. Comput. Syst. 18(6): 116:1-116:21 (2020) - [j35]Hammond A. Pearce, Srinivas Pinisetty, Partha S. Roop, Matthew M. Y. Kuo, Abhisek Ukil:
Smart I/O Modules for Mitigating Cyber-Physical Attacks on Industrial Control Systems. IEEE Trans. Ind. Informatics 16(7): 4659-4669 (2020) - [j34]Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Mark L. Trew:
Closing the Loop: Validation of Implantable Cardiac Devices With Computational Heart Models. IEEE J. Biomed. Health Informatics 24(6): 1579-1588 (2020) - [c85]Xin Yang, Partha S. Roop, Hammond A. Pearce, Jin Woo Ro:
A compositional approach using Keras for neural networks in real-time systems. DATE 2020: 1109-1114 - [c84]Luman Wang, Avinash Malik, Partha S. Roop, Leo K. Cheng, Niranchan Paskaranandavadivel, Weiwei Ai:
Design of a closed-loop gastric pacemaker for modulating dysrhythmic conduction patterns via extracellular potentials. EMBC 2020: 2504-2507 - [c83]Nathan Allen, Partha S. Roop:
Semantics-Directed Hardware Generation of Hybrid Systems. ICCPS 2020: 259-268 - [c82]Moon Soo Kim, Weiwei Ai, Partha S. Roop, Nathan Allen, Rohit Ramchandra, Julian Paton:
Formal Modeling and Verification of Rate Adaptive Pacemakers for Heart Failure. MEMOCODE 2020: 1-11 - [c81]Saumya Shankar, Ujwal V. R, Srinivas Pinisetty, Partha S. Roop:
Formal Runtime Monitoring Approaches for Autonomous Vehicles. OVERLAY 2020: 89-94 - [i7]Hammond A. Pearce, Xin Yang, Partha S. Roop, Marc Katzef, Tórur Biskopstø Strøm:
Designing Neural Networks for Real-Time Systems. CoRR abs/2008.11830 (2020)
2010 – 2019
- 2019
- [j33]Luman Wang, Avinash Malik, Partha S. Roop, Leo K. Cheng, Niranchan Paskaranandavadivel:
A Formal Approach for Scalable Simulation of Gastric ICC Electrophysiology. IEEE Trans. Biomed. Eng. 66(12): 3320-3329 (2019) - [j32]Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, S. Ramesh, Partha S. Roop:
Formal Modeling and Verification of a Victim DRAM Cache. ACM Trans. Design Autom. Electr. Syst. 24(2): 20:1-20:23 (2019) - [c80]Hammond A. Pearce, Partha S. Roop:
Synthesizing IEC 61499 Function Blocks to hardware. ICEIC 2019: 1-6 - [c79]Chad E. Eichler, Vinod Suresh, Partha S. Roop:
A formal analysis approach for verifying the design of respiratory pacing devices. I2MTC 2019: 1-5 - [c78]Jin Woo Ro, Avinash Malik, Partha S. Roop:
A compositional semantics of Simulink/Stateflow based on quantized state hybrid automata. MEMOCODE 2019: 1:1-1:11 - [c77]Hammond A. Pearce, Matthew M. Y. Kuo, Partha S. Roop, Srinivas Pinisetty:
Securing implantable medical devices with runtime enforcement hardware. MEMOCODE 2019: 3:1-3:9 - [c76]Nathan Allen, Yash Raje, Jin Woo Ro, Partha S. Roop:
A compositional approach for real-time machine learning. MEMOCODE 2019: 7:1-7:5 - [e1]Partha S. Roop, Naijun Zhan, Sicun Gao, Pierluigi Nuzzo:
Proceedings of the 17th ACM-IEEE International Conference on Formal Methods and Models for System Design, MEMOCODE 2019, La Jolla, CA, USA, October 9-11, 2019. ACM 2019, ISBN 978-1-4503-6997-8 [contents] - 2018
- [j31]Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Sidharta Andalam, Eugene Yip, Nathan Allen, Mark L. Trew:
A Parametric Computational Model of the Action Potential of Pacemaker Cells. IEEE Trans. Biomed. Eng. 65(1): 123-130 (2018) - [j30]Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, S. Ramesh, Partha S. Roop:
Formal Modeling and Verification of Controllers for a Family of DRAM Caches. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(11): 2485-2496 (2018) - [j29]Eugene Yip, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark L. Trew, Weiwei Ai, Nitish D. Patel:
Towards the Emulation of the Cardiac Conduction System for Pacemaker Validation. ACM Trans. Cyber Phys. Syst. 2(4): 32:1-32:26 (2018) - [j28]Avinash Malik, Partha S. Roop, Nathan Allen, Theo Steger:
Emulation of Cyber-Physical Systems Using IEC-61499. IEEE Trans. Ind. Informatics 14(1): 380-389 (2018) - [j27]Jin Woo Ro, Partha S. Roop, Avinash Malik, Prakash Ranjitkar:
A Formal Approach for Modeling and Simulation of Human Car-Following Behavior. IEEE Trans. Intell. Transp. Syst. 19(2): 639-648 (2018) - [c75]Michael Mendler, Joaquín Aguado, Bruno Bodin, Partha S. Roop, Reinhard von Hanxleden:
Logic Meets Algebra: Compositional Timing Analysis for Synchronous Reactive Multithreading. Models, Mindsets, Meta 2018: 45-67 - [c74]Joaquín Aguado, Michael Mendler, Marc Pouzet, Partha S. Roop, Reinhard von Hanxleden:
Deterministic Concurrency: A Clock-Synchronised Shared Memory Approach. ESOP 2018: 86-113 - [c73]Hammond A. Pearce, Partha S. Roop, Morteza Biglari-Abhari, Martin Schoeberl:
Faster Function Blocks for Precision Timed Industrial Automation. ISORC 2018: 67-74 - [c72]Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew:
Rethinking the Validation Process for Medical Devices: A Cardiac Pacemaker Case Study. ISORC 2018: 134-137 - [c71]Partha S. Roop, Hammond A. Pearce, Keyan Monadjem:
Synchronous neural networks for cyber-physical systems. MEMOCODE 2018: 33-42 - [c70]Srinivas Pinisetty, Partha S. Roop, Vidula Sawant, Gerardo Schneider:
Security of Pacemakers using Runtime Verification. MEMOCODE 2018: 51-61 - [i6]Avinash Malik, Partha S. Roop:
Quantized State Hybrid Automata for Cyber-Physical Systems. CoRR abs/1806.05754 (2018) - 2017
- [j26]Avinash Malik, Partha S. Roop, Sidharta Andalam, Mark Trew, Michael Mendler:
Modular Compilation of Hybrid Systems for Emulation and Large Scale Simulation. ACM Trans. Embed. Comput. Syst. 16(5s): 118:1-118:21 (2017) - [j25]Sidharta Andalam, Nathan Allen, Avinash Malik, Partha S. Roop, Mark Trew:
A Novel Emulation Model of the Cardiac Conduction System. ACM Trans. Embed. Comput. Syst. 16(5s): 157:1-157:20 (2017) - [j24]Jiajie Wang, Michael Mendler, Partha S. Roop, Bruno Bodin:
Timing Analysis of Synchronous Programs using WCRT Algebra: Scalability through Abstraction. ACM Trans. Embed. Comput. Syst. 16(5s): 177:1-177:19 (2017) - [j23]Srinivas Pinisetty, Partha S. Roop, Steven Smyth, Nathan Allen, Stavros Tripakis, Reinhard von Hanxleden:
Runtime Enforcement of Cyber-Physical Systems. ACM Trans. Embed. Comput. Syst. 16(5s): 178:1-178:25 (2017) - [j22]Zeeshan Ejaz Bhatti, Partha S. Roop, Roopak Sinha:
Unified Functional Safety Assessment of Industrial Automation Systems. IEEE Trans. Ind. Informatics 13(1): 17-26 (2017) - [c69]Shweta Bhandari, Frédéric Herbreteau, Vijay Laxmi, Akka Zemmari, Partha S. Roop, Manoj Singh Gaur:
Detecting Inter-App Information Leakage Paths. AsiaCCS 2017: 908-910 - [c68]Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Nathan Allen, Mark L. Trew:
An intracardiac electrogram model to bridge virtual hearts and implantable cardiac devices. EMBC 2017: 1974-1977 - [c67]Joaquín Aguado, Michael Mendler, Jia Jie Wang, Bruno Bodin, Partha S. Roop:
Compositional timing-aware semantics for synchronous programming. FDL 2017: 1-8 - [c66]Nathan Allen, Hammond A. Pearce, Partha S. Roop, Reinhard von Hanxleden:
A Model Driven Approach for Cardiac Pacemaker Design Using a PRET Processor. ISORC 2017: 168-175 - [c65]Hammond A. Pearce, Matthew M. Y. Kuo, Nathan Allen, Partha S. Roop, Avinash Malik:
Simulation of cyber-physical systems using IEC61499. MEMOCODE 2017: 136-145 - [c64]Srinivas Pinisetty, Partha S. Roop, Steven Smyth, Stavros Tripakis, Reinhard von Hanxleden:
Runtime enforcement of reactive systems using synchronous enforcers. SPIN 2017: 80-89 - [c63]Shweta Bhandari, Frédéric Herbreteau, Vijay Laxmi, Akka Zemmari, Partha S. Roop, Manoj Singh Gaur:
SneakLeak: Detecting Multipartite Leakage Paths in Android Apps. TrustCom/BigDataSE/ICESS 2017: 285-292 - [i5]Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Nathan Allen, Mark L. Trew:
An intracardiac electrogram model to bridge virtual hearts and implantable cardiac devices. CoRR abs/1703.01107 (2017) - 2016
- [j21]Roopak Sinha, Partha S. Roop, Gareth Shaw, Zoran A. Salcic, Matthew M. Y. Kuo:
Hierarchical and Concurrent ECCs for IEC 61499 Function Blocks. IEEE Trans. Ind. Informatics 12(1): 59-68 (2016) - [c62]Sidharta Andalam, Avinash Malik, Partha S. Roop, Mark L. Trew:
Hybrid Automata Model of the Heart for Formal Verification of Pacemakers. ARCH@CPSWeek 2016: 9-17 - [c61]Nathan Allen, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew, Nitish D. Patel:
Modular code generation for emulating the electrical conduction system of the human heart. DATE 2016: 648-653 - [c60]Weiwei Ai, Nitish D. Patel, Partha S. Roop:
Requirements-centric closed-loop validation of implantable cardiac devices. DATE 2016: 846-849 - [c59]Matthew M. Y. Kuo, Sidharta Andalam, Partha S. Roop:
Precision timed industrial automation systems. DATE 2016: 1024-1025 - [c58]Sidharta Andalam, Harshavardhan Ramanna, Avinash Malik, Partha S. Roop, Nitish D. Patel, Mark L. Trew:
Hybrid automata models of cardiac ventricular electrophysiology for real-time computational applications. EMBC 2016: 5595-5598 - [c57]Jia Jie Wang, Partha S. Roop, Alain Girault:
Energy and timing aware synchronous programming. EMSOFT 2016: 1:1-1:10 - [c56]Michael Mendler, Partha S. Roop, Bruno Bodin:
A Novel WCET Semantics of Synchronous Programs. FORMATS 2016: 195-210 - [c55]Hammond A. Pearce, Matthew M. Y. Kuo, Partha S. Roop, Morteza Biglari-Abhari:
RunSync: A Predictable Runtime for Precision Timed Automation Systems. ISORC 2016: 116-123 - [c54]Mahmood Hikmet, Matthew M. Y. Kuo, Partha S. Roop, Prakash Ranjitkar:
Mixed-Criticality Systems as a Service for Non-critical Tasks. ISORC 2016: 221-228 - [c53]Eugene Yip, Alain Girault, Partha S. Roop, Morteza Biglari-Abhari:
The ForeC Synchronous Deterministic Parallel Programming Language for Multicores. MCSoC 2016: 297-304 - [i4]Eugene Yip, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew, Weiwei Ai, Nitish D. Patel:
Towards the Emulation of the Cardiac Conduction System for Pacemaker Testing. CoRR abs/1603.05315 (2016) - [i3]Srinivas Pinisetty, Partha S. Roop, Steven Smyth, Stavros Tripakis, Reinhard von Hanxleden:
Runtime enforcement of reactive systems using synchronous enforcers. CoRR abs/1612.05030 (2016) - 2015
- [b2]Li Hsien Yoong, Partha S. Roop, Zeeshan Ejaz Bhatti, Matthew M. Y. Kuo:
Model-Driven Design Using IEC 61499 - A Synchronous Approach for Embedded and Automation Systems. Springer 2015, ISBN 978-3-319-10520-8, pp. I-XVIII, 1-194 - [c52]Li Hsien Yoong, Partha S. Roop:
Synthesizing Multirate Programs from IEC 61499. ISORC 2015: 43-50 - [c51]Jin Woo Ro, Partha S. Roop, Avinash Malik:
Schedule Synthesis for Time-Triggered Multi-hop Wireless Networks with Retransmissions. ISORC 2015: 94-101 - [c50]Mahmood Hikmet, Partha S. Roop, Prakash Ranjitkar:
Fairness-Based Measures for Safety-Critical Vehicular Ad-Hoc Networks. ISORC 2015: 142-149 - [i2]Avinash Malik, Partha S. Roop:
A unified framework for modeling and implementation of hybrid systems with synchronous controllers. CoRR abs/1501.05936 (2015) - [i1]Avinash Malik, Partha S. Roop, Sidharta Andalam, Eugene Yip, Mark Trew:
A synchronous rendering of hybrid systems for designing Plant-on-a-Chip (PoC). CoRR abs/1510.04336 (2015) - 2014
- [j20]Sidharta Andalam, Partha S. Roop, Alain Girault, Claus Traulsen:
A Predictable Framework for Safety-Critical Embedded Systems. IEEE Trans. Computers 63(7): 1600-1612 (2014) - [j19]Reinhard von Hanxleden, Michael Mendler, Joaquín Aguado, Björn Duderstadt, Insa Fuhrmann, Christian Motika, Stephen Mercer, Owen O'Brien, Partha S. Roop:
Sequentially Constructive Concurrency - A Conservative Extension of the Synchronous Model of Computation. ACM Trans. Embed. Comput. Syst. 13(4s): 144:1-144:26 (2014) - [j18]Roopak Sinha, Alain Girault, Gregor Goessler, Partha S. Roop:
A Formal Approach to Incremental Converter Synthesis for System-on-Chip Design. ACM Trans. Design Autom. Electr. Syst. 20(1): 13:1-13:30 (2014) - [c49]Jin Woo Ro, Zeeshan Ejaz Bhatti, Partha S. Roop:
A model-driven approach with synchronous semantics for developing hard real-time WSNs. ETFA 2014: 1-8 - [c48]Eugene Yip, Matthew M. Y. Kuo, Partha S. Roop, David Broman:
Relaxing the synchronous approach for mixed-criticality systems. RTAS 2014: 89-100 - 2013
- [j17]Syed Adeel Ali, Partha S. Roop, Ian Warren:
Web Service Choreography: Unanimous Handling of Control and Data. Int. J. Softw. Informatics 7(2): 309-330 (2013) - [c47]Eugene Yip, Partha S. Roop, Morteza Biglari-Abhari, Alain Girault:
Programming and Timing Analysis of Parallel Programs on Multicores. ACSD 2013: 160-169 - [c46]Matthew M. Y. Kuo, Partha S. Roop, Sidharta Andalam, Nitish D. Patel:
Precision Timed Embedded Systems Using TickPAD Memory. ACSD 2013: 206-215 - [c45]Jia Jie Wang, Partha S. Roop, Sidharta Andalam:
ILPc: A novel approach for scalable timing analysis of synchronous programs. CASES 2013: 20:1-20:10 - [c44]Sidharta Andalam, Alain Girault, Roopak Sinha, Partha S. Roop, Jan Reineke:
Precise timing analysis for direct-mapped caches. DAC 2013: 148:1-148:10 - [c43]Syed Adeel Ali, Partha S. Roop, Ian Warren:
Stateful Web Services - Auto Modeling and Composition. ICWS 2013: 284-291 - 2012
- [j16]Li Hsien Yoong, Partha S. Roop, Zoran Salcic:
Implementing constrained cyber-physical systems with IEC 61499. ACM Trans. Embed. Comput. Syst. 11(4): 78:1-78:22 (2012) - [j15]Li Hsien Yoong, Gareth Shaw, Partha S. Roop, Zoran Salcic:
Synthesizing Globally Asynchronous Locally Synchronous Systems With IEC 61499. IEEE Trans. Syst. Man Cybern. Part C 42(6): 1465-1477 (2012) - [c42]Roopak Sinha, Partha S. Roop, Zoran Salcic, Samik Basu:
Correct-by-construction multi-component SoC design. DATE 2012: 647-652 - [c41]K. Nicholas, Zeeshan Ejaz Bhatti, Partha S. Roop:
Model-driven development of industrial embedded systems: Challenges faced and lessons learnt. ETFA 2012: 1-4 - [c40]Zachary J. Oster, Syed Adeel Ali, Ganesh Ram Santhanam, Samik Basu, Partha S. Roop:
A Service Composition Framework Based on Goal-Oriented Requirements Engineering, Model Checking, and Qualitative Preference Analysis. ICSOC 2012: 283-297 - [c39]Li Hsien Yoong, Zeeshan Ejaz Bhatti, Partha S. Roop:
Combining IEC 61499 Model-Based Design with Component-Based Architecture for Robotics. SIMPAR 2012: 349-360 - 2011
- [j14]Ivan Radojevic, Zoran Salcic, Partha S. Roop:
Design of Distributed Heterogeneous Embedded Systems in DDFCharts. IEEE Trans. Parallel Distributed Syst. 22(2): 296-308 (2011) - [c38]Matthew M. Y. Kuo, Roopak Sinha, Partha S. Roop:
Efficient WCRT analysis of synchronous programs using reachability. DAC 2011: 480-485 - [c37]Sidharta Andalam, Partha S. Roop, Alain Girault:
Pruning infeasible paths for tight WCRT analysis of synchronous programs. DATE 2011: 204-209 - [c36]Sidharta Andalam, Roopak Sinha, Partha S. Roop:
Environment Modelling for Tighter Timing Analysis of Synchronous Programs. DELTA 2011: 150-155 - [c35]Simon Yuan, Li Hsien Yoong, Partha S. Roop:
Compiling Esterel for Multi-core Execution. DSD 2011: 727-735 - [c34]Syed Adeel Ali, Partha S. Roop, Ian Warren, Zeeshan Ejaz Bhatti:
Unified management of control flow and data mismatches in web service composition. SOSE 2011: 93-101 - 2010
- [j13]Avinash Malik, Zoran Salcic, Partha S. Roop, Alain Girault:
SystemJ: A GALS language for system level design. Comput. Lang. Syst. Struct. 36(4): 317-344 (2010) - [j12]Li Hsien Yoong, Partha S. Roop:
Verifying IEC 61499 Function Blocks Using Esterel. IEEE Embed. Syst. Lett. 2(1): 1-4 (2010) - [c33]Sidharta Andalam, Partha S. Roop, Alain Girault:
Deterministic, predictable and light-weight multithreading using PRET-C. DATE 2010: 1653-1656 - [c32]Sidharta Andalam, Partha S. Roop, Alain Girault:
Predictable multithreading of embedded applications using PRET-C. MEMOCODE 2010: 159-168
2000 – 2009
- 2009
- [j11]Simon Yuan, Li Hsien Yoong, Sidharta Andalam, Partha S. Roop, Zoran Salcic:
A New Multithreaded Architecture Supporting Direct Execution of Esterel. EURASIP J. Embed. Syst. 2009 (2009) - [j10]Li Hsien Yoong, Partha S. Roop, Valeriy Vyatkin, Zoran A. Salcic:
A Synchronous Approach for IEC 61499 Function Block Implementation. IEEE Trans. Computers 58(12): 1599-1614 (2009) - [j9]Avinash Malik, Zoran A. Salcic, Partha S. Roop:
SystemJ compilation using the tandem virtual machine approach. ACM Trans. Design Autom. Electr. Syst. 14(3): 34:1-34:37 (2009) - [c31]Partha S. Roop, Alain Girault, Roopak Sinha, Gregor Goessler:
Specification Enforcing Refinement for Convertibility Verification. ACSD 2009: 148-157 - [c30]Partha S. Roop, Sidharta Andalam, Reinhard von Hanxleden, Simon Yuan, Claus Traulsen:
Tight WCRT analysis of synchronous C programs. CASES 2009: 205-214 - [c29]Roopak Sinha, Partha S. Roop, Samik Basu, Zoran Salcic:
Multi-clock Soc design using protocol conversion. DATE 2009: 123-128 - [c28]Gareth Shaw, Partha S. Roop, Zoran Salcic:
A Hierarchical and Concurrent Approach for IEC 61499 Function Blocks. ETFA 2009: 1-8 - 2008
- [j8]Roopak Sinha, Partha S. Roop, Samik Basu:
SoC Design Approach Using Convertibility Verification. EURASIP J. Embed. Syst. 2008 (2008) - [c27]Avinash Malik, Zoran Salcic, Partha S. Roop:
Tandem virtual machine - An efficient execution platform for GALS language SystemJ. ACSAC 2008: 1-8 - [c26]Roopak Sinha, Partha S. Roop, Samik Basu:
A Module Checking Based Converter Synthesis Approach for SoCs. VLSI Design 2008: 492-501 - [c25]Simon Yuan, Sidharta Andalam, Li Hsien Yoong, Partha S. Roop, Zoran A. Salcic:
STARPro - A new multithreaded direct execution platform for Esterel. SLAP@ETAPS 2008: 37-55 - 2007
- [j7]Hai-Feng Guo, Miao Liu, Partha S. Roop, C. R. Ramakrishnan, I. V. Ramakrishnan:
Precise specification matching for adaptive reuse in embedded systems. J. Appl. Log. 5(2): 333-355 (2007) - [c24]Ivan Radojevic, Zoran A. Salcic, Partha S. Roop:
McCharts and Multiclock FSMs for modeling large scale systems. MEMOCODE 2007: 3-12 - [c23]Roopak Sinha, Partha S. Roop, Samik Basu:
A Model Checking Approach to Protocol Conversion. SLA++P@ETAPS 2007: 81-94 - 2006
- [j6]Ivan Radojevic, Zoran A. Salcic, Partha S. Roop:
Modeling Embedded Systems: From SystemC and Esterel to DFCharts. IEEE Des. Test Comput. 23(5): 348-358 (2006) - [j5]Zoran A. Salcic, Dong Hui, Partha S. Roop, Morteza Biglari-Abhari:
HiDRA - A reactive multiprocessor architecture for heterogeneous embedded systems. Microprocess. Microsystems 30(2): 72-85 (2006) - [c22]Flavius Gruian, Partha S. Roop, Zoran A. Salcic, Ivan Radojevic:
The SystemJ approach to system-level design. MEMOCODE 2006: 149-158 - [c21]Zoran A. Salcic, Flavius Gruian, Partha S. Roop, Alif Wahid:
A Scheduler Support Unit for Reactive Microprocessors. RTCSA 2006: 368-372 - [c20]Ivan Radojevic, Zoran A. Salcic, Partha S. Roop:
Design of Heterogeneous Embedded Systems Using DFCharts Model of Computation. VLSI Design 2006: 461-464 - [c19]Samik Basu, Partha S. Roop, Roopak Sinha:
Local Module Checking for CTL Specifications. FESCA@ETAPS 2006: 125-141 - 2005
- [j4]Ivan Radojevic, Zoran A. Salcic, Partha S. Roop:
A New Model for Heterogeneous Embedded Systems - What Esterel and SyncCharts Need to Become a Suitable Specification Platform. Int. J. Softw. Eng. Knowl. Eng. 15(2): 405-410 (2005) - [c18]Zoran A. Salcic, Dong Hui, Partha S. Roop, Morteza Biglari-Abhari:
REMIC: design of a reactive embedded microprocessor core. ASP-DAC 2005: 977-981 - [c17]Ivan Radojevic, Zoran A. Salcic, Partha S. Roop:
Modelling Heterogeneous Embedded Systems in DFCarts. FDL 2005: 441-453 - [c16]Robi Malik, Partha S. Roop:
Adaptive Techniques for Specification Matching in Embedded Systems: A Comparative Study. IFM 2005: 33-52 - [c15]Roopak Sinha, Partha S. Roop, Bakhadyr Khoussainov:
Adaptive Verification using Forced Simulation. FESCA@ETAPS 2005: 171-197 - 2004
- [j3]Zoran A. Salcic, Partha S. Roop, Morteza Biglari-Abhari, Abbas Bigdeli:
REFLIX: a processor core with native support for control-dominated embedded applications. Microprocess. Microsystems 28(1): 13-25 (2004) - [c14]Zoran A. Salcic, Partha S. Roop, Dong Hui, Ivan Radojevic:
HiDRA: A New Architecture for Heterogeneous Embedded Systems. ESA/VLSI 2004: 164-170 - [c13]Partha S. Roop, Zoran A. Salcic, M. W. Sajeewa Dayaratne:
Towards direct execution of esterel programs on reactive processors. EMSOFT 2004: 240-248 - [c12]Zoran A. Salcic, Partha S. Roop:
Customizing Processor Cores to Support Reactivity. ERSA 2004: 194-202 - 2003
- [c11]Partha S. Roop, Zoran A. Salcic, Morteza Biglari-Abhari, Abbas Bigdeli:
A New Reactive Processor with Architectural Support for Control Dominated Embedded Systems. VLSI Design 2003: 189-194 - [c10]Rick Mugridge, Bruce A. MacDonald, Partha S. Roop:
A Customer Test Generator for Web-Based Systems. XP 2003: 189-197 - [c9]Rick Mugridge, Bruce A. MacDonald, Partha S. Roop, Ewan D. Tempero:
Five Challenges in Teaching XP. XP 2003: 406-409 - 2002
- [c8]Zoran A. Salcic, Partha S. Roop, Morteza Biglari-Abhari, Abbas Bigdeli:
REFLIX: A Processor Core for Reactive Embedded Applications. FPL 2002: 945-945 - [c7]Partha S. Roop, Arcot Sowmya, S. Ramesh:
k-time Forced Simulation: A Formal Verification Technique for IP Reuse. ICCD 2002: 50-55 - 2001
- [j2]Partha S. Roop, Arcot Sowmya, S. Ramesh:
Forced simulation: A technique for automating component reuse in embedded systems. ACM Trans. Design Autom. Electr. Syst. 6(4): 602-628 (2001) - [c6]Partha S. Roop, Arcot Sowmya, S. Ramesh:
A formal approach to component based development of synchronous programs. ASP-DAC 2001: 421-424 - 2000
- [b1]Partha S. Roop:
Forced simulation: a formal approach to component based development of embedded systems. University of New South Wales, Sydney, Australia, 2000 - [c5]Partha S. Roop, Arcot Sowmya, S. Ramesh:
Automated Component Adaptation by Forced Simulation. ACAC 2000: 74-81 - [c4]Partha S. Roop, Arcot Sowmya, S. Ramesh:
Automatic Component Matching Using Forced Simulation. VLSI Design 2000: 64-69
1990 – 1999
- 1998
- [c3]Partha S. Roop, Arcot Sowmya:
Hidden time model for specification and verification of embedded systems. ECRTS 1998: 98-105 - [c2]Partha S. Roop, Arcot Sowmya:
CFSMcharts: A New Language for Microprocessor Based system Design. VLSI Design 1998: 342-346 - 1996
- [j1]Raj S. Mitra, Partha S. Roop, Anupam Basu:
A new algorithm for implementation of design functions by available devices. IEEE Trans. Very Large Scale Integr. Syst. 4(2): 170-180 (1996) - 1995
- [c1]Raj S. Mitra, Partha S. Roop, Anupam Basu:
Implementation of design functions by available devices: a new algorithm. VLSI Design 1995: 30-35
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-11-30 01:11 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
