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ORCIDEmbedded Systems Letters, Volume 2
Volume 2, Number 1, March 2010
- Li Hsien Yoong, Partha S. Roop:
Verifying IEC 61499 Function Blocks Using Esterel. 1-4 - Paolo Meloni
, Simone Secchi, Luigi Raffo:
An FPGA-Based Framework for Technology-Aware Prototyping of Multicore Embedded Architectures. 5-9 - Ashish Shenoy, Jeff Hiner, Susan Lysecky, Roman L. Lysecky, Ann Gordon-Ross:
Evaluation of Dynamic Profiling Methodologies for Optimization of Sensor Networks. 10-13
Volume 2, Number 2, June 2010
- Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan, Supriya Sathyanarayana:
Hierarchical Additive Hough Transform for Lane Detection. 23-26 - Giovanni Danese, Mauro Giachero, Francesco Leporati, Alessandra Majani, Nelson Nazzicari, C. Virgili:
A Video Elaboration System for Image Deinterlacing and Processing in Race Cars. 27-30 - Yasser Shoukry, M. Watheq El-Kharashi, Sherif Hammad:
MPC-On-Chip: An Embedded GPC Coprocessor for Automotive Active Suspension Systems. 31-34 - Jonas Rox, Kerstin Schmidt, A. Winter, Thomas Spengler, Rolf Ernst:
Estimating and Mitigating Design Risk in a Flexible Distributed Design Process. 35-38 - Cristiano Spelta, Vincenzo Manzoni, Andrea Corti, A. Goggi, Sergio M. Savaresi:
Smartphone-Based Vehicle-to-Driver/Environment Interaction System for Motorcycles. 39-42
Volume 2, Number 3, September 2010
- Xi Jin, Nan Guan, Mingsong Lv, Qingxu Deng:
Improving the Performance of Shared Memory Communication in Impulse C. 49-52 - Ulrich Kühne, Daniel Große, Rolf Drechsler:
Towards Fully Automatic Synthesis of Embedded Software. 53-57 - Bridget Benson, Ying Li, Brian Faunce, Kenneth Domond, Don Kimball, Curt Schurgers, Ryan Kastner:
Design of a Low-Cost Underwater Acoustic Modem. 58-61 - Kwangok Jeong, Andrew B. Kahng, Binshan Lin, Kambiz Samadi:
Accurate Machine-Learning-Based On-Chip Router Modeling. 62-66 - Issam Hammad, Kamal El-Sankary, Ezz I. El-Masry:
High-Speed AES Encryptor With Efficient Merging Techniques. 67-71 - Abhinav Agarwal, Man Cheuk Ng, Arvind:
A Comparative Evaluation of High-Level Hardware Synthesis Using Reed-Solomon Decoder. 72-76 - Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin:
Multi-Optical Network-on-Chip for Large Scale MPSoC. 77-80 - Se Hun Kim, S. Mukohopadhyay, Marilyn Wolf:
System-Level Energy Optimization for Error-Tolerant Image Compression. 81-84 - Yong Zou, Sudeep Pasricha:
NARCO: Neighbor Aware Turn Model-Based Fault Tolerant Routing for NoCs. 85-89
Volume 2, Number 4, December 2010
- Mohamed M. Sabry, José L. Ayala, David Atienza:
Thermal-Aware Compilation for Register Window-Based Embedded Processors. 103-106 - Cristiana Bolchini, Chiara Sandionigi:
Fault Classification for SRAM-Based FPGAs in the Space Environment for Fault Mitigation. 107-110 - Kostas Siozios, Dimitrios Soudris:
A Methodology for Alleviating the Performance Degradation of TMR Solutions. 111-114 - Rami A. Abdallah, Naresh R. Shanbhag:
Minimum-Energy Operation Via Error Resiliency. 115-118 - Serge Midonnet, Damien Masson, R. Lassalle:
Slack-Time Computation for Temporal Robustness in Embedded Systems. 119-122 - Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala, Wim Vanderbauwhede:
Radiation-Hardened Reconfigurable Array With Instruction Roll-Back. 123-126 - Karthik Shankar, Roman L. Lysecky:
Control Focused Soft Error Detection for Embedded Applications. 127-130
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