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2020 – today
- 2024
- [j105]Mudasar Basha, Munuswamy Siva Kumar, Mangali Chinna Chinnaiah, Siew-Kei Lam, Thambipillai Srikanthan, Narambhatla Janardhan, Dodde Hari Krishna, Sanjay Dubey:
Hardware Schemes for Smarter Indoor Robotics to Prevent the Backing Crash Framework Using Field Programmable Gate Array-Based Multi-Robots. Sensors 24(6): 1724 (2024) - [j104]Mudasar Basha, Munuswamy Siva Kumar, Mangali Chinna Chinnaiah, Siew-Kei Lam, Thambipillai Srikanthan, G. Divya Vani, Narambhatla Janardhan, Dodde Hari Krishna, Sanjay Dubey:
A Versatile Approach for Adaptive Grid Mapping and Grid Flex-Graph Exploration with a Field-Programmable Gate Array-Based Robot Using Hardware Schemes. Sensors 24(9): 2775 (2024) - [c198]Changshuo Wang, Meiqing Wu, Siew-Kei Lam, Xin Ning, Shangshu Yu, Ruiping Wang, Weijun Li, Thambipillai Srikanthan:
GPSFormer: A Global Perception and Local Structure Fitting-Based Transformer for Point Cloud Understanding. ECCV (8) 2024: 75-92 - [c197]Do Van Minh, Meiqing Wu, Siew-Kei Lam, Thambipillai Srikanthan:
Achieving Real-time Visual Tracking with Low-Cost Edge AI. ICCPS 2024: 279-280 - [i1]Changshuo Wang, Meiqing Wu, Siew-Kei Lam, Xin Ning, Shangshu Yu, Ruiping Wang, Weijun Li, Thambipillai Srikanthan:
GPSFormer: A Global Perception and Local Structure Fitting-based Transformer for Point Cloud Understanding. CoRR abs/2407.13519 (2024) - 2023
- [j103]Mudasar Basha, Munuswamy Siva Kumar, Mangali Chinna Chinnaiah, Siew-Kei Lam, Thambipillai Srikanthan, Narambhatla Janardhan, Dodde Hari Krishna, Sanjay Dubey:
A Versatile Approach to Polygonal Object Avoidance in Indoor Environments with Hardware Schemes Using an FPGA-Based Multi-Robot. Sensors 23(23): 9480 (2023) - [c196]Srivatsan Chandrasekar, Siew-Kei Lam, Srikanthan Thambipillai:
DNN Model Theft Through Trojan Side-Channel on Edge FPGA Accelerator. ARC 2023: 146-158 - 2022
- [j102]Yalan Wu, Jigang Wu, Peng Liu, Yinhe Han, Thambipillai Srikanthan:
Reconfiguration algorithms for synchronous communication on switch based degradable arrays. Parallel Comput. 111: 102901 (2022) - [c195]Guiyuan Jiang, Peilan He, Jigang Wu, Yidan Sun, Thambipillai Srikanthan:
Traffic Speed Prediction of Road Cluster with Heterogeneous Sampling Frequency. PAAP 2022: 1-6 - 2021
- [j101]Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, Muhammad Shafique:
Longevity Framework: Leveraging Online Integrated Aging-Aware Hierarchical Mapping and VF-Selection for Lifetime Reliability Optimization in Manycore Processors. IEEE Trans. Computers 70(7): 1106-1119 (2021) - [j100]Kalindu Herath, Alok Prakash, Suhaib A. Fahmy, Thambipillai Srikanthan:
Power-Efficient Mapping of Large Applications on Modern Heterogeneous FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(12): 2508-2521 (2021) - [c194]Deshya Wijesundera, Thilina Perera, Dilina Dehigama, Thambipillai Srikanthan:
Incorporating Compiler Optimization in Software Estimation for FPGA-based Embedded Processors. ICICT 2021: 137-141 - [c193]Thilina Perera, Lahiru Wijerathna, Deshya Wijesundera, Thambipillai Srikanthan:
Road-network aware Dynamic Workload Balancing Technique for Real-time Route Generation in On-Demand Public Transit. SSCI 2021: 1-8 - 2020
- [j99]Jiaxing Li, Jigang Wu, Guiyuan Jiang, Thambipillai Srikanthan:
Blockchain-based public auditing for big data in cloud storage. Inf. Process. Manag. 57(6): 102382 (2020) - [j98]Manaar Alam, Debdeep Mukhopadhyay, Sai Praveen Kadiyala, Siew-Kei Lam, Thambipillai Srikanthan:
Improving accuracy of HPC-based malware classification for embedded platforms using gradient descent optimization. J. Cryptogr. Eng. 10(4): 289-303 (2020) - [j97]Sai Praveen Kadiyala, Manaar Alam, Yash Shrivastava, Sikhar Patranabis, Muhamed Fauzi Bin Abbas, Arnab Kumar Biswas, Debdeep Mukhopadhyay, Thambipillai Srikanthan:
LAMBDA: Lightweight Assessment of Malware for emBeddeD Architectures. ACM Trans. Embed. Comput. Syst. 19(4): 23:1-23:31 (2020) - [j96]Sai Praveen Kadiyala, Pranav Jadhav, Siew-Kei Lam, Thambipillai Srikanthan:
Hardware Performance Counter-Based Fine-Grained Malware Detection. ACM Trans. Embed. Comput. Syst. 19(5): 38:1-38:17 (2020) - [j95]Kratika Garg, Nirmala Ramakrishnan, Alok Prakash, Thambipillai Srikanthan:
Rapid and Robust Background Modeling Technique for Low-Cost Road Traffic Surveillance Systems. IEEE Trans. Intell. Transp. Syst. 21(5): 2204-2215 (2020) - [c192]Deshya Wijesundera, Kushagra Shah, Kisaru Liyanage, Alok Prakash, Thambipillai Srikanthan, Thilina Perera:
Technique for Vendor and Device Agnostic Hardware Area-Time Estimation. ARC 2020: 166-177 - [c191]Kuldeep Sharma, Nirmala Ramakrishnan, Alok Prakash, Siew Kei Lam, Thambipillai Srikanthan:
Evaluating the Merits of Ranking in Structured Network Pruning. ICDCS 2020: 1389-1396 - [c190]Alok Prakash, Nirmala Ramakrishnan, Kratika Garg, Thambipillai Srikanthan:
Accelerating Computer Vision Algorithms on Heterogeneous Edge Computing Platforms. SiPS 2020: 1-6 - [c189]Sai Praveen Kadiyala, Mohit Garg, Manaar Alam, Hau T. Ngo, Debdeep Mukhopadhyay, Thambipillai Srikanthan:
HARDY: Hardware based Analysis for malwaRe Detection in embedded sYstems. SoCC 2020: 1-6
2010 – 2019
- 2019
- [j94]George Rosario Jagadeesh, Thambipillai Srikanthan:
Fast Computation of Clustered Many-to-many Shortest Paths and Its Application to Map Matching. ACM Trans. Spatial Algorithms Syst. 5(3): 17:1-17:20 (2019) - [c188]Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, Muhammad Shafique:
LifeGuard: A Reinforcement Learning-Based Task Mapping Strategy for Performance-Centric Aging Management. DAC 2019: 179 - [c187]Thilina Perera, Alok Prakash, Thambipillai Srikanthan:
Genetic Algorithm based EV Scheduling for On-Demand Public Transit System. ICCS (5) 2019: 595-603 - [c186]Deshya Wijesundera, Kisaru Liyanage, Alok Prakash, Thambipillai Srikanthan, Thilina Perera:
An Iterative Technique for Runtime Efficient Hardware-Software Partitioning. FPT 2019: 403-406 - [c185]Deshya Wijesundera, Nadeeshan Dissanayake, Alok Prakash, Thambipillai Srikanthan, Damith Anhettigama:
Dependency-Aware Clustering for Variable-Grained Hardware-Software Partitioning. FPT 2019: 411-414 - [c184]Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, Muhammad Shafique:
Towards Scalable Lifetime Reliability Management for Dark Silicon Manycore Systems. IOLTS 2019: 204-207 - [c183]Thilina Perera, Alok Prakash, Thambipillai Srikanthan:
Genetic Algorithm based Dynamic Scheduling of EV in a Demand Responsive Bus Service for First Mile Transit. ITSC 2019: 3322-3327 - [c182]Thilina Perera, Alok Prakash, Deshya Wijesundera, Thambipillai Srikanthan, Chathura Nagoda Gamage:
Cluster-First, Route-Second Heuristic for EV Scheduling in On-Demand Public Transit. CIS/RAM 2019: 176-181 - [c181]Sai Praveen Kadiyala, Vikram Kumar Pudi, Mohit Garg, Hau T. Ngo, Siew-Kei Lam, Thambipillai Srikanthan:
Hardware Efficient NIPALS Architecture for Principal Component Analysis of Hyper Spectral Images. SoCC 2019: 224-229 - [c180]Kratika Garg, Nirmala Ramakrishnan, Alok Prakash, Thambipillai Srikanthan, Punit Bhatt:
Rapid Technique to Eliminate Moving Shadows for Accurate Vehicle Detection. WACV 2019: 1970-1978 - 2018
- [j93]Jigang Wu, Long Chen, Xu Wang, Guiyuan Jiang, Siew-Kei Lam, Thambipillai Srikanthan:
Algorithms for Replica Placement and Update in Tree Network. Comput. J. 61(2): 273-287 (2018) - [j92]Supriya Sathyanarayana, Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan:
Vision-based patient monitoring: a comprehensive review of algorithms and technologies. J. Ambient Intell. Humaniz. Comput. 9(2): 225-251 (2018) - [j91]Deshya Wijesundera, Alok Prakash, Thambipillai Srikanthan, Achintha Ihalage:
Framework for Rapid Performance Estimation of Embedded Soft Core Processors. ACM Trans. Reconfigurable Technol. Syst. 11(2): 9:1-9:21 (2018) - [j90]Alok Prakash, Christopher T. Clarke, Siew-Kei Lam, Thambipillai Srikanthan:
Rapid Memory-Aware Selection of Hardware Accelerators in Programmable SoC Design. IEEE Trans. Very Large Scale Integr. Syst. 26(3): 445-456 (2018) - [c179]Kalindu Herath, Alok Prakash, Thambipillai Srikanthan:
Performance Estimation of FPGA Modules for Modular Design Methodology Using Artificial Neural Network. ARC 2018: 105-118 - [c178]R. Rohith, Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, Siew-Kei Lam:
LifeSim: A lifetime reliability simulator for manycore systems. CCWC 2018: 375-381 - [c177]Manaar Alam, Debdeep Mukhopadhyay, Sai Praveen Kadiyala, Siew Kei Lam, Thambipillai Srikanthan:
Side-Channel Assisted Malware Classifier with Gradient Descent Correction for Embedded Platforms. PROOFS 2018: 1-15 - [c176]Vijeta Rathore, Vivek Chaturvedi, Amit Kumar Singh, Thambipillai Srikanthan, R. Rohith, Siew-Kei Lam, Muhammad Shafique:
HiMap: A hierarchical mapping approach for enhancing lifetime reliability of dark silicon manycore systems. DATE 2018: 991-996 - [c175]Deshya Wijesundera, Alok Prakash, Thilina Perera, Kalindu Herath, Thambipillai Srikanthan:
Wibheda: Framework for Data Dependency-Aware Multi-Constrained Hardware-Software Partitioning in FPGA-Based SoCs for IoT Devices. FCCM 2018: 213 - [c174]Deshya Wijesundera, Alok Prakash, Thilina Perera, Kalindu Herath, Thambipillai Srikanthan:
Wibheda+: Framework for Data Dependency-aware Multi-constrained Hardware-Software Partitioning in FPGA-based SoCs for IoT Applications. HEART 2018: 3:1-3:6 - [c173]Thilina Perera, Alok Prakash, Thambipillai Srikanthan:
A Hybrid Methodology for Optimal Fleet Management in an Electric Vehicle Based Flexible Bus Service. ICARCV 2018: 331-336 - [c172]Thilina Perera, Alok Prakash, Chathura Nagoda Gamage, Thambipillai Srikanthan:
Hybrid Genetic Algorithm for an On-Demand First Mile Transit System Using Electric Vehicles. ICCS (1) 2018: 98-113 - [c171]Kalindu Herath, Alok Prakash, Udaree Kanewala, Thambipillai Srikanthan:
Communication-Aware Module Placement for Power Reduction in Large FPGA Designs. ISVLSI 2018: 209-214 - [c170]Thilina Perera, Chathura Nagoda Gamage, Alok Prakash, Thambipillai Srikanthan:
A Simulation Framework for a Real-Time Demand Responsive Public Transit System. ITSC 2018: 608-613 - [c169]Kalindu Herath, Alok Prakash, Guiyuan Jiang, Thambipillai Srikanthan:
Ant Colony Optimization based Module Footprint Selection and Placement for Lowering Power in Large FPGA Designs. ReConFig 2018: 1-8 - 2017
- [j89]George Rosario Jagadeesh, Thambipillai Srikanthan:
Online Map-Matching of Noisy and Sparse Location Data With Hidden Markov and Route Choice Models. IEEE Trans. Intell. Transp. Syst. 18(9): 2423-2434 (2017) - [j88]Meiqing Wu, Siew-Kei Lam, Thambipillai Srikanthan:
A Framework for Fast and Robust Visual Odometry. IEEE Trans. Intell. Transp. Syst. 18(12): 3433-3448 (2017) - [c168]Muhamed Fauzi Bin Abbas, Thambipillai Srikanthan:
Low-Complexity Signature-Based Malware Detection for IoT Devices. ATIS 2017: 181-189 - [c167]Nirmala Ramakrishnan, Alok Prakash, Thambipillai Srikanthan:
Low-Complexity Global Motion Estimation for Aerial Vehicles. CVPR Workshops 2017: 402-410 - [c166]Kalindu Herath, Alok Prakash, Guiyuan Jiang, Thambipillai Srikanthan:
Communication-aware Partitioning for Energy Optimization of Large FPGA Designs. ACM Great Lakes Symposium on VLSI 2017: 407-410 - [c165]Deshya Wijesundera, Achintha Ihalage, Alok Prakash, Thambipillai Srikanthan:
High Speed Performance Estimation of Embedded Hard-core Processors in FPGA-based SoCs. HEART 2017: 2:1-2:6 - [c164]Yalan Wu, Jigang Wu, Yuqing Miu, Thambipillai Srikanthan:
Fault-Driven Reconfiguration Algorithm for Processor Arrays. ISPA/IUCC 2017: 519-524 - [c163]Kratika Garg, Alok Prakash, Thambipillai Srikanthan:
Low complexity techniques for robust real-time traffic incident detection. ITSC 2017: 1-8 - 2016
- [j87]Wenjun Shi, Jigang Wu, Siew Kei Lam, Thambipillai Srikanthan:
Algorithms for bi-objective multiple-choice hardware/software partitioning. Comput. Electr. Eng. 50: 127-142 (2016) - [j86]Nirmala Ramakrishnan, Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan:
Enhanced low-complexity pruning for corner detection. J. Real Time Image Process. 12(1): 197-213 (2016) - [j85]Bin Zhou, Wei Zhang, Thambipillai Srikanthan, Jason Teo Kian Jin, Vivek Chaturvedi, Tao Luo:
Cost-efficient Acceleration of Hardware Trojan Detection Through Fan-Out Cone Analysis and Weighted Random Pattern Technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(5): 792-805 (2016) - [c162]Deshya Wijesundera, Alok Prakash, Thambipillai Srikanthan:
Rapid design space exploration for soft core processor customization and selection. FPT 2016: 185-188 - [c161]Vijeta Rathore, Vivek Chaturvedi, Thambipillai Srikanthan:
Performance Constraint-Aware Task Mapping to Optimize Lifetime Reliability of Manycore Systems. ACM Great Lakes Symposium on VLSI 2016: 377-380 - [c160]Renfei Gao, Jigang Wu, Guiyuan Jiang, Siew Kei Lam, Thambipillai Srikanthan:
Reducing Access Latency in Virtual Machine Assignments. HPCC/SmartCity/DSS 2016: 616-622 - [c159]Vikramkumar Pudi, Anupam Chattopadhyay, Thambipillai Srikanthan:
Modified projected Landweber method for Compressive-Sensing reconstruction of images with non-orthogonal matrices. ISIC 2016: 1-4 - [c158]Anupam Chattopadhyay, Vikramkumar Pudi, Anubhab Baksi, Thambipillai Srikanthan:
FPGA Based Cyber Security Protocol for Automated Traffic Monitoring Systems: Proposal and Implementation. ISVLSI 2016: 18-23 - [c157]Meiqing Wu, Chengju Zhou, Thambipillai Srikanthan:
Robust and low complexity obstacle detection and tracking. ITSC 2016: 1249-1254 - [c156]George Rosario Jagadeesh, Thambipillai Srikanthan:
Heuristic optimizations for high-speed low-latency online map matching with probabilistic sequence models. ITSC 2016: 2565-2570 - [c155]Deshya Wijesundera, Alok Prakash, Siew Kei Lam, Thambipillai Srikanthan:
Exploiting Configuration Dependencies for Rapid Area-efficient Customization of Soft-core Processors. SCOPES 2016: 163-172 - [c154]Kratika Garg, Siew Kei Lam, Thambipillai Srikanthan, Vedika Agarwal:
Real-time road traffic density estimation using block variance. WACV 2016: 1-9 - 2015
- [j84]Pramod Kumar Meher, Basant Kumar Mohanty, Sujit Kumar Patel, Soumya Ganguly, Thambipillai Srikanthan:
Efficient VLSI Architecture for Decimation-in-Time Fast Fourier Transform of Real-Valued Data. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(12): 2836-2845 (2015) - [j83]Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan:
Nonparametric Technique Based High-Speed Road Surface Detection. IEEE Trans. Intell. Transp. Syst. 16(2): 874-884 (2015) - [j82]Guiyuan Jiang, Jigang Wu, Siew Kei Lam, Thambipillai Srikanthan, Jizhou Sun:
Algorithmic aspects of graph reduction for hardware/software partitioning. J. Supercomput. 71(6): 2251-2274 (2015) - [c153]Xu Wang, Jigang Wu, Guiyuan Jiang, Siew Kei Lam, Thambipillai Srikanthan:
Fast Replica Placement and Update Strategies in Tree Networks. CCGRID 2015: 915-920 - [c152]Supriya Sathyanarayana, Ravi Kumar Satzoda, Thambipillai Srikanthan, Suchitra Sathyanarayana:
Compute-efficient eye state detection: algorithm, dataset and evaluations. ICDSC 2015: 187-192 - [c151]Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan:
Rapid estimation of DSPs utilization for efficient high-level synthesis. DSP 2015: 1261-1265 - [c150]Vivek Chaturvedi, Basant K. Mohanty, Thambipillai Srikanthan:
Leakage-aware intra-task dynamic voltage scaling technique for energy reduction in real-time embedded systems. DSP 2015: 1266-1269 - [c149]Basant K. Mohanty, Vivek Chaturvedi, Vijeta Rathore, Thambipillai Srikanthan:
Memory-access aware work-load distribution for peak-temperature reduction of 3D multi-core embedded systems. DSP 2015: 1270-1273 - [c148]Supriya Sathyanarayana, Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan:
Identifying epileptic seizures based on a template-based eyeball detection technique. ICIP 2015: 4689-4693 - [c147]Basant K. Mohanty, Pramod Kumar Meher, Thambipillai Srikanthan:
Critical-path optimization for efficient hardware realization of lifting and flipping DWTs. ISCAS 2015: 1186-1189 - [c146]George Rosario Jagadeesh, Thambipillai Srikanthan:
Probabilistic Map Matching of Sparse and Noisy Smartphone Location Data. ITSC 2015: 812-817 - [c145]Nirmala Ramakrishnan, Thambipillai Srikanthan, Siew Kei Lam, Gauri Ravindra Tulsulkar:
Adaptive Window Strategy for High-Speed and Robust KLT Feature Tracker. PSIVT 2015: 355-367 - [c144]Kratika Garg, Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan:
KnapSim - Run-time efficient hardware-software partitioning technique for FPGAs. SoCC 2015: 64-69 - 2014
- [j81]Sharad Sinha, Thambipillai Srikanthan:
IP-Enabled C/C++ Based High Level Synthesis: A Step towards Better Designer Productivity and Design Performance. Int. J. Reconfigurable Comput. 2014: 418750:1-418750:17 (2014) - [j80]Sharad Sinha, Thambipillai Srikanthan:
Architecture and Application-Aware Management of Complexity of Mapping Multiplication to FPGA DSP Blocks in High Level Synthesis. Int. J. Reconfigurable Comput. 2014: 564924:1-564924:14 (2014) - [j79]Jigang Wu, Yuanbo Zhu, Zhipeng Niu, Thambipillai Srikanthan:
Constructing Low-temperature sub-Arrays on Reconfigurable VLSI Arrays. J. Circuits Syst. Comput. 23(5) (2014) - [j78]Sharad Sinha, Udit Dhawan, Thambipillai Srikanthan:
Extended Compatibility Path Based Hardware binding: an Adaptive Algorithm for High Level synthesis of Area-Time Efficient Designs. J. Circuits Syst. Comput. 23(9) (2014) - [j77]Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan:
Addressing Productivity Challenges in Domain-Specific Reconfigurable Platforms: A Case Study on Extended Kalman Filter-Based Motor Control. J. Low Power Electron. 10(3): 455-466 (2014) - [j76]Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke:
Rapid evaluation of custom instruction selection approaches with FPGA estimation. ACM Trans. Embed. Comput. Syst. 13(4): 75:1-75:29 (2014) - [j75]Jigang Wu, Guiyuan Jiang, Yuze Shen, Siew Kei Lam, Jizhou Sun, Thambipillai Srikanthan:
Parallel reconfiguration algorithms for mesh-connected processor arrays. J. Supercomput. 69(2): 610-628 (2014) - [j74]Sharad Sinha, Thambipillai Srikanthan:
Dataflow Graph Partitioning for Area-Efficient High-Level Synthesis with Systems Perspective. ACM Trans. Design Autom. Electr. Syst. 20(1): 5:1-5:18 (2014) - [j73]Jigang Wu, Thambipillai Srikanthan, Guiyuan Jiang, Kai Wang:
Constructing Sub-Arrays with ShortInterconnects from Degradable VLSI Arrays. IEEE Trans. Parallel Distributed Syst. 25(4): 929-938 (2014) - [j72]Siew Kei Lam, Christopher T. Clarke, Thambipillai Srikanthan:
Exploiting FPGA-Aware Merging of Custom Instructions for Runtime Reconfiguration. ACM Trans. Reconfigurable Technol. Syst. 7(3): 26:1-26:15 (2014) - [c143]Bin Zhou, Thambipillai Srikanthan, Wei Zhang:
Soft error mitigation through selection of noninvert implication paths. AHS 2014: 77-82 - [c142]Nirmala Ramakrishnan, Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan:
Automated thresholding for low-complexity corner detection. AHS 2014: 97-103 - [c141]Bin Zhou, Wei Zhang, Thambipillai Srikanthan, J. K. J. Teo:
A low cost acceleration method for hardware trojan detection based on fan-out cone analysis. CODES+ISSS 2014: 28:1-28:10 - [c140]Supriya Sathyanarayana, Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan:
A Compute-Efficient Algorithm for Robust Eyebrow Detection. CVPR Workshops 2014: 664-669 - [c139]Pramod Kumar Meher, Basant K. Mohanty, Thambipillai Srikanthan:
Area-delay efficient architecture for MP algorithm using reconfigurable inner-product circuits. ISCAS 2014: 2628-2631 - [c138]Nirmala Ramakrishnan, Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan:
Mask-based non-maximal suppression with iterative pruning for low-complexity corner detection. ISIC 2014: 368-371 - [c137]Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan, Tushar Shah:
Vision-based pedestrian tracking system using color and motion cue. ISIC 2014: 372-375 - [c136]Supriya Sathyanarayana, Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan:
Reducing computational complexity for face detection. ISIC 2014: 376-379 - [c135]George Rosario Jagadeesh, Thambipillai Srikanthan:
Robust real-time route inference from sparse vehicle position data. ITSC 2014: 296-301 - [c134]Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan:
Stereo based ROIs generation for detecting pedestrians in close proximity. ITSC 2014: 1929-1934 - [c133]Wenjun Shi, Jigang Wu, Siew Kei Lam, Thambipillai Srikanthan:
Algorithmic Aspects for Bi-Objective Multiple-Choice Hardware/Software Partitioning. PAAP 2014: 7-12 - [c132]Vivek Chaturvedi, Amit Kumar Singh, Wei Zhang, Thambipillai Srikanthan:
Thermal-aware task scheduling for peak temperature minimization under periodic constraint for 3D-MPSoCs. RSP 2014: 107-113 - 2013
- [j71]Amit Kumar Singh, Akash Kumar, Jigang Wu, Thambipillai Srikanthan:
CADSE: communication aware design space exploration for efficient run-time MPSoC management. Frontiers Comput. Sci. 7(3): 416-430 (2013) - [j70]Bo Liu, Siew Kei Lam, Thambipillai Srikanthan, Weiqi Yuan:
Iris Recognition Using Stable Dark Features. J. Comput. 8(1): 41-48 (2013) - [j69]Alok Prakash, Siew Kei Lam, Christopher T. Clarke, Thambipillai Srikanthan:
FPGA-aware techniques for rapid generation of profitable custom instructions. Microprocess. Microsystems 37(3): 259-269 (2013) - [j68]Feng Shao, Weisi Lin, Shanbo Gu, Gangyi Jiang, Thambipillai Srikanthan:
Perceptual Full-Reference Quality Assessment of Stereoscopic Images by Considering Binocular Visual Characteristics. IEEE Trans. Image Process. 22(5): 1940-1953 (2013) - [j67]Jigang Wu, Pu Wang, Siew Kei Lam, Thambipillai Srikanthan:
Efficient heuristic and tabu search for hardware/software partitioning. J. Supercomput. 66(1): 118-134 (2013) - [c131]Alok Prakash, Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke:
Modelling communication overhead for accessing local memories in hardware accelerators. ASAP 2013: 31-34 - [c130]Yuanbo Zhu, Jigang Wu, Siew Kei Lam, Thambipillai Srikanthan:
Preprocessing technique for accelerating reconfiguration of degradable VLSI arrays. ISCAS 2013: 2424-2427 - [c129]Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan:
Hardware-Software Codesign of EKF-Based Motor Control for Domain-Specific Reconfigurable Platform. ISED 2013: 93-97 - [c128]Gaurav Mishra, Yan Lin Aung, Meiqing Wu, Siew Kei Lam, Thambipillai Srikanthan:
Real-Time Image Resizing Hardware Accelerator for Object Detection Algorithms. ISED 2013: 98-102 - [c127]Suchitra Suchitra, Ravi Kumar Satzoda, Thambipillai Srikanthan:
Identifying lane types: A modular approach. ITSC 2013: 1929-1934 - [c126]Shantanu S. Sinha, Ravi Kumar Satzoda, S. Suchitra, Thambipillai Srikanthan:
Additive Hough Transform on embedded computing platforms. MWSCAS 2013: 1196-1199 - [c125]Supriya Sathyanarayana, Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan:
Block-Based Search Space Reduction Technique for Face Detection Using Shoulder and Head Curves. PSIVT 2013: 385-396 - 2012
- [j66]Jigang Wu, Qiqiang Sun, Thambipillai Srikanthan:
Algorithmic aspects for multiple-choice hardware/software partitioning. Comput. Oper. Res. 39(12): 3281-3292 (2012) - [j65]Bo Liu, Siew Kei Lam, Thambipillai Srikanthan, Weiqi Yuan:
Iris Recognition of Defocused Images for Mobile phones. Int. J. Pattern Recognit. Artif. Intell. 26(8) (2012) - [j64]Ashish Panda, Thambipillai Srikanthan:
Psychoacoustic Model Compensation for Robust Speaker Verification in Environmental Noise. IEEE Trans. Speech Audio Process. 20(3): 945-953 (2012) - [j63]Amit Kumar Singh, Akash Kumar, Thambipillai Srikanthan:
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs. ACM Trans. Design Autom. Electr. Syst. 18(1): 9:1-9:29 (2012) - [c124]Sharad Sinha, Thambipillai Srikanthan:
Dataflow graph partitioning for high level synthesis. FPL 2012: 503-506 - [c123]Alok Prakash, Christopher T. Clarke, Thambipillai Srikanthan:
Custom instructions with local memory elements without expensive DMA transfers. FPL 2012: 647-650 - [c122]Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan:
Area-time estimation of C-based functions for design space exploration. FPT 2012: 297-300 - [c121]Yuanbo Zhu, Jigang Wu, Siew Kei Lam, Thambipillai Srikanthan:
Reconfiguration Algorithms for Degradable VLSI Arrays with Switch Faults. ICPADS 2012: 356-361 - [c120]Bo Liu, Siew Kei Lam, Thambipillai Srikanthan, Weiqi Yuan:
Exploiting stable features for iris recognition of defocused images. ISCAS 2012: 97-100 - [c119]Meiqing Wu, Nirmala Ramakrishnan, Siew Kei Lam, Thambipillai Srikanthan:
Low-complexity pruning for accelerating corner detection. ISCAS 2012: 1684-1687 - [c118]Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan:
Robust extraction of lane markings using gradient angle histograms and directional signed edges. Intelligent Vehicles Symposium 2012: 754-759 - [c117]Suchitra Sathyanarayana, Ravi Kumar Satzoda, Thambipillai Srikanthan:
Detection & classification of arrow markings on roads using signed edge signatures. Intelligent Vehicles Symposium 2012: 796-801 - [c116]Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke:
Exploiting FPGA-aware merging of custom instructions for runtime reconfiguration. ReCoSoC 2012: 1-8 - 2011
- [j62]Tao Li, Jigang Wu, Yun Deng, Thambipillai Srikanthan, Xicheng Lu:
Accelerating identification of custom instructions for extensible processors. IET Circuits Devices Syst. 5(1): 21-32 (2011) - [j61]George Rosario Jagadeesh, Thambipillai Srikanthan, C. M. Lim:
Field programmable gate array-based acceleration of shortest-path computation. IET Comput. Digit. Tech. 5(4): 231-237 (2011) - [j60]Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke:
Architecture-Aware Technique for Mapping Area-Time Efficient Custom Instructions onto FPGAs. IEEE Trans. Computers 60(5): 680-692 (2011) - [j59]Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan:
A Modular Simulator Framework for Network-on-Chip Based Manycore Chips Using UNISIM. Trans. High Perform. Embed. Archit. Compil. 4: 234-253 (2011) - [j58]Xiongfei Liao, Thambipillai Srikanthan:
Accelerating UNISIM-Based Cycle-Level Microarchitectural Simulations on Multicore Platforms. ACM Trans. Design Autom. Electr. Syst. 16(3): 26:1-26:25 (2011) - [c115]Amit Kumar Singh, Akash Kumar, Thambipillai Srikanthan:
A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs. CASES 2011: 175-184 - [c114]George Rosario Dhinesh, George Rosario Jagadeesh, Thambipillai Srikanthan:
A Low-Complexity Speaker-and-Word Recognition Application for Resource-Constrained Devices. ISED 2011: 335-340 - [c113]Sharad Sinha, Udit Dhawan, Siew Kei Lam, Thambipillai Srikanthan:
A Novel Binding Algorithm to Reduce Critical Path Delay During High Level Synthesis. ISVLSI 2011: 278-283 - [c112]Samarth Kaushik, Amit Kumar Singh, Thambipillai Srikanthan:
Preprocessing-Based Run-Time Mapping of Applications on NoC-based MPSoCs. ISVLSI 2011: 337-338 - [c111]Amit Kumar Singh, Akash Kumar, Thambipillai Srikanthan:
A Design Space Exploration Methodology for Application Specific MPSoC Design. ISVLSI 2011: 339-340 - [c110]Amit Kumar Singh, Akash Kumar, Wu Jigang, Thambipillai Srikanthan:
Communication-Aware Design Space Exploration for Efficient Run-Time MPSoC Management. PAAP 2011: 72-76 - [c109]Bo Liu, Siew Kei Lam, Thambipillai Srikanthan, Weiqi Yuan:
Utilizing Dark Features for Iris Recognition in Less Constrained Environments. PAAP 2011: 110-114 - [c108]Samarth Kaushik, Amit Kumar Singh, Wu Jigang, Thambipillai Srikanthan:
Run-Time Computation and Communication Aware Mapping Heuristic for NoC-Based Heterogeneous MPSoC Platforms. PAAP 2011: 203-207 - [c107]Lieu My Chuong, Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan, Chai-Soon Lim:
Automatic Compilation of C Applications for FPGA-Based Hardware Acceleration. PAAP 2011: 223-227 - [c106]Samarth Kaushik, Amit Kumar Singh, Thambipillai Srikanthan:
Computation and communication aware run-time mapping for NoC-based MPSoC platforms. SoCC 2011: 185-190 - [c105]Alok Prakash, Siew Kei Lam, Christopher T. Clarke, Thambipillai Srikanthan:
Instruction set customization for area-constrained FPGA designs. SoCC 2011: 329-334 - [c104]Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan:
Compiler-assisted technique for rapid performance estimation of FPGA-based processors. SoCC 2011: 341-346 - [c103]Jigang Wu, Song Jin, Haikun Ji, Thambipillai Srikanthan:
Algorithm for Time-dependent Shortest Safe Path on Transportation Networks. ICCS 2011: 958-966 - 2010
- [j57]Abhijit Ray, Thambipillai Srikanthan, Wu Jigang:
Rapid Techniques for Performance Estimation of Processors. J. Res. Pract. Inf. Technol. 42(2): 147-168 (2010) - [j56]Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan, Supriya Sathyanarayana:
Hierarchical Additive Hough Transform for Lane Detection. IEEE Embed. Syst. Lett. 2(2): 23-26 (2010) - [j55]Santanu Kumar Dash, Thambipillai Srikanthan:
Instruction cache tuning for embedded multitasking applications. IET Comput. Digit. Tech. 4(6): 439-457 (2010) - [j54]Amit Kumar Singh, Thambipillai Srikanthan, Akash Kumar, Wu Jigang:
Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platforms. J. Syst. Archit. 56(7): 242-255 (2010) - [j53]Tao Li, Wu Jigang, Siew Kei Lam, Thambipillai Srikanthan, Xicheng Lu:
Selecting profitable custom instructions for reconfigurable processors. J. Syst. Archit. 56(8): 340-351 (2010) - [j52]Jigang Wu, Thambipillai Srikanthan, Ting Lei:
Efficient heuristic algorithms for path-based hardware/software partitioning. Math. Comput. Model. 51(7-8): 974-984 (2010) - [j51]Wu Jigang, Thambipillai Srikanthan, Guang Chen:
Algorithmic Aspects of Hardware/Software Partitioning: 1D Search Algorithms. IEEE Trans. Computers 59(4): 532-544 (2010) - [j50]Jigang Wu, Thambipillai Srikanthan, Xiaogang Han:
Preprocessing and Partial Rerouting Techniques for Accelerating Reconfiguration of Degradable VLSI Arrays. IEEE Trans. Very Large Scale Integr. Syst. 18(2): 315-319 (2010) - [c102]Siew Kei Lam, Yun Deng, Jian Hu, Xilong Zhou, Thambipillai Srikanthan:
Hierarchical Loop Partitioning for Rapid Generation of Runtime Configurations. ARC 2010: 282-293 - [c101]Alok Prakash, Siew Kei Lam, Amit Kumar Singh, Thambipillai Srikanthan:
Architecture-Aware Custom Instruction Generation for Reconfigurable Processors. ARC 2010: 414-419 - [c100]Siew Kei Lam, Thambipillai Srikanthan:
Accelerating shortest path computations in hardware. CASE 2010: 63-68 - [c99]Amit Kumar Singh, Akash Kumar, Thambipillai Srikanthan, Yajun Ha:
Mapping real-life applications on run-time reconfigurable NoC-based MPSoC on FPGA. FPT 2010: 365-368 - [c98]Yan Lin Aung, Siew Kei Lam, Thambipillai Srikanthan:
Performance estimation framework for FPGA-based processors. FPT 2010: 413-416 - [c97]Song Yang, Siew Kei Lam, Thambipillai Srikanthan:
An efficient edge and corner detector. ICARCV 2010: 1628-1631 - [c96]Baofang Chang, Wu Jigang, Thambipillai Srikanthan, Lian Li:
A Novel Approach for Multilevel Fixed Outline Floorplanning. PAAP 2010: 59-62 - [c95]Amit Kumar Singh, Wu Jigang, Akash Kumar, Thambipillai Srikanthan:
Run-time mapping of multiple communicating tasks on MPSoC platforms. ICCS 2010: 1019-1026
2000 – 2009
- 2009
- [j49]Jigang Wu, Thambipillai Srikanthan, Kai Wang:
Minimizing interconnect length on reconfigurable meshes. Frontiers Comput. Sci. China 3(3): 315-321 (2009) - [j48]Siew Kei Lam, Huang Fan, Thambipillai Srikanthan, Wu Jigang:
Run-time management of custom instructions on a partially reconfigurable architecture. Int. J. Inf. Commun. Technol. 2(1/2): 50-59 (2009) - [j47]Siew Kei Lam, Thambipillai Srikanthan:
Rapid design of area-efficient custom instructions for reconfigurable embedded processing. J. Syst. Archit. 55(1): 1-14 (2009) - [j46]Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke:
Selecting Profitable Custom Instructions for Area-Time-Efficient Realization on Reconfigurable Architectures. IEEE Trans. Ind. Electron. 56(10): 3998-4005 (2009) - [j45]Suchitra Sathyanarayana, Ravi Kumar Satzoda, Thambipillai Srikanthan:
Exploiting Inherent Parallelisms for Accelerating Linear Hough Transform. IEEE Trans. Image Process. 18(10): 2255-2264 (2009) - [c94]Wu Jigang, Ting Lei, Thambipillai Srikanthan:
Efficient Approximate Algorithm for Hardware/Software Partitioning. ACIS-ICIS 2009: 261-265 - [c93]Tao Li, Wu Jigang, Siew Kei Lam, Thambipillai Srikanthan, Xicheng Lu:
Efficient Heuristic Algorithm for Rapid Custom-Instruction Selection. ACIS-ICIS 2009: 266-270 - [c92]Wu Jigang, Baofang Chang, Thambipillai Srikanthan:
A Hybrid Branch-and-Bound Strategy for Hardware/Software Partitioning. ACIS-ICIS 2009: 641-644 - [c91]Balasaravanan Venugopal, Gayathri Venkataraman, Thambipillai Srikanthan:
A Parallel Paths Communication Technique for Energy Efficient Wireless Sensor Networks. ADHOCNETS 2009: 64-78 - [c90]Amit Kumar Singh, Wu Jigang, Alok Prakash, Thambipillai Srikanthan:
Mapping Algorithms for NoC-Based Heterogeneous MPSoC Platforms. DSD 2009: 133-140 - [c89]Alok Prakash, Siew Kei Lam, Amit Kumar Singh, Thambipillai Srikanthan:
Rapid design exploration framework for application-aware customization of soft core processors. FPL 2009: 539-542 - [c88]Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan:
Gradient angle histograms for efficient linear Hough transform. ICIP 2009: 3273-3276 - [c87]Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan:
Techniques for Area-time Efficient Image Rotation. ISCAS 2009: 940-943 - [c86]Santanu Kumar Dash, Thambipillai Srikanthan:
Modeling RTOS Components for Instruction Cache Hit Rate Estimation. ISCAS 2009: 2978-2981 - [c85]Amit Kumar Singh, Wu Jigang, Alok Prakash, Thambipillai Srikanthan:
Efficient Heuristics for Minimizing Communication Overhead in NoC-based Heterogeneous MPSoC Platforms. IEEE International Workshop on Rapid System Prototyping 2009: 55-60 - [c84]Lieu My Chuong, Siew Kei Lam, Thambipillai Srikanthan:
Area-Time Estimation of Controller for Porting C-Based Functions onto FPGA. IEEE International Workshop on Rapid System Prototyping 2009: 145-151 - [c83]Santanu Kumar Dash, Thambipillai Srikanthan:
Instruction Cache Tuning for Embedded Multitasking Applications. IEEE International Workshop on Rapid System Prototyping 2009: 152-158 - 2008
- [j44]Wu Jigang, Thambipillai Srikanthan, Tao Jiao:
Algorithmic aspects for functional partitioning and scheduling in hardware/software co-design. Des. Autom. Embed. Syst. 12(4): 345-375 (2008) - [j43]Gayathri Venkataraman, Sabu Emmanuel, Thambipillai Srikanthan:
Energy-efficient cluster-based scheme for failure management in sensor networks. IET Commun. 2(4): 528-537 (2008) - [j42]Dipnarayan Guha, Thambipillai Srikanthan:
Compiler Back End Design for Translating Multi-radio Descriptions to Operating System-less Asynchronous Processor Datapaths. J. Comput. 3(1): 7-14 (2008) - [j41]Jigang Wu, Thambipillai Srikanthan, Guang-Wei Zou:
New Model and Algorithm for Hardware/Software Partitioning. J. Comput. Sci. Technol. 23(4): 644-651 (2008) - [j40]Jigang Wu, Thambipillai Srikanthan, Chengbin Yan:
Algorithmic aspects for power-efficient hardware/software partitioning. Math. Comput. Simul. 79(4): 1204-1215 (2008) - [j39]Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan:
Parallelizing the Hough Transform Computation. IEEE Signal Process. Lett. 15: 297-300 (2008) - [c82]Santanu Kumar Dash, Thambipillai Srikanthan:
Rapid estimation of instruction cache hit rates using loop profiling. ASAP 2008: 263-268 - [c81]George Rosario Jagadeesh, Siew Kei Lam, Thambipillai Srikanthan:
A Short Course on Implementing FPGA Based Digital Systems. ICPADS 2008: 741-744 - [c80]Abhijit Ray, Wu Jigang, Thambipillai Srikanthan:
Performance Estimation: IPC. ICYCS 2008: 189-193 - [c79]Wu Jigang, Thambipillai Srikanthan, Kai Wang:
Finding minimum interconnect sub-arrays in reconfigurable VLSI arrays. ISCAS 2008: 1352-1355 - [c78]Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan:
A temperature-aware virtual submesh allocation scheme for noc-based manycore chips. SPAA 2008: 182-184 - 2007
- [j38]Gayathri Venkataraman, Sabu Emmanuel, Thambipillai Srikanthan:
Size-restricted cluster formation and cluster maintenance technique for mobile ad hoc networks. Int. J. Netw. Manag. 17(2): 171-194 (2007) - [j37]Lieu My Chuong, Siew Kei Lam, Thambipillai Srikanthan:
Rapid Area-Time Estimation Technique for Porting C-based Applications onto FPGA platforms. Scalable Comput. Pract. Exp. 8(4) (2007) - [j36]Wu Jigang, Thambipillai Srikanthan, Xiaodong Wang:
Integrated Row and Column Rerouting for Reconfiguration of VLSI Arrays with Four-Port Switches. IEEE Trans. Computers 56(10): 1387-1400 (2007) - [j35]Bin Cao, Chip-Hong Chang, Thambipillai Srikanthan:
A Residue-to-Binary Converter for a New Five-Moduli Set. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(5): 1041-1049 (2007) - [c77]Siew Kei Lam, Thambipillai Srikanthan:
Estimating Area Costs of Custom Instructions for FPGA-based Reconfigurable Processors. ASAP 2007: 89-94 - [c76]Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan:
Temperature-Aware Submesh Allocation Scheme for Heat Balancing on Chip-Multiprocessors. ASAP 2007: 228-233 - [c75]Dipnarayan Guha, Thambipillai Srikanthan:
Reconfigurable Frame Parser Design for Multi-Radio Support on Asynchronous Microprocessor Cores. ICCTA 2007: 122-127 - [c74]Suchitra Sathyanarayana, Ravi Kumar Satzoda, Srikanthan Thambipillai:
Unified Cordic Based Processor for Image Processing. DSP 2007: 343-346 - [c73]Suchitra Sathyanarayana, Srikanthan Thambipillai, Christopher T. Clarke:
Real Time Tracking of Camera Motion Through Cylindrical Passages. DSP 2007: 455-458 - [c72]Ashish Panda, Neha Tripathi, Thambipillai Srikanthan:
Improved Spectral Subtraction Technique for Text-Independent Speaker Verification. DSP 2007: 595-598 - [c71]Ian McLoughlin, Douglas L. Maskell, Thambipillai Srikanthan, Wooi-Boon Goh:
An Embedded Systems graduate education for Singapore. ICPADS 2007: 1-5 - [c70]Gayathri Venkataraman, Sabu Emmanuel, Srikanthan Thambipillai:
A Cluster-Based Approach to Fault Detection and Recovery in Wireless Sensor Networks. ISWCS 2007: 35-39 - [c69]Wu Jigang, Thambipillai Srikanthan, Guang Chen:
One-dimensional Search Algorithms for Hardware/Software Partitioning. MEMOCODE 2007: 149-158 - 2006
- [j34]C. S. Lim, Siew Kei Lam, Hui Tian, Thambipillai Srikanthan:
Efficient Architectures for Segmentation of Endoscopic Images in Micro-Robotic Auto Navigation Systems. Int. J. Humanoid Robotics 3(4): 523-545 (2006) - [j33]Wu Jigang, Thambipillai Srikanthan:
Low-complex dynamic programming algorithm for hardware/software partitioning. Inf. Process. Lett. 98(2): 41-46 (2006) - [j32]Wu Jigang, Thambipillai Srikanthan:
An efficient algorithm for the collapsing knapsack problem. Inf. Sci. 176(12): 1739-1751 (2006) - [j31]Siew Kei Lam, Thambipillai Srikanthan, Christopher T. Clarke:
Rapid generation of custom instructions using predefined dataflow structures. Microprocess. Microsystems 30(6): 355-366 (2006) - [j30]Wu Jigang, Thambipillai Srikanthan:
Reconfiguration Algorithms for Power Efficient VLSI Subarrays with Four-Port Switches. IEEE Trans. Computers 55(3): 243-253 (2006) - [j29]Pramod Kumar Meher, Thambipillai Srikanthan, Jagdish Chandra Patra:
Scalable and modular memory-based systolic architectures for discrete Hartley transform. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(5): 1065-1077 (2006) - [j28]Wu Jigang, Thambipillai Srikanthan:
Algorithmic aspects of area-efficient hardware/software partitioning. J. Supercomput. 38(3): 223-235 (2006) - [c68]Wu Jigang, Thambipillai Srikanthan, Xiaodong Wang:
New Reconfiguration Algorithm for Degradable VLSI Arrays. APCCAS 2006: 1152-1155 - [c67]Yi Wang, Douglas L. Maskell, Jussipekka Leiwo, Thambipillai Srikanthan:
Unified Signed-Digit Number Adder for RSA and ECC Public-key Cryptosystems. APCCAS 2006: 1655-1658 - [c66]Yi Wang, Jussipekka Leiwo, Thambipillai Srikanthan, Luo Jianwen:
An Efficient Algorithm for DPA-resistent RSA. APCCAS 2006: 1659-1662 - [c65]Wu Jigang, Thambipillai Srikanthan:
Efficient Algorithms for Hardware/Software Partitioning to Minimize Hardware Area. APCCAS 2006: 1875-1878 - [c64]Dipnarayan Guha, Kugan Vivekanandarajah, Thambipillai Srikanthan:
Design considerations for multi-radio co-existence on asynchronous processors using LAD extensions. CISS 2006: 413 - [c63]Leipo Yan, Siew Kei Lam, Thambipillai Srikanthan, Wu Jigang:
Energy Efficient Cache Tuning with Performance Bound. DELTA 2006: 97-100 - [c62]Siew Kei Lam, Mohammed Shoaib, Thambipillai Srikanthan:
Modeling Arbitrator Delay-Area Dependencies in Customizable Instruction Set Processors. DELTA 2006: 237-242 - [c61]Wu Jigang, Thambipillai Srikanthan, Tao Jiao:
Efficient algorithm for functional scheduling in hardware/software co-design. FPT 2006: 65-72 - [c60]Siew Kei Lam, Bharathi N. Krishnan, Thambipillai Srikanthan:
Efficient management of custom instructions for run-time reconfigurable instruction set processors. FPT 2006: 261-264 - [c59]Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan:
Low Area-time Complexity Averaging Scheme for Thumbnail Generation. ICARCV 2006: 1-4 - [c58]Kugan Vivekanandarajah, Thambipillai Srikanthan, Christopher T. Clarke:
Profile Directed Instruction Cache Tuning for Embedded Systems. ISVLSI 2006: 277-282 - [c57]Yi Wang, Jussipekka Leiwo, Thambipillai Srikanthan, Yu Yu:
FPGA based DPA-resistant Unified Architecture for Signcryption. ITNG 2006: 571-572 - [c56]Leipo Yan, Thambipillai Srikanthan, Niu Gang:
Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures. LCTES 2006: 182-188 - 2005
- [j27]Wu Jigang, Thambipillai Srikanthan:
Power Efficient Sub-Array in Reconfigurable VLSI Meshes. J. Comput. Sci. Technol. 20(5): 647-653 (2005) - [j26]Siew Kei Lam, K. Sridharan, Thambipillai Srikanthan:
VLSI-efficient schemes for high-speed construction of tangent graph. Robotics Auton. Syst. 51(4): 248-260 (2005) - [j25]Chip-Hong Chang, Pengfei Xu, Rui Xiao, Thambipillai Srikanthan:
New adaptive color quantization method based on self-organizing maps. IEEE Trans. Neural Networks 16(1): 237-249 (2005) - [j24]Wu Jigang, Thambipillai Srikanthan, Heiko Schröder:
Efficient reconfigurable techniques for VLSI arrays with 6-port switches. IEEE Trans. Very Large Scale Integr. Syst. 13(8): 976-979 (2005) - [c55]Siew Kei Lam, Yun Deng, Thambipillai Srikanthan:
Morphable Structures for Reconfigurable Instruction Set Processors. Asia-Pacific Computer Systems Architecture Conference 2005: 450-463 - [c54]Wu Jigang, Thambipillai Srikanthan, Chengbin Yan:
Minimizing Power in Hardware/Software Partitioning. Asia-Pacific Computer Systems Architecture Conference 2005: 580-588 - [c53]Wu Jigang, Thambipillai Srikanthan, Heiko Schröder:
Efficient Techniques and Hardware Analysis for Mesh-Connected Processors. ICA3PP 2005: 442-446 - [c52]Bin Cao, Chip-Hong Chang, Thambipillai Srikanthan:
A new formulation of fast diminished-one multioperand modulo 2n/+1 adder. ISCAS (1) 2005: 656-659 - [c51]Bin Cao, Thambipillai Srikanthan, Chip-Hong Chang:
A new design method to modulo 2n-1 squaring. ISCAS (1) 2005: 664-667 - [c50]Yi Wang, Jussipekka Leiwo, Thambipillai Srikanthan:
Efficient high radix modular multiplication for high-speed computing in re-configurable hardware [cryptographic applications]. ISCAS (2) 2005: 1226-1229 - [c49]Chip-Hong Chang, Shibu Menon, Bin Cao, Thambipillai Srikanthan:
A configurable dual moduli multi-operand modulo adder. ISCAS (2) 2005: 1630-1633 - [c48]Suchitra Sathyanarayana, S. Sukthankar, Thambipillai Srikanthan, Christopher T. Clarke:
Elimination of sign precomputation in flat CORDIC. ISCAS (4) 2005: 3319-3322 - [c47]Gayathri Venkataraman, Sabu Emmanuel, Srikanthan Thambipillai:
DASCA: A Degree and Size based Clustering Approach for Wireless Sensor Networks. ISWCS 2005: 508-512 - [c46]Abhijit Ray, Thambipillai Srikanthan, Wu Jigang:
Practical Techniques for Performance Estimation of Processors. IWSOC 2005: 308-311 - [c45]Kugan Vivekanandarajah, Thambipillai Srikanthan:
Custom Instruction Filter Cache Synthesis for Low-Power Embedded Systems. IEEE International Workshop on Rapid System Prototyping 2005: 151-157 - [e1]Thambipillai Srikanthan, Jingling Xue, Chip-Hong Chang:
Advances in Computer Systems Architecture, 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedings. Lecture Notes in Computer Science 3740, Springer 2005, ISBN 3-540-29643-3 [contents] - 2004
- [j23]Abhijit Ray, Wu Jigang, Thambipillai Srikanthan:
Knapsack Model and Algorithm for Hardware/Software Partitioning Problem. Comput. Artif. Intell. 23(5): 557-569 (2004) - [j22]Wu Jigang, Thambipillai Srikanthan:
An efficient data structure for branch-and-bound algorithm. Inf. Sci. 167(1-4): 233-237 (2004) - [j21]Thambipillai Srikanthan, Siew Kei Lam, Mishra Suman:
Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System. IEEE Trans. Computers 53(1): 69-72 (2004) - [j20]Siew Kei Lam, K. Sridharan, Thambipillai Srikanthan:
Hardware-efficient schemes for logarithmic approximation and binary search with application to visibility graph construction. IEEE Trans. Ind. Electron. 51(6): 1346-1348 (2004) - [c44]Wu Jigang, Thambipillai Srikanthan:
Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays. Asia-Pacific Computer Systems Architecture Conference 2004: 440-448 - [c43]Kugan Vivekanandarajah, Thambipillai Srikanthan, Saurav Bhattacharyya:
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures. ASP-DAC 2004: 373-379 - [c42]Kugan Vivekanandarajah, Thambipillai Srikanthan, Saurav Bhattacharyya:
Dynamic Filter Cache for Low Power Instruction Memory Hierarchy. DSD 2004: 607-610 - [c41]Jin Zhenyu, Mohit Sindhwani, Thambipillai Srikanthan:
RTOS acceleration on soft-core processors using instruction set customization. FPT 2004: 371-374 - [c40]Abhijit Ray, Wu Jigang, Thambipillai Srikanthan:
Knapsack Model and Algorithm for HW/SW Partitioning Problem. International Conference on Computational Science 2004: 200-205 - [c39]Suchitra Sathyanarayana, Siew Kei Lam, Thambipillai Srikanthan:
High-throughput image rotation using sign-prediction based redundant cordic algorithm. ICIP 2004: 2833-2836 - [c38]Bin Cao, Thambipillai Srikanthan, Chip-Hong Chang:
Design of residue-to-binary converter for a new 5-moduli superset residue number system. ISCAS (2) 2004: 841-844 - [c37]Wu Jigang, Thambipillai Srikanthan:
Fast reconfiguring mesh-connected VLSI arrays. ISCAS (2) 2004: 949-952 - [c36]Gayathri Venkataraman, Sabu Emmanuel, Srikanthan Thambipillai:
A novel distributed cluster maintenance technique for high mobility ad-hoc networks. ISWCS 2004: 225-229 - 2003
- [j19]N. Sudha, Thambipillai Srikanthan, Babu Mailachalam:
A VLSI architecture for 3-D self-organizing map based color quantization and its FPGA implementation. J. Syst. Archit. 48(11-12): 337-352 (2003) - [j18]Wu Jigang, Thambipillai Srikanthan:
An improved reconfiguration algorithm for degradable VLSI/WSI arrays. J. Syst. Archit. 49(1-2): 23-31 (2003) - [c35]Kugan Vivekanandarajah, Thambipillai Srikanthan, Christopher T. Clarke, Saurav Bhattacharyya:
Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design. Embedded Systems and Applications 2003: 210-215 - [c34]Pramod Kumar Meher, Thambipillai Srikanthan, M. Mahesh Kumar, S. Arunkumar:
Low-Power Transform-Domain Coding by Separable Two-Dimensional Hartley-Like Transform. Embedded Systems and Applications 2003: 228-236 - [c33]Wu Jigang, Thambipillai Srikanthan, Chandni R. Patel:
A Low Power Algorithm for Reconfigurable VLSI/WSI Arrays. Embedded Systems and Applications 2003: 237-242 - [c32]Gurmeet Singh, Ashish Panda, Saurav Bhattacharyya, Thambipillai Srikanthan:
Vector quantization techniques for GMM based speaker verification. ICASSP (2) 2003: 65-68 - [c31]Chip-Hong Chang, Rui Xiao, Thambipillai Srikanthan:
An adaptive initialization technique for color quantization by self organizing feature map. ICASSP (3) 2003: 477-480 - [c30]Wu Jigang, Thambipillai Srikanthan:
On the Reconfiguration Algorithm for Fault-Tolerant VLSI Arrays. International Conference on Computational Science 2003: 360-366 - [c29]Hui Tian, Siew Kei Lam, Thambipillai Srikanthan:
Implementing Otsu's thresholding process using area-time efficient logarithmic approximation unit. ISCAS (4) 2003: 21-24 - [c28]Siew Kei Lam, Devendra K. Chaudhaiy, Thambipillai Srikanthan:
Low cost logarithmic techniques for high-precision computations. ISCAS (5) 2003: 125-128 - [c27]K. H. Quek, Siew Kei Lam, N. K. Agrawal, Thambipillai Srikanthan:
Architectural design and analysis toolbox to implement shortest path algorithms in hardware. ISCAS (3) 2003: 224-227 - [c26]Bin Cao, Thambipillai Srikanthan, Chip-Hong Chang:
Design of a high speed reverse converter for a new 4-moduli set residue number system. ISCAS (4) 2003: 520-523 - [c25]Bin Cao, Chip-Hong Chang, Thambipillai Srikanthan:
New efficient residue-to-binary converters for 4-moduli set {2n - 1, 2n, 2n + 1, 2n+1 - 1}. ISCAS (4) 2003: 536-539 - [c24]Wu Jigang, Thambipillai Srikanthan:
Partial rerouting algorithm for reconfigurable VLSI arrays. ISCAS (5) 2003: 641-644 - [c23]Kugan Vivekanandarajah, Thambipillai Srikanthan, Saurav Bhattacharyya, Prasanna Venkatesh Kannan:
Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design. IWSOC 2003: 44-47 - [c22]Wu Jigang, Thambipillai Srikanthan:
A Run-time Reconfiguration Algorithm for VLSI Arrays. VLSI Design 2003: 567-572 - 2002
- [j17]Thambipillai Srikanthan, Bimal Gisuthan:
Optimizing Scaling Factor Computations in Flat Cordic. J. Circuits Syst. Comput. 11(1): 17-34 (2002) - [j16]Chip-Hong Chang, Hui Tian, Thambipillai Srikanthan, Chai-Soon Lim:
Field programable gate array based architecture for real time image segmentation by region growing algorithm. J. Electronic Imaging 11(4): 469-478 (2002) - [j15]Gurdeep S. Hura, Sheeja Mohan, Thambipillai Srikanthan:
On Load Sharing in Distributed Systems: a Novel Approach. Trans. SDPS 6(1): 59-81 (2002) - [j14]Siew Kei Lam, Thambipillai Srikanthan:
Environment Modelling for Robot Navigation Using VLSI-Efficient Logarithmic Approximation Method. J. Intell. Robotic Syst. 35(1): 23-40 (2002) - [j13]Vijayan K. Asari, Thambipillai Srikanthan:
Segmenting endoscopic images using adaptive progressive thresholding: a hardware perspective. J. Syst. Archit. 47(9): 759-761 (2002) - [j12]Thambipillai Srikanthan, Bimal Gisuthan:
A novel technique for eliminating iterative based computation of polarity of micro-rotations in CORDIC based sine-cosine generators. Microprocess. Microsystems 26(5): 243-252 (2002) - [j11]Siew Kei Lam, Thambipillai Srikanthan:
A linear approximation based hybrid approach for binary logarithmic conversion. Microprocess. Microsystems 26(8): 353-361 (2002) - [j10]Babu Mailachalam, Thambipillai Srikanthan:
Area-time issues in the VLSI implementation of self organizing map neural networks. Microprocess. Microsystems 26(9-10): 399-406 (2002) - [j9]George Rosario Jagadeesh, Thambipillai Srikanthan, K. H. Quek:
Heuristic techniques for accelerating hierarchical routing on road networks. IEEE Trans. Intell. Transp. Syst. 3(4): 301-309 (2002) - [c21]Chip-Hong Chang, Rui Xiao, Thambipillai Srikanthan:
A MSB-biased self-organizing feature map for still color image compression. APCCAS (2) 2002: 85-88 - [c20]C. S. Lim, Thambipillai Srikanthan, Vijayan K. Asari, Siew Kei Lam:
Fuzzy-ART based image compression for hardware implementation. APCCAS (2) 2002: 147-150 - [c19]Siew Kei Lam, Thambipillai Srikanthan, Nitin Goyal, Neeraj Tyagi:
Incorporating area-time flexibility to a binary signed-digit adder. APCCAS (1) 2002: 485-489 - [c18]Hui Tian, Siew Kei Lam, Thambipillai Srikanthan, Chip-Hong Chang:
An efficient architecture for adaptive progressive thresholding. APCCAS (1) 2002: 513-516 - [c17]Wu Jigang, Heiko Schröder, Thambipillai Srikanthan:
New Architecture and Algorithms for Degradable VLSI/WSI Arrays. COCOON 2002: 181-190 - [c16]Rui Xiao, Chip-Hong Chang, Thambipillai Srikanthan:
On the Initialization and Training Methods for Kohonen Self-Organizing Feature Maps in Color Image Quantization. DELTA 2002: 321-325 - [c15]C. S. Lim, Saman S. Abeysekera, Thambipillai Srikanthan, S. K. Amarasinghe:
Multiple sequence families with efficient hardware architecture for use in spread spectrum watermarking. ISCAS (1) 2002: 761-764 - [c14]Hui Tian, Thambipillai Srikanthan, Vijayan K. Asari:
A Hardware Efficient Technique for Rapid Lumen Segmentation from Endoscopic Images. JCIS 2002: 716-719 - [c13]Gurdeep S. Hura, Sheeja Mohan, Thambipillai Srikanthan:
Load Sharing in Large Scale Distributed Systems: A Novel Approach. PDPTA 2002: 863-871 - [c12]Hui Tian, Thambipillai Srikanthan, Vijayan K. Asari, Siew Kei Lam:
Study on the Effect of Object to Camera Distance on Polynomial Expansion Coefficients in Barrel Distortion Correction. SSIAI 2002: 255-259 - 2001
- [j8]Siew Kei Lam, Thambipillai Srikanthan:
High-Speed Environment Representation Scheme for Dynamic Path Planning. J. Intell. Robotic Syst. 32(3): 307-319 (2001) - [j7]Gurdeep S. Hura, Thambipillai Srikanthan, Chia Cher Yong:
Network Simulation Environment (NSE): A Generic Framework for Network Graphs. Telecommun. Syst. 17(1-2): 213-231 (2001) - [c11]Hui Tian, Thambipillai Srikanthan, Vijayan K. Asari:
A Recursive Otsu-Iris Filter Technique for High-Speed Detection of Lumen Region from Endoscopic Images. AIPR 2001: 182-186 - 2000
- [j6]Siew Kei Lam, Thambipillai Srikanthan:
Dynamic multicast routing in VLSI. Comput. Commun. 23(11): 1055-1063 (2000) - [c10]Bimal Gisutham, Thambipillai Srikanthan, Vijayan K. Asari:
A High Speed Flat CORDIC Based Neuron with Multi-Level Activation Function for Robust Pattern Recognition. CAMP 2000: 87-94 - [c9]Babu Mailachalam, Thambipillai Srikanthan:
A Robust Parallel Architecture for Adaptive Color Quantization. ITCC 2000: 164-173
1990 – 1999
- 1999
- [j5]K. Vijayan Asari, Thambipillai Srikanthan, Sanjiv Kumar, D. Radhakrishnan:
A pipelined architecture for image segmentation by adaptive progressive thresholding. Microprocess. Microsystems 23(8-9): 493-499 (1999) - [c8]Manish Bhardwaj, Thambipillai Srikanthan, Christopher T. Clarke:
A Reverse Converter for the 4-moduli Superset {2n-1, 2n, 2n+1, 2n+1+1}. IEEE Symposium on Computer Arithmetic 1999: 168-175 - [c7]Manish Bhardwaj, Thambipillai Srikanthan, Christopher T. Clarke:
VLSI Costs of Arithmetic Parallelism: A Residue Reverse Conversion Perspectiv. IEEE Symposium on Computer Arithmetic 1999: 176- - [c6]Ian Vince McLoughlin, Srikanthan Thambipillai:
LSP parameter interpretation for speech classification. ICECS 1999: 419-422 - [c5]Jimson Mathew, D. Radhakrishnan, Thambipillai Srikanthan:
New area efficient residue-to-weighted number system converters. ICECS 1999: 945-948 - [c4]Jimson Mathew, D. Radhakrishnan, Thambipillai Srikanthan:
Residue-to-binary arithmetic converter for moduli set {2n -1, 2n, 2n+1, 2n+1 -1}. NSIP 1999: 185-188 - 1998
- [j4]S. K. Leong, Thambipillai Srikanthan, Gurdeep S. Hura:
An Internet application for on-line banking. Comput. Commun. 20(16): 1534-1540 (1998) - [j3]Thambipillai Srikanthan, Goh Wee Leng, S. K. Amarasinghe:
An OLE-based speech compression system for multimedia applications. Microprocess. Microsystems 22(1): 41-48 (1998) - [c3]Thambipillai Srikanthan, Gurdeep S. Hura, Chia Cher Yong:
An Object Oriented GUI for Clustering Technique Based Network Simulations. ESM 1998: 92-96 - [c2]Aniruddha A. Deodhar, Manish Bhardwaj, Christopher T. Clarke, Thambipillai Srikanthan:
Designing efficient residue arithmetic based VLSI correlators. ICASSP 1998: 3021-3024 - 1997
- [j2]Thambipillai Srikanthan, Gurdeep S. Hura:
An efficient adaptive routing algorithm for a network management system. Comput. Commun. 20(11): 988-998 (1997) - 1996
- [c1]Thambipillai Srikanthan, Gurdeep Singh Hura:
An Efficient Adaptive Routing Strategy for Network Management Protocol. ESM 1996: 540-546 - 1995
- [j1]Thambipillai Srikanthan, Kai-Yun Chan, Hock Soon Seah, S. K. Leong:
A transputer based vehicle simulator. Microprocess. Microsystems 19(7): 395-404 (1995)
Coauthor Index
aka: Siew Kei Lam
aka: Wu Jigang
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