"Communication-Aware Module Placement for Power Reduction in Large FPGA ..."

Kalindu Herath et al. (2018)

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DOI: 10.1109/ISVLSI.2018.00047

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Kalindu Herath, Alok Prakash, Udaree Kanewala, Thambipillai Srikanthan:
Communication-Aware Module Placement for Power Reduction in Large FPGA Designs. ISVLSI 2018: 209-214

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