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ORCIDRami A. Abdallah
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2010 – 2019
- 2016
[j7]Rami A. Abdallah, Naresh R. Shanbhag:
Correction to "An Energy-Efficient ECG Processor in 45-nm CMOS Using Statistical Error Compensation". IEEE J. Solid State Circuits 51(6): 1499 (2016)- 2014
- [j6]Rami A. Abdallah, Naresh R. Shanbhag:
Reducing Energy at the Minimum Energy Operating Point Via Statistical Error Compensation. IEEE Trans. Very Large Scale Integr. Syst. 22(6): 1328-1337 (2014) - 2013
- [j5]Rami A. Abdallah, Naresh R. Shanbhag:
An Energy-Efficient ECG Processor in 45-nm CMOS Using Statistical Error Compensation. IEEE J. Solid State Circuits 48(11): 2882-2893 (2013) - [j4]Rami A. Abdallah, Naresh R. Shanbhag:
Robust and Energy Efficient Multimedia Systems via Likelihood Processing. IEEE Trans. Multim. 15(2): 257-267 (2013) - [c10]Rami A. Abdallah, Naresh R. Shanbhag:
Error-resilient systems via statistical signal processing. SiPS 2013: 312-317 - 2012
- [c9]Rami A. Abdallah, Naresh R. Shanbhag:
A 14.5 fJ/cycle/k-gate, 0.33 V ECG processor in 45nm CMOS using statistical error compensation. CICC 2012: 1-4 - 2011
- [j3]Srinivasa R. Sridhara, Michael DiRenzo, Srinivas Lingam, Seok-Jun Lee, Ra Blazquez, Jay Maxey, Samer Ghanem, Yu-Hung Lee, Rami A. Abdallah, Prashant Singh, Manish Goel:
Microwatt Embedded Processor Platform for Medical System-on-Chip Applications. IEEE J. Solid State Circuits 46(4): 721-730 (2011) - [c8]Rami A. Abdallah, Yu-Hung Lee, Naresh R. Shanbhag:
Timing error statistics for energy-efficient robust DSP systems. DATE 2011: 285-288 - [c7]Rami A. Abdallah, Pradeep S. Shenoy, Naresh R. Shanbhag, Philip T. Krein:
System energy minimization via joint optimization of the DC-DC converter and the core. ISLPED 2011: 97-102 - 2010
- [j2]Rami A. Abdallah, Naresh R. Shanbhag:
Minimum-Energy Operation Via Error Resiliency. IEEE Embed. Syst. Lett. 2(4): 115-118 (2010) - [c6]Naresh R. Shanbhag, Rami A. Abdallah, Rakesh Kumar, Douglas L. Jones:
Stochastic computation. DAC 2010: 859-864 - [c5]Rami A. Abdallah, Naresh R. Shanbhag:
Robust and energy-efficient DSP systems via output probability processing. ICCD 2010: 38-44
2000 – 2009
- 2009
- [j1]Rami A. Abdallah, Naresh R. Shanbhag:
Error-resilient low-power Viterbi decoder architectures. IEEE Trans. Signal Process. 57(12): 4906-4917 (2009) - [c4]Eric P. Kim, Rami A. Abdallah, Naresh R. Shanbhag:
Soft NMR: Exploiting statistics for energy-efficiency. SoC 2009: 52-55 - [c3]Rami A. Abdallah, Seok-Jun Lee, Manish Goel, Naresh R. Shanbhag:
Low-power pre-decoding based viterbi decoder for tail-biting convolutional codes. SiPS 2009: 185-190 - 2008
- [c2]Rami A. Abdallah, Naresh R. Shanbhag:
Error-resilient low-power Viterbi decoders. ISLPED 2008: 111-116 - [c1]Rami A. Abdallah, Naresh R. Shanbhag:
Error-resilient low-power Viterbi decoders via state clustering. SiPS 2008: 221-226
Coauthor Index
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