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ORCIDJean-Marc Philippe
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2020 – today
- 2023
[j6]Ivan Miro-Panades, Benoît Tain
, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy:
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. IEEE J. Solid State Circuits 58(6): 1782-1797 (2023)- [c21]Lluc Alvarez, Abraham Ruiz, Arnau Bigas-Soldevilla, Pavel Kuroedov, Alberto González, Hamsika Mahale, Noe Bustamante, Albert Aguilera, Francesco Minervini, Javier Salamero, Oscar Palomar, Vassilis Papaefstathiou, Antonis Psathakis, Nikolaos Dimou, Michalis Giaourtas, Iasonas Mastorakis, Georgios Ieronymakis, Georgios-Michail Matzouranis, Vassilis Flouris, Nick Kossifidis, Manolis Marazakis, Bhavishya Goel, Madhavan Manivannan, Ahsen Ejaz, Panagiotis Strikos, Mateo Vázquez, Ioannis Sourdis, Pedro Trancoso, Per Stenström, Jens Hagemeyer, Lennart Tigges, Nils Kucza, Jean-Marc Philippe, Ioannis Papaefstathiou:
eProcessor: European, Extendable, Energy-Efficient, Extreme-Scale, Extensible, Processor Ecosystem. CF 2023: 309-314 - [c20]Lilia Zaourar, Alice Chillet, Jean-Marc Philippe:
A-DECA: An Automated Design Space Exploration Approach for Computing Architectures to Develop Efficient High-Performance Many-Core Processors. DSD 2023: 756-763 - [i1]Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy:
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. CoRR abs/2304.13726 (2023) - 2022
- [j5]Nermine Ali, Jean-Marc Philippe, Benoît Tain, Philippe Coussy:
Generating Efficient FPGA-based CNN Accelerators from High-Level Descriptions. J. Signal Process. Syst. 94(10): 945-960 (2022) - 2021
- [c19]Hana Krichene, Jean-Marc Philippe:
Analysis of on-chip communication properties in accelerator architectures for deep neural networks. NOCS 2021: 9-14 - [c18]Nermine Ali, Jean-Marc Philippe, Benoît Tain, Philippe Coussy:
Exploration and Generation of Efficient FPGA-based Deep Neural Network Accelerators. SiPS 2021: 123-128 - 2020
- [c17]Nermine Ali, Jean-Marc Philippe, Benoît Tain, Thomas Peyret, Philippe Coussy:
Deep Neural Networks Characterization Framework for Efficient Implementation on Embedded Systems. SiPS 2020: 1-6 - [c16]Ivan Miro Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Anthony Quelen, Emmanuel Pluchart, Jean-Philippe Noel, Reda Boumchedda, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Alexandre Valentian, Frédéric Heitzmann, Edith Beigné, Fabien Clermidy:
SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency. VLSI Circuits 2020: 1-2
2010 – 2019
- 2018
- [j4]Lilia Zaourar, Massinissa Ait Aba, David Briand, Jean-Marc Philippe:
Task management on fully heterogeneous micro-server system: Modeling and resolution strategies. Concurr. Comput. Pract. Exp. 30(23) (2018) - [c15]Alexandre Carbon, Jean-Marc Philippe, Olivier Bichler, Renaud Schmit, Benoît Tain, David Briand, Nicolas Ventroux, Michel Paindavoine, Olivier Brousse:
PNeuro: A scalable energy-efficient programmable hardware accelerator for neural networks. DATE 2018: 1039-1044 - 2017
- [j3]Ariel Oleksiak, Michal Kierzynka, Wojciech Piatek, Giovanni Agosta, Alessandro Barenghi, Carlo Brandolese, William Fornaciari, Gerardo Pelosi, Mariano Cecowski, Robert Plestenjak, Justin Cinkelj, Mario Porrmann, Jens Hagemeyer, René Griessl, Jan Lachmair, Meysam Peykanu, Lennart Tigges, Micha vor dem Berge, Wolfgang Christmann, Stefan Krupop, Alexandre Carbon, Loïc Cudennec, Thierry Goubier, Jean-Marc Philippe, Sven Rosinger, Daniel Schlitt, Christian Pieper, Chris Adeniyi-Jones, Javier Setoain, Luca Ceva, Udo Janssen:
M2DC - Modular Microserver DataCentre with heterogeneous hardware. Microprocess. Microsystems 52: 117-130 (2017) - [c14]Lilia Zaourar, Massinissa Ait Aba, David Briand, Jean-Marc Philippe:
Modeling of Applications and Hardware to Explore Task Mapping and Scheduling Strategies on a Heterogeneous Micro-Server System. IPDPS Workshops 2017: 65-76 - 2016
- [c13]Mariano Cecowski, Giovanni Agosta, Ariel Oleksiak, Michal Kierzynka, Micha vor dem Berge, Wolfgang Christmann, Stefan Krupop, Mario Porrmann, Jens Hagemeyer, René Griessl, Meysam Peykanu, Lennart Tigges, Sven Rosinger, Daniel Schlitt, Christian Pieper, Carlo Brandolese, William Fornaciari, Gerardo Pelosi, Robert Plestenjak, Justin Cinkelj, Loïc Cudennec, Thierry Goubier, Jean-Marc Philippe, Udo Janssen, Chris Adeniyi-Jones:
The M2DC Project: Modular Microserver DataCentre. DSD 2016: 68-74 - [c12]Michal Kierzynka, Ariel Oleksiak, Giovanni Agosta, Carlo Brandolese, William Fornaciari, Gerardo Pelosi, Micha vor dem Berge, Wolfgang Christmann, Stefan Krupop, Mariano Cecowski, Robert Plestenjak, Justin Cinkelj, Mario Porrmann, Jens Hagemeyer, René Griessl, Meysam Peykanu, Lennart Tigges, Loïc Cudennec, Thierry Goubier, Jean-Marc Philippe, Sven Rosinger, Daniel Schlitt, Christian Pieper, Chris Adeniyi-Jones, Udo Janssen, Luca Ceva:
Data centres for IoT applications: The M2DC approach (Invited paper). SAMOS 2016: 293-299 - 2015
- [c11]Jean-Marc Philippe, Alexandre Carbon, Olivier Brousse, Michel Paindavoine:
Exploration and design of embedded systems including neural algorithms. DATE 2015: 986-991 - [c10]Michel Paindavoine, Olivier Boisard, Alexandre Carbon, Jean-Marc Philippe, Olivier Brousse:
NeuroDSP Accelerator for Face Detection Application. ACM Great Lakes Symposium on VLSI 2015: 211-215 - 2014
- [j2]Yves Lhuillier, Maroun Ojail, Alexandre Guerre, Jean-Marc Philippe, Karim Ben Chehida, Farhat Thabet, Caaliph Andriamisaina, Chafic Jaber, Raphaël David:
HARS: A hardware-assisted runtime software for embedded many-core architectures. ACM Trans. Embed. Comput. Syst. 13(3s): 102:1-102:25 (2014) - [c9]Yves Lhuillier, Jean-Marc Philippe, Alexandre Guerre, Michal Kierzynka, Ariel Oleksiak:
Parallel Architecture Benchmarking: From Embedded Computing to HPC, a FiPS Project Perspective. EUC 2014: 154-161 - 2013
- [c8]Farhat Thabet, Yves Lhuillier, Caaliph Andriamisaina, Jean-Marc Philippe, Raphaël David:
An efficient and flexible hardware support for accelerating synchronization operations on the STHORM many-core architecture. DATE 2013: 531-534 - 2010
- [j1]Sébastien Pillement, Olivier Sentieys, Jean-Marc Philippe:
Spatio-temporal coding to improve speed and noise tolerance of on-chip interconnect. Microelectron. J. 41(8): 480-486 (2010) - [c7]Jean-Marc Philippe, Benoît Tain, Christian Gamrat:
A Self-reconfigurable FPGA-Based Platform for Prototyping Future Pervasive Systems. ICES 2010: 262-273
2000 – 2009
- 2008
- [c6]Martin Danek, Jean-Marc Philippe, Petr Honzík, Christian Gamrat, Roman Bartosinski:
Self-Adaptive Networked Entities for Building Pervasive Computing Architectures. ICES 2008: 94-105 - [c5]Chris R. Jesshope, Jean-Marc Philippe, Michiel W. van Tol:
An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of Concurrency. SAMOS 2008: 218-228 - 2007
- [c4]Katarina Paulsson, Michael Hübner, Jürgen Becker, Jean-Marc Philippe, Christian Gamrat:
On-line Routing of Reconfigurable Functions for Future Self-Adaptive Systems - Investigations within the ÆTHER Project. FPL 2007: 415-422 - 2006
- [c3]Jean-Marc Philippe, E. Kinvi-Boh, Sébastien Pillement, Olivier Sentieys:
An energy-efficient ternary interconnection link for asynchronous systems. ISCAS 2006 - [c2]Jean-Marc Philippe, Sébastien Pillement, Olivier Sentieys:
Area Efficient Temporal Coding Schemes for Reducing Crosstalk Effects. ISQED 2006: 334-339 - 2005
- [c1]Jean-Marc Philippe, Sébastien Pillement, Olivier Sentieys:
A low-power and high-speed quaternary interconnection link using efficient converters. ISCAS (5) 2005: 4689-4692
Coauthor Index
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