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ORCIDMichiel W. van Tol
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- affiliation: University of Amsterdam, Netherlands
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2010 – 2019
- 2014
[c10]Roy Bakker, Michiel W. van Tol, Andy D. Pimentel
:
Emulating Asymmetric MPSoCs on the Intel SCC Many-Core Processor. PDP 2014: 520-527- 2013
- [j3]Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Michiel W. van Tol, Muhammad Irfan Uddin, Chris R. Jesshope:
Apple-CORE: Harnessing general-purpose many-cores with hardware concurrency management. Microprocess. Microsystems 37(8-C): 1090-1101 (2013) - 2012
- [c9]Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Michiel W. van Tol, Chris R. Jesshope:
Apple-CORE: Microgrids of SVP Cores - Flexible, General-Purpose, Fine-Grained Hardware Concurrency Management. DSD 2012: 501-508 - [c8]Muhammad Irfan Uddin, Chris R. Jesshope, Michiel W. van Tol, Raphael Poss:
Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores. RAPIDO 2012: 1-8 - 2011
- [j2]Muhammad Irfan Uddin, Michiel W. van Tol, Chris R. Jesshope:
High Level Simulation of SVP Many-Core Systems. Parallel Process. Lett. 21(4): 413-438 (2011) - [c7]Michiel W. van Tol, Roy Bakker, Merijn Verstraaten, Clemens Grelck, Chris R. Jesshope:
Efficient Memory Copy Operations on the 48-core Intel SCC Processor. MARC Symposium 2011: 13-18 - [c6]Merijn Verstraaten, Clemens Grelck, Michiel W. van Tol, Roy Bakker, Chris R. Jesshope:
Mapping Distributed S-Net on the 48-core Intel SCC processor. MARC Symposium 2011: 41-46 - [c5]Michiel W. van Tol, Zdenek Pohl, Milan Tichý:
A Framework for Self-adaptive Collaborative Computing on Reconfigurable Platforms. PARCO 2011: 579-586 - [i2]Michiel W. van Tol, Juha Koivisto:
Extending and Implementing the Self-adaptive Virtual Processor for Distributed Memory Architectures. CoRR abs/1104.3876 (2011) - [i1]Michiel W. van Tol:
A Characterization of the SPARC T3-4 System. CoRR abs/1106.2992 (2011) - 2010
- [c4]Michiel W. van Tol, Chris R. Jesshope:
An Operating System Strategy for General-purpose Parallel Computing on Many-core Architectures. High Performance Computing Workshop 2010: 157-181 - [c3]Michael A. Hicks, Michiel W. van Tol, Chris R. Jesshope:
Towards scalable I/O on a many-core architecture. ICSAMOS 2010: 341-348
2000 – 2009
- 2009
- [j1]Michiel W. van Tol, Chris R. Jesshope, Mike Lankamp, Simon Polstra:
An implementation of the SANE Virtual Processor using POSIX threads. J. Syst. Archit. 55(3): 162-169 (2009) - 2008
- [c2]Thomas A. M. Bernard, Kostas Bousias, Liang Guang, Chris R. Jesshope, Mike Lankamp, Michiel W. van Tol, Li Zhang:
A general model of concurrency and its implementation as many-core dynamic RISC processors. ICSAMOS 2008: 1-9 - [c1]Chris R. Jesshope, Jean-Marc Philippe, Michiel W. van Tol:
An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of Concurrency. SAMOS 2008: 218-228
Coauthor Index
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