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2010 – 2019
- 2011
[c11]Zdenek Pohl, Milan Tichý:
Resource Management for the Heterogeneous Arrays of Hardware Accelerators. FPL 2011: 486-489- [c10]Michiel W. van Tol, Zdenek Pohl, Milan Tichý:
A Framework for Self-adaptive Collaborative Computing on Reconfigurable Platforms. PARCO 2011: 579-586 - 2010
- [j3]Milan Tichý, Jan Schier, David Gregg:
GSFAP adaptive filtering using log arithmetic for resource-constrained embedded systems. ACM Trans. Embed. Comput. Syst. 9(3): 29:1-29:31 (2010) - [c9]Antonin Hermanek, Michal Kunes, Milan Tichý:
Reducing Power Consumption of an Embedded DSP Platform through the Clock-Gating Technique. FPL 2010: 336-339
2000 – 2009
- 2008
- [j2]Zdenek Pohl, Milan Tichý, Jiri Kadlec:
Implementation of the Least-Squares Lattice with Order and Forgetting Factor Estimation for FPGA. EURASIP J. Adv. Signal Process. 2008 (2008) - [j1]John N. Coleman, Christopher I. Softley, Jiri Kadlec, Rudolf Matousek, Milan Tichý, Zdenek Pohl, Antonin Hermanek, Nico F. Benschop:
The European Logarithmic Microprocesor. IEEE Trans. Computers 57(4): 532-546 (2008) - 2007
- [c8]Zdenek Pohl, Milan Tichý:
RLS Lattice Algorithm with Order Probability Evaluation as an Accelerator for the Microblaze Processor. FPL 2007: 774-777 - 2006
- [c7]Milan Tichý, Jan Schier, David Gregg:
Efficient Floating-Point Implementation of High-Order (N)LMS Adaptive Filters in FPGA. ARC 2006: 311-316 - [c6]Milan Tichý, Andy Nisbet, David Gregg:
GSFAP adaptive filtering using log arithmetic for resource-constrained embedded systems. FPGA 2006: 236 - [c5]Milan Tichý, Jan Schier, David Gregg:
FPGA Implementation of Adaptive Filters based on GSFAP using Log Arithmetic. SiPS 2006: 321-326 - 2003
- [c4]Zdenek Pohl, Rudolf Matousek, Jiri Kadlec, Milan Tichý, Miroslav Lícko:
Lattice adaptive filter implementation for FPGA. FPGA 2003: 246 - [c3]Miroslav Lícko, Jan Schier, Milan Tichý, Markus Kühl:
MATLAB/Simulink Based Methodology for Rapid-FPGA-Prototyping. FPL 2003: 984-987 - [c2]Zdenek Pohl, Jan Schier, Miroslav Lícko, Antonin Hermanek, Milan Tichý, Rudolf Matousek, Jiri Kadlec:
Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink Based Rapid-FPGA-Prototyping. IPDPS 2003: 190 - 2002
- [c1]Rudolf Matousek, Milan Tichý, Zdenek Pohl, Jiri Kadlec, Christopher I. Softley, Nick Coleman:
Logarithmic Number System and Floating-Point Arithmetics on FPGA. FPL 2002: 627-636
Coauthor Index
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