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ORCIDICSAMOS 2011: Samos, Greece
- Luigi Carro, Andy D. Pimentel:
2011 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS XI, Samos, Greece, July 18-21, 2011. IEEE 2011, ISBN 978-1-4577-0802-2
Keynotes
- Shuvra S. Bhattacharyya:
Methods for design and implementation of dynamic signal processing systems. - Alex Ramírez:
Supercomputing: Past, present, and a possible future.
Multicore Programming
- Sherif Fadel Fahmy
, Binoy Ravindran:
On STM concurrency control for multicore embedded real-time software. 1-8 - Stefan Wallentowitz, Marcel Meyer, Thomas Wild, Andreas Herkersdorf:
Accelerating collective communication in message passing on manycore System-on-Chip. 9-16 - Oliver Arnold, Gerhard P. Fettweis:
On the impact of dynamic task scheduling in heterogeneous MPSoCs. 17-24 - Cedric Nugteren, Henk Corporaal, Bart Mesman:
Skeleton-based automatic parallelization of image processing algorithms for GPUs. 25-32
Energy-Aware and Low-Power Designs
- Qiang Liu, Terrence S. T. Mak, Junwen Luo, Wayne Luk, Alexandre Yakovlev:
Power adaptive computing system design in energy harvesting environment. 33-40 - Karthik T. Sundararajan, Timothy M. Jones, Nigel P. Topham:
Smart cache: A self adaptive cache architecture for energy efficiency. 41-50 - Simon Holmbacka, Sébastien Lafond, Johan Lilius:
Power proportional characteristics of an energy manager for web clusters. 51-58 - Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris:
Thermal optimization for micro-architectures through selective block replication. 59-66
Design Space Exploration
- Toktam Taghavi, Andy D. Pimentel:
Design metrics and visualization techniques for analyzing the performance of MOEAs in DSE. 67-76 - Ralf König, Timo Stripf, Jan Heisswolf, Jürgen Becker:
Architecture design space exploration of run-time scalable issue-width processors. 77-84 - Pekka Jääskeläinen, Erno Salminen, Carlos S. de La Lama, Jarmo Takala, José Ignacio Martínez:
TCEMC: A co-design flow for application-specific multicores. 85-92 - Kenneth C. Rovers, Marcel D. van de Burgwal, Jan Kuper, André B. J. Kokkeler, Gerard J. M. Smit:
Multi-domain transformational design flow for embedded systems. 93-101
Accelerators
- Fabio Cancare, Alessandro Marin, Donatella Sciuto:
Dedicated hardware accelerators for the epistatic analysis of human genetic data. 102-109 - Bogdan Spinean, Georgi Kuzmanov, Georgi Gaydadjiev:
Vector processor customization for FFT. 110-117 - Teemu Nylanden, Janne Janhunen, Jari Hannuksela, Olli Silvén:
FPGA based application specific processing for sensor nodes. 118-123 - Adrien Le Masle, Wayne Luk, Csaba Andras Moritz:
Parametrized hardware architectures for the Lucas primality test. 124-131 - Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal:
Distributed resource management for concurrent execution of multimedia applications on MPSoC platforms. 132-139
Simulation and Modeling
- Roel Meeuws, Carlo Galuzzi, Koen Bertels:
High level quantitative hardware prediction modeling using statistical methods. 140-149 - Kun Lu, Daniel Mueller-Gritschneder, Ulf Schlichtmann:
Removal of unnecessary context switches from the systemc simulation kernel for fast VP simulation. 150-156 - Timo Stripf, Ralf König, Jürgen Becker:
A novel ADL-based compiler-centric software framework for reconfigurable mixed-ISA processors. 157-164 - David A. Penry, Kurtis Cahill:
ADL-based specification of implementation styles for functional simulators. 165-173 - Joffrey Kriegel, Alain Pegatoquet, Michel Auguin, Florian Broekaert:
A performance estimation flow for embedded systems with mixed software/hardware modeling. 174-181 - Rainer Kiesel, Martin Streubühr, Christian Haubelt, Otto Löhlein, Jürgen Teich:
Calibration and validation of software performance models for pedestrian detection systems. 182-189 - Oscar Almer, Igor Böhm, Tobias J. K. Edler von Koch, Björn Franke, Stephen C. Kyle, Volker Seeker, Christopher Thompson, Nigel P. Topham:
Scalable multi-core simulation using parallel dynamic binary translation. 190-199 - Amine Marref:
Fully-automatic derivation of exact program-flow constraints for a tighter worst-case execution-time analysis. 200-208
Image and Video Processing
- Gregor Schewior, Holger Flatt, Carsten Dolar, Christian Banz, Holger Blume:
A hardware accelerated configurable ASIP architecture for embedded real-time video-based driver assistance applications. 209-216 - Michail Alvanos, George Tzenakis, Dimitrios S. Nikolopoulos, Angelos Bilas:
Task-based parallel H.264 video encoding for explicit communication architectures. 217-224 - Tiago Dias, Sebastián López, Nuno Roma, Leonel Sousa:
High throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systems. 225-232
Memory and Communication Strategies
- Esther P. Adeva, Björn Mennenga, Gerhard P. Fettweis:
Scalable ASIP implementation and parallelization of a MIMO sphere detector. 233-241 - Stefan Langemeyer, Peter Pirsch, Holger Blume:
Using SDRAMs for two-dimensional accesses of long 2n × 2m-point FFTs and transposing. 242-248 - Francesco Bruschi, Antonio Miele, Vincenzo Rana:
On-chip network resource management design and validation. 249-254 - Augusto Vega, Felipe Cabarcas, Alex Ramírez, Mateo Valero:
Breaking the bandwidth wall in chip multiprocessors. 255-262 - Vladimír Guzma, Teemu Pitkänen, Jarmo Takala:
Instruction buffer with limited control flow and loop nest support. 263-269 - Yosi Ben-Asher, Ron Meldiner, Nadav Rotem:
Optimizing wait-states in the synthesis of memory references with unpredictable latencies. 270-277 - Chengwei Zheng, John McAllister, Yun Wu:
A kernel interleaved scheduling method for streaming applications on soft-core vector processors. 278-285 - Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen:
Multicore Communications API (MCAPI) implementation on an FPGA multiprocessor. 286-293 - Yifan He, Dongrui She, Bart Mesman, Henk Corporaal:
MOVE-Pro: A low power and high code density TTA architecture. 294-301
Special Session 1 - 3D Chips: Challenges and Opportunities
- Tong Zhang:
Special session on "3D chips: Challenges and opportunities". 302 - Daniel W. Chang, Nam Sung Kim, Michael J. Schulte:
Analyzing the performance and energy impact of 3D memory integration on embedded DSPs. 303-310 - Demid Borodin, Winston Siauw, Sorin Dan Cotofana:
Functional unit sharing between stacked processors in 3D integrated systems. 311-317 - Ra'ed Al-Dujaily, Terrence S. T. Mak, Kuan Zhou, Kai-Pui Lam, Yicong Meng, Alexandre Yakovlev, Chi-Sang Poon:
On-chip dynamic programming networks using 3D-TSV integration. 318-325 - Paul D. Franzon, W. Rhett Davis, Thorlindur Thorolfsson, Samson Melamed:
3D specific systems design and CAD. 326-329
Special Session 2 - What's next for ESL
- Christian Haubelt:
Special session on "What's next for ESL". 330 - Kim Grüttner, Philipp A. Hartmann, Philipp Reinkemeier, Frank Oppenheimer, Wolfgang Nebel:
Challenges of multi- and many-core architectures for electronic system-level design. 331-338 - Nikola Trcka, Martijn Hendriks, Twan Basten, Marc Geilen, Lou J. Somers:
Integrated model-driven design-space exploration for embedded systems. 339-346 - Jerónimo Castrillón, Weihua Sheng, Rainer Leupers:
Trends in embedded software synthesis. 347-354 - Soonhoi Ha, Hyunok Oh:
Software synthesis in the ESL methodology for multicore embedded systems. 355-362
Special Session 3 - Adaptive Systems
- Gerard J. M. Smit:
Special session on "adaptive systems". 363 - Steffen Stein, Moritz Neukirchner, Rolf Ernst:
Admission control and self-configuration in the EPOC framework. 364-371 - Stefan J. Geuns, Joost P. H. M. Hausmans, Marco Bekooij:
Mapping of modal applications given throughput and latency constraints. 372-379 - Diana Göhringer, Oliver Oey, Michael Hübner, Jürgen Becker:
Heterogeneous and runtime parameterizable Star-Wheels Network-on-Chip. 380-387 - Timon D. ter Braak, Hermen A. Toersche, André B. J. Kokkeler, Gerard J. M. Smit:
Adaptive resource allocation for streaming applications. 388-395 - Andrew Nelson, Anca Mariana Molnos, Kees Goossens:
Composable power management with energy and power budgets per application. 396-403 - Sander Stuijk, Marc Geilen, Bart D. Theelen, Twan Basten:
Scenario-aware dataflow: Modeling, analysis and implementation of dynamic applications. 404-411
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