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Li-C. Wang
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- affiliation: University of California, Santa Barbara, CA, USA
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2020 – today
- 2024
- [c153]Min Jian Yang, Yueling Jenny Zeng, Li-C. Wang:
WM-Graph: Graph-Based Approach for Wafermap Analytics. ITC 2024: 111-120 - [c152]Li-C. Wang
:
LLM-Assisted Analytics in Semiconductor Test (Invited). MLCAD 2024: 38:1-38:7 - [i4]Yueling Jenny Zeng, Li-C. Wang, Thomas Ibbetson:
Oracle-Checker Scheme for Evaluating a Generative Large Language Model. CoRR abs/2405.03170 (2024) - 2023
- [c151]Matthew Dupree
, Min Jian Yang, Yueling Jenny Zeng, Li-C. Wang:
IEA-Plot: Conducting Wafer-Based Data Analytics Through Chat. ITC 2023: 122-131 - [c150]Li-C. Wang, Jeff Rearick:
Welcome Message ITC 2023. ITC 2023: xiii - [i3]Yueling Zeng, Li-C. Wang:
Domain Knowledge Graph Construction Via A Simple Checker. CoRR abs/2310.04949 (2023) - 2022
- [c149]Min Jian Yang, Yueling Zeng, Li-C. Wang:
Language Driven Analytics for Failure Pattern Feedforward and Feedback. ITC 2022: 288-297 - [c148]Yueling Jenny Zeng, Min Jian Yang, Li-C. Wang:
Wafer Map Pattern Analytics Driven By Natural Language Queries. ITC-Asia 2022: 31-36 - 2021
- [c147]Yueling Jenny Zeng, Li-C. Wang, Chuanhe Jay Shan:
MINiature Interactive Offset Networks (MINIONs) for Wafer Map Classification. ITC 2021: 190-199 - 2020
- [c146]Yueling Jenny Zeng, Li-C. Wang, Chuanhe Jay Shan, Nik Sumikawa:
Learning A Wafer Feature With One Training Sample. ITC 2020: 1-10
2010 – 2019
- 2019
- [c145]Li-C. Wang, Chuanhe Jay Shan, Ahmed Wahba:
Facilitating Deployment Of A Wafer-Based Analytic Software Using Tensor Methods: Invited Paper. ICCAD 2019: 1-8 - [c144]Chuanhe Jay Shan, Ahmed Wahba, Li-C. Wang, Nik Sumikawa:
Deploying A Machine Learning Solution As A Surrogate. ITC 2019: 1-10 - [c143]Ahmed Wahba, Chuanhe Jay Shan, Li-C. Wang, Nik Sumikawa:
Wafer Plot Classification Using Neural Networks and Tensor Methods. ITC-Asia 2019: 79-84 - [c142]Ahmed Wahba, Chuanhe Jay Shan, Li-C. Wang, Nik Sumikawa:
Primitive Concept Identification In A Given Set Of Wafer Maps. VLSI-DAT 2019: 1-4 - [c141]Ahmed Wahba, Li-C. Wang, Zheng Zhang
, Nik Sumikawa:
Wafer Pattern Recognition Using Tucker Decomposition. VTS 2019: 1-6 - 2018
- [c140]Li-C. Wang:
Machine Learning for Feature-Based Analytics. ISPD 2018: 74-81 - [c139]Matthew Nero, Chuanhe Jay Shan, Li-C. Wang, Nik Sumikawa:
Concept Recognition in Production Yield Data Analytics. ITC 2018: 1-10 - [c138]Li-C. Wang:
An Autonomous System View To Apply Machine Learning. ITC 2018: 1-10 - [c137]Krishnendu Chakrabarty
, Li-C. Wang, Gaurav Veda, Yu Huang:
Special session on machine learning for test and diagnosis. VTS 2018: 1 - [i2]Kuo-Kai Hsieh, Li-C. Wang:
A Concept Learning Tool Based On Calculating Version Space Cardinality. CoRR abs/1803.08625 (2018) - [i1]Matthew Nero, Chuanhe Jay Shan, Li-C. Wang, Nik Sumikawa:
Discovering Interesting Plots in Production Yield Data Analytics. CoRR abs/1807.03920 (2018) - 2017
- [j31]Magdy S. Abadir, Jayanta Bhadra, Wen Chen, Li-C. Wang:
Guest Editors' Introduction: Emerging Challenges and Solutions in SoC Verification. IEEE Des. Test 34(5): 5-6 (2017) - [j30]Wen Chen
, Sandip Ray, Jayanta Bhadra, Magdy S. Abadir
, Li-C. Wang:
Challenges and Trends in Modern SoC Design Verification. IEEE Des. Test 34(5): 7-22 (2017) - [j29]Wen Chen
, Kuo-Kai Hsieh, Li-Chung Wang, Jayanta Bhadra:
Data-Driven Test Plan Augmentation for Platform Verification. IEEE Des. Test 34(5): 23-29 (2017) - [j28]Li-C. Wang
:
Experience of Data Analytics in EDA and Test - Principles, Promises, and Challenges. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(6): 885-898 (2017) - [c136]Kuo-Kai Hsieh, Sebastian Siatkowski, Li-C. Wang, Wen Chen, Jayanta Bhadra:
Feature extraction from design documents to enable rule learning for improving assertion coverage. ASP-DAC 2017: 51-56 - [c135]Kuo-Kai Hsieh, Li-C. Wang, Wen Chen, Jayanta Bhadra:
Learning to Produce Direct Tests for Security Verification Using Constrained Process Discovery. DAC 2017: 34:1-34:6 - [c134]Chuanhe Jay Shan, Pietro Babighian, Yan Pan, John M. Carulli, Li-C. Wang:
Systematic defect detection methodology for volume diagnosis: A data mining perspective. ITC 2017: 1-10 - [c133]Nik Sumikawa, Matt Nero, Li-C. Wang:
Kernel based clustering for quality improvement and excursion detection. ITC 2017: 1-10 - [c132]Li-C. Wang, Sebastian Siatkowski, Chuanhe Jay Shan, Matthew Nero, Nikolas Sumikawa, LeRoy Winemberg:
Some considerations on choosing an outlier method for automotive product lines. ITC 2017: 1-10 - [c131]Ahmed Wahba, Justin Hohnerlein, Farhan Rahman, Li-C. Wang:
Dynamic Exerciser Template Weighting in x86 Processor Verification. MTV 2017: 26-31 - [c130]Sebastian Siatkowski, Li-C. Wang, Nik Sumikawa, LeRoy Winemberg:
Learning the process for correlation analysis. VTS 2017: 1-6 - 2016
- [j27]Ron Press
, Li-C. Wang
:
ITC and the Future of Test - We've Won. IEEE Des. Test 33(6): 96 (2016) - [c129]Suriyaprakash Natarajan, Li-C. Wang:
Session 4B - Panel data analytics in semiconductor manufacturing. VTS 2016: 1 - [c128]Sebastian Siatkowski, Chuanhe Jay Shan, Li-C. Wang
, Nikolas Sumikawa, W. Robert Daasch, John M. Carulli:
Consistency in wafer based outlier screening. VTS 2016: 1-6 - 2015
- [c127]Li-C. Wang
:
Data mining in functional test content optimization. ASP-DAC 2015: 308-315 - [c126]Li-C. Wang
, Malgorzata Marek-Sadowska:
Machine Learning in Simulation-Based Analysis. ISPD 2015: 57-64 - [c125]Sebastian Siatkowski, Chia-Ling Chang, Li-C. Wang
, Nikolas Sumikawa, LeRoy Winemberg, W. Robert Daasch:
Generalization of an outlier model into a "global" perspective. ITC 2015: 1-10 - 2014
- [c124]Li-C. Wang
, Magdy S. Abadir:
Data Mining In EDA - Basic Principles, Promises, and Constraints. DAC 2014: 159:1-159:6 - [c123]Kuo-Kai Hsieh, Wen Chen, Li-C. Wang
, Jayanta Bhadra:
On application of data mining in functional debug. ICCAD 2014: 670-675 - [c122]Jeff Tikkanen, Nik Sumikawa, Li-C. Wang
, Magdy S. Abadir:
Multivariate outlier modeling for capturing customer returns - How simple it can be. IOLTS 2014: 164-169 - [c121]Jeff Tikkanen, Sebastian Siatkowski, Nik Sumikawa, Li-C. Wang
, Magdy S. Abadir:
Yield optimization using advanced statistical correlation methods. ITC 2014: 1-10 - [c120]Li-C. Wang:
Design trends and test challenges in automotive electronics. VLSI-DAT 2014: 1 - 2013
- [j26]Sandip Ray, Jay Bhadra, Magdy S. Abadir, Li-C. Wang
:
Guest Editorial: Test and Verification Challenges for Future Microprocessors and SoC Designs. J. Electron. Test. 29(5): 621-623 (2013) - [c119]Wen Chen, Li-C. Wang
, Jay Bhadra, Magdy S. Abadir:
Simulation knowledge extraction and reuse in constrained random processor verification. DAC 2013: 120:1-120:6 - [c118]Li-C. Wang
:
Data mining in design and test processes: basic principles and promises. ISPD 2013: 41-42 - [c117]Nik Sumikawa, Li-C. Wang
, Magdy S. Abadir:
A pattern mining framework for inter-wafer abnormality analysis. ITC 2013: 1-10 - [c116]Vinayak Kamath, Farhan Rahman, Li-C. Wang
:
Analyzing Efficacy of Constrained Test Program Generators - A Case Study. MTV 2013: 100-105 - [c115]Wen Chen, Li-C. Wang
, Jayanta Bhadra, Magdy S. Abadir:
Novel test analysis to improve structural coverage - A commercial experiment. VLSI-DAT 2013: 1-4 - 2012
- [j25]Sandip Ray, Jayanta Bhadra, Magdy S. Abadir, Li-C. Wang
, Aarti Gupta
:
Introduction to special section on verification challenges in the concurrent world. ACM Trans. Design Autom. Electr. Syst. 17(3): 19:1-19:3 (2012) - [c114]Wen Chen, Nik Sumikawa, Li-C. Wang, Jayanta Bhadra, Xiushan Feng, Magdy S. Abadir:
Novel test detection to improve simulation efficiency - A commercial experiment. ICCAD 2012: 101-108 - [c113]Vinayak Kamath, Wen Chen, Nik Sumikawa, Li-C. Wang
:
Functional test content optimization for peak-power validation - An experimental study. ITC 2012: 1-10 - [c112]Nik Sumikawa, Jeff Tikkanen, Li-C. Wang
, LeRoy Winemberg, Magdy S. Abadir:
Screening customer returns with multivariate test analysis. ITC 2012: 1-10 - [c111]Nik Sumikawa, Li-C. Wang
, Magdy S. Abadir:
An experiment of burn-in time reduction based on parametric test analysis. ITC 2012: 1-10 - [c110]Magdy S. Abadir, Nik Sumikawa, Wen Chen, Li-C. Wang:
Data mining based prediction paradigm and its applications in design automation. VLSI-DAT 2012: 1 - [c109]An-Yeu Wu
, Li-C. Wang
:
Foreword. VLSI-DAT 2012: 1-2 - 2011
- [c108]Dragoljub Gagi Drmanac, Nik Sumikawa, LeRoy Winemberg, Li-C. Wang, Magdy S. Abadir:
Multidimensional parametric test set optimization of wafer probe data for predicting in field failures and setting tighter test limits. DATE 2011: 794-799 - [c107]Nik Sumikawa, Dragoljub Gagi Drmanac, Li-C. Wang
, LeRoy Winemberg, Magdy S. Abadir:
Forward prediction based on wafer sort data - A case study. ITC 2011: 1-10 - [c106]Nik Sumikawa, Dragoljub Gagi Drmanac, Li-C. Wang
, LeRoy Winemberg, Magdy S. Abadir:
Understanding customer returns from a test perspective. VTS 2011: 2-7 - [e5]Magdy S. Abadir, Jay Bhadra, Li-C. Wang:
12th International Workshop on Microprocessor Test and Verification, MTV 2011, Austin, TX, USA, December 5-7, 2011. IEEE Computer Society 2011, ISBN 978-1-4577-2101-4 [contents] - 2010
- [j24]Pouria Bastani, Nicholas Callegari, Li-C. Wang
, Magdy S. Abadir:
Feature-Ranking Methodology to Diagnose Design-Silicon Timing Mismatch. IEEE Des. Test Comput. 27(3): 42-53 (2010) - [j23]Onur Guzey, Li-C. Wang
, Jeremy R. Levitt, Harry Foster:
Increasing the Efficiency of Simulation-Based Functional Verification Through Unsupervised Support Vector Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(1): 138-148 (2010) - [c105]Li-C. Wang
:
Data learning based diagnosis. ASP-DAC 2010: 247-254 - [c104]Janine Chen, Jing Zeng, Li-C. Wang
, Michael Mateja:
Correlating system test Fmax with structural test Fmax and process monitoring measurements. ASP-DAC 2010: 419-424 - [c103]Po-Hsien Chang, Li-C. Wang
:
Automatic assertion extraction via sequential data mining of simulation traces. ASP-DAC 2010: 607-612 - [c102]Nicholas Callegari, Dragoljub Gagi Drmanac, Li-C. Wang
, Magdy S. Abadir:
Classification rule learning using subgroup discovery of cross-domain attributes responsible for design-silicon mismatch. DAC 2010: 374-379 - [c101]Po-Hsien Chang, Dragoljub Gagi Drmanac, Li-C. Wang
:
Online selection of effective functional test programs based on novelty detection. ICCAD 2010: 762-769 - [c100]Hui Li, Makram Mansour, Sury Maturi, Li-C. Wang
:
A new sampling method for analog behavioral modeling. ISCAS 2010: 2908-2911 - [c99]Dragoljub Gagi Drmanac, Brendon Bolin, Li-C. Wang
:
A non-parametric approach to behavioral device modeling. ISQED 2010: 284-290 - [c98]Jing Zeng, Jing Wang, Chia-Ying Chen, Michael Mateja, Li-C. Wang
:
On evaluating speed path detection of structural tests. ISQED 2010: 570-576 - [c97]Hui Li, Makram Mansour, Sury Maturi, Li-C. Wang
:
Analog behavioral modeling flow using statistical learning method. ISQED 2010: 872-878 - [c96]Po-Hsien Chang, Li-C. Wang
, Jayanta Bhadra:
A kernel-based approach for functional test program generation. ITC 2010: 164-173 - [c95]Janine Chen, Brendon Bolin, Li-C. Wang
, Jing Zeng, Dragoljub Gagi Drmanac, Michael Mateja:
Mining AC delay measurements for understanding speed-limiting paths. ITC 2010: 553-562 - [c94]Sean H. Wu, Sreejit Chakravarty, Li-C. Wang
:
Impact of multiple input switching on delay test under process variation. VTS 2010: 87-92 - [c93]Janine Chen, Jing Zeng, Li-C. Wang
, Jeff Rearick, Michael Mateja:
Selecting the most relevant structural Fmax for system Fmax correlation. VTS 2010: 99-104 - [e4]Magdy S. Abadir, Jay Bhadra, Li-C. Wang:
11th International Workshop on Microprocessor Test and Verification, MTV 2010, Austin, TX, USA, December 13-15, 2010. IEEE Computer Society 2010, ISBN 978-0-7695-4354-3 [contents]
2000 – 2009
- 2009
- [j22]Nicholas Callegari, Pouria Bastani, Li-C. Wang
, Magdy S. Abadir:
A Statistical Diagnosis Approach for Analyzing Design-Silicon Timing Mismatch. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(11): 1728-1741 (2009) - [c92]Nicholas Callegari, Pouria Bastani, Li-C. Wang
, Sreejit Chakravarty, Alexander Tetelbaum:
Path selection for monitoring unexpected systematic timing effects. ASP-DAC 2009: 781-786 - [c91]Nicholas Callegari, Li-C. Wang, Pouria Bastani:
Speedpath analysis based on hypothesis pruning and ranking. DAC 2009: 346-351 - [c90]Dragoljub Gagi Drmanac, Frank Liu, Li-C. Wang:
Predicting variability in nanoscale lithography processes. DAC 2009: 545-550 - [c89]Li-C. Wang:
Data Learning Techniques for Functional/System Fmax Prediction. DFT 2009: 451-451 - [c88]Nicholas Callegari, Li-C. Wang
, Pouria Bastani:
Feature based similarity search with application to speedpath analysis. ITC 2009: 1-10 - [c87]Janine Chen, Li-C. Wang
, Po-Hsien Chang, Jing Zeng, S. Yu, Michael Mateja:
Data learning techniques and methodology for Fmax prediction. ITC 2009: 1-10 - [c86]Dragoljub Gagi Drmanac, Brendon Bolin, Li-C. Wang
, Magdy S. Abadir:
Minimizing outlier delay test cost in the presence of systematic variability. ITC 2009: 1-10 - 2008
- [j21]Pouria Bastani, Li-C. Wang
, Magdy S. Abadir:
Linking Statistical Learning to Diagnosis. IEEE Des. Test Comput. 25(3): 232-239 (2008) - [j20]Chee-Kian Ong, Dongwoo Hong, Kwang-Ting Cheng
, Li-C. Wang
:
A Clock-Less Jitter Spectral Analysis Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(8): 2263-2272 (2008) - [c85]Sean H. Wu, Sreejit Chakravarty, Alexander Tetelbaum, Li-C. Wang
:
Refining Delay Test Methodology Using Knowledge of Asymmetric Transition Delay. ATS 2008: 142-144 - [c84]Pouria Bastani, Kip Killpack, Li-C. Wang, Eli Chiprout:
Speedpath prediction based on learning from a small set of examples. DAC 2008: 217-222 - [c83]Onur Guzey, Li-C. Wang, Jeremy R. Levitt, Harry Foster:
Functional test selection based on unsupervised support vector analysis. DAC 2008: 262-267 - [c82]Pouria Bastani, Nicholas Callegari, Li-C. Wang, Magdy S. Abadir:
Statistical diagnosis of unmodeled systematic timing effects. DAC 2008: 355-360 - [c81]Pouria Bastani, Nicholas Callegari, Li-C. Wang
, Magdy S. Abadir:
Diagnosis of design-silicon timing mismatch with feature encoding and importance ranking - the methodology explained. ITC 2008: 1-10 - [c80]Sean H. Wu, Dragoljub Gagi Drmanac, Li-C. Wang
:
A Study of Outlier Analysis Techniques for Delay Testing. ITC 2008: 1-10 - 2007
- [j19]Jayanta Bhadra, Magdy S. Abadir, Li-C. Wang
:
Guest Editors' Introduction: Attacking Functional Verification through Hybrid Techniques. IEEE Des. Test Comput. 24(2): 110-111 (2007) - [j18]Jayanta Bhadra, Magdy S. Abadir, Li-C. Wang
, Sandip Ray:
A Survey of Hybrid Techniques for Functional Verification. IEEE Des. Test Comput. 24(2): 112-122 (2007) - [c79]Li-C. Wang, Pouria Bastani, Magdy S. Abadir:
Design-Silicon Timing Correlation A Data Mining Perspective. DAC 2007: 384-389 - [c78]Onur Guzey, Li-C. Wang
:
Coverage-directed test generation through automatic constraint extraction. HLDVT 2007: 151-158 - [c77]Charles H.-P. Wen
, Li-C. Wang
, Jayanta Bhadra:
An incremental learning framework for estimating signal controllability in unit-level verification. ICCAD 2007: 250-257 - [c76]Pouria Bastani, Benjamin N. Lee, Li-C. Wang
, Savithri Sundareswaran, Magdy S. Abadir:
Analyzing the risk of timing modeling based on path delay tests. ITC 2007: 1-10 - [c75]Onur Guzey, Li-C. Wang
, Jayanta Bhadra:
Enhancing signal controllability in functional test-benches through automatic constraint extraction. ITC 2007: 1-10 - [c74]Sean Hsi Yuan Wu, Benjamin N. Lee, Li-C. Wang
, Magdy S. Abadir:
Statistical analysis and optimization of parametric delay test. ITC 2007: 1-10 - [e3]Magdy S. Abadir, Li-C. Wang, Jayanta Bhadra:
Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), Common Challenges and Solutions, 5-6 December 2007, Austin, Texas, USA. IEEE Computer Society 2007, ISBN 978-0-7695-3241-7 [contents] - 2006
- [j17]Charles H.-P. Wen
, Li-C. Wang
, Kwang-Ting Cheng
:
Simulation-Based Functional Test Generation for Embedded Processors. IEEE Trans. Computers 55(11): 1335-1343 (2006) - [c73]Benjamin N. Lee, Li-C. Wang
, Magdy S. Abadir:
Refined statistical static timing analysis through. DAC 2006: 149-154 - [c72]Onur Guzey, Charles H.-P. Wen
, Li-C. Wang
, Tao Feng, Magdy S. Abadir:
Extracting a simplified view of design functionality via vector simulation. HLDVT 2006: 195-202 - [c71]Onur Guzey, Charles H.-P. Wen
, Li-C. Wang, Tao Feng, Hillel Miller, Magdy S. Abadir:
Extracting a Simplified View of Design Functionality Based on Vector Simulation. Haifa Verification Conference 2006: 34-49 - [c70]Leonard Lee, Li-C. Wang
:
On bounding the delay of a critical path. ICCAD 2006: 81-88 - [c69]Charles H.-P. Wen, Onur Guzey, Li-C. Wang
:
Simulation-based functional test justification using a decision-digram-based Boolean data miner. ICCD 2006: 300-307 - [c68]Leonard Lee, Li-C. Wang
:
An Efficient Pruning Method to Guide the Search of Precision Tests in Statistical Timing Space. ITC 2006: 1-10 - [c67]Benjamin N. Lee, Li-C. Wang
, Magdy S. Abadir:
Issues on Test Optimization with Known Good Dies and Known Defective Dies - A Statistical Perspective. ITC 2006: 1-10 - [e2]Magdy S. Abadir, Li-C. Wang, Jayanta Bhadra:
Seventh International Workshop on Microprocessor Test and Verification (MTV 2006), Common Challenges and Solutions, 4-5 December 2006, Austin, Texas, USA. IEEE Computer Society 2006, ISBN 978-0-7695-2839-7 [contents] - 2005
- [j16]Tao Feng, Li-C. Wang
, Kwang-Ting Cheng
, Chih-Chan Lin:
Using 2-domain partitioned OBDD data structure in an enhanced symbolic simulator. ACM Trans. Design Autom. Electr. Syst. 10(4): 627-650 (2005) - [c66]Feng Lu, Madhu K. Iyer, Ganapathy Parthasarathy
, Li-C. Wang
, Kwang-Ting Cheng
, Kuang-Chien Chen:
An Efficient Sequential SAT Solver With Improved Search Strategies. DATE 2005: 1102-1107 - [c65]Leonard Lee, Sean H. Wu, Charles H.-P. Wen, Li-C. Wang:
On Generating Tests to Cover Diverse Worst-Case Timing Corners. DFT 2005: 415-426 - [c64]Charles H.-P. Wen
, Li-C. Wang
, Kwang-Ting Cheng
:
Simulation-based functional test generation for embedded processors. HLDVT 2005: 3-10 - [c63]Benjamin N. Lee, Hui Li, Li-C. Wang
, Magdy S. Abadir:
Hazard-aware statistical timing simulation and its applications in screening frequency-dependent defects. ITC 2005: 10 - [c62]Charles H.-P. Wen
, Li-C. Wang
, Kwang-Ting Cheng
, Wei-Ting Liu, Ji-Jan Chen:
Simulation-based target test generation techniques for improving the robustness of a software-based-self-test methodology. ITC 2005: 10 - [c61]Charles H.-P. Wen
, Li-C. Wang
:
Simulation Data Mining for Functional Test Pattern Justification. MTV 2005: 76-83 - [c60]Leonard Lee, Li-C. Wang
, Praveen Parvathala, T. M. Mak:
On Silicon-Based Speed Path Identification. VTS 2005: 35-41 - [c59]Charles H.-P. Wen, Li-C. Wang
, Kwang-Ting Cheng
, Kai Yang, Wei-Ting Liu, Ji-Jan Chen:
On A Software-Based Self-Test Methodology and Its Application. VTS 2005: 107-113 - [c58]Benjamin N. Lee, Li-C. Wang
, Magdy S. Abadir:
Reducing Pattern Delay Variations for Screening Frequency Dependent Defects. VTS 2005: 153-160 - [e1]Magdy S. Abadir, Li-C. Wang:
Sixth International Workshop on Microprocessor Test and Verification (MTV 2005), Common Challenges and Solutions, 3-4 November 2005, Austin, Texas, USA. IEEE Computer Society 2005, ISBN 0-7695-2627-6 [contents] - 2004
- [j15]Magdy S. Abadir, Li-C. Wang
:
Guest Editors' Introduction: The Verification and Test of Complex Digital ICs. IEEE Des. Test Comput. 21(2): 80-82 (2004) - [j14]Ganapathy Parthasarathy
, Madhu K. Iyer, Kwang-Ting Cheng
, Li-C. Wang
:
Safety Property Verification Using Sequential SAT and Bounded Model Checking. IEEE Des. Test Comput. 21(2): 132-143 (2004) - [j13]T. M. Mak, Angela Krstic, Kwang-Ting (Tim) Cheng
, Li-C. Wang
:
New Challenges in Delay Testing of Nanometer, Multigigahertz Designs. IEEE Des. Test Comput. 21(3): 241-247 (2004) - [j12]Feng Lu, Li-C. Wang, Kwang-Ting (Tim) Cheng, John Moondanos, Ziyad Hanna:
A Signal Correlation Guided Circuit-SAT Solver. J. Univers. Comput. Sci. 10(12): 1629-1654 (2004) - [j11]Cliff C. N. Sze, Ting-Chi Wang, Li-C. Wang
:
Multilevel circuit clustering for delay minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(7): 1073-1085 (2004) - [j10]Li-C. Wang
, Jing-Jia Liou, Kwang-Ting Cheng
:
Critical path selection for delay fault testing based upon a statistical timing model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(11): 1550-1565 (2004) - [j9]Chee-Kian Ong, Kwang-Ting Cheng
, Li-C. Wang
:
A new sigma-delta modulator architecture for testing using digital stimulus. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(1): 206-213 (2004) - [c57]Kai Yang, Kwang-Ting Cheng, Li-C. Wang:
TranGen: a SAT-based ATPG for path-oriented transition faults. ASP-DAC 2004: 92-97 - [c56]Chee-Kian Ong, Dongwoo Hong, Kwang-Ting Cheng, Li-C. Wang:
Jitter spectral extraction for multi-gigahertz signal. ASP-DAC 2004: 298-303 - [c55]Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Li-C. Wang:
Efficient reachability checking using sequential SAT. ASP-DAC 2004: 418-423 - [c54]Tao Feng, Li-C. Wang, Kwang-Ting Cheng:
Improved symbolic simulation by functional-space decomposition. ASP-DAC 2004: 634-639 - [c53]Ganapathy Parthasarathy
, Madhu K. Iyer, Kwang-Ting Cheng
, Li-C. Wang:
An efficient finite-domain constraint solver for circuits. DAC 2004: 212-217 - [c52]Li-C. Wang, T. M. Mak, Kwang-Ting Cheng
, Magdy S. Abadir:
On path-based learning and its applications in delay test and diagnosis. DAC 2004: 492-497 - [c51]Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Chih-Chan Lin:
Improved Symoblic Simulation by Dynamic Funtional Space Partitioning. DATE 2004: 42-49 - [c50]Mango Chia-Tso Chao, Li-C. Wang
, Kwang-Ting Cheng
:
Pattern Selection for Testing of Deep Sub-Micron Timing Defects. DATE 2004: 160 - [c49]Chee-Kian Ong, Dongwoo Hong, Kwang-Ting Cheng, Li-C. Wang:
Random Jitter Extraction Technique in a Multi-Gigahertz Signal. DATE 2004: 286-291 - [c48]Li-C. Wang
:
Regression Simulation: Applying Path-Based Learning In Delay Test and Post-Silicon Validation. DATE 2004: 692-695 - [c47]Tao Feng, Li-C. Wang
, Kwang-Ting Cheng
, Andy Lin:
On using a 2-domain partitioned OBDD data structure in verification. HLDVT 2004: 49-54 - [c46]Rob A. Rutenbar, Li-C. Wang, Kwang-Ting Cheng, Sandip Kundu:
Static statistical timing analysis for latch-based pipeline designs. ICCAD 2004: 468-472 - [c45]Leonard Lee, Li-C. Wang, T. M. Mak, Kwang-Ting Cheng:
A path-based methodology for post-silicon timing validation. ICCAD 2004: 713-720 - [c44]Jing Zeng, Magdy S. Abadir, A. Kolhatkar, G. Vandling, Li-C. Wang, Jacob A. Abraham:
On Correlating Structural Tests with Functional Tests for Speed Binning of High Performance Design. ITC 2004: 31-37 - [c43]Jing Zeng, Magdy S. Abadir, G. Vandling, Li-C. Wang
, S. Karako, Jacob A. Abraham:
On Correlating Structural Tests with Functional Tests for Speed Binning of High Performance Design. MTV 2004: 103-109 - [c42]Chee-Kian Ong, Dongwoo Hong, Kwang-Ting Cheng, Li-C. Wang:
A Scalable On-Chip Jitter Extraction Technique. VTS 2004: 267-272 - 2003
- [j8]Li-C. Wang, Tao Feng, Kwang-Ting (Tim) Cheng
, Magdy S. Abadir, Manish Pandey:
Enhanced Symbolic Simulation for Functional Verification of Embedded Array Systems. Des. Autom. Embed. Syst. 8(2-3): 173-188 (2003) - [j7]Kenneth M. Butler, Kwang-Ting (Tim) Cheng
, Li-C. Wang
:
Guest Editors' Introduction: Speed Test and Speed Binning for Complex ICs. IEEE Des. Test Comput. 20(5): 6-7 (2003) - [j6]Jing-Jia Liou, Li-C. Wang, Angela Krstic, Kwang-Ting (Tim) Cheng:
Critical Path Selection for Deep Sub-Micron Delay Test and Timing Validation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(12): 3038-3048 (2003) - [c41]Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Manish Pandey, Magdy S. Abadir:
Enhanced symbolic simulation for efficient verification of embedded array systems. ASP-DAC 2003: 302-307 - [c40]Chee-Kian Ong, Kwang-Ting (Tim) Cheng, Li-C. Wang:
Delta-sigma modulator based mixed-signal BIST architecture for SoC. ASP-DAC 2003: 669-674 - [c39]Jing-Jia Liou, Li-C. Wang, Angela Krstic, Kwang-Ting Cheng:
Experience in critical path selection for deep sub-micron delay test and timing validation. ASP-DAC 2003: 751-756 - [c38]Feng Lu, Li-C. Wang, Kwang-Ting Cheng
, John Moondanos, Ziyad Hanna:
A signal correlation guided ATPG solver and its applications for solving difficult industrial cases. DAC 2003: 436-441 - [c37]Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou, T. M. Mak:
Enhancing diagnosis resolution for delay defects based upon statistical timing and statistical fault models. DAC 2003: 668-673 - [c36]Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, Jing-Jia Liou, Magdy S. Abadir:
Delay Defect Diagnosis Based Upon Statistical Timing Models - The First Step. DATE 2003: 10328-10335 - [c35]Feng Lu, Li-C. Wang, Kwang-Ting Cheng, Ric C.-Y. Huang:
A Circuit SAT Solver With Signal Correlation Guided Learning. DATE 2003: 10892-10897 - [c34]Ganapathy Parthasarathy
, Madhu K. Iyer, Kwang-Ting Cheng
, Li-C. Wang
:
A comparison of BDDs, BMC, and sequential SAT for model checking. HLDVT 2003: 157-162 - [c33]Angela Krstic, Jing-Jia Liou, Kwang-Ting Cheng
, Li-C. Wang
:
On Structural vs. Functional Testing for Delay Faults. ISQED 2003: 438-441 - [c32]Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, T. M. Mak:
Diagnosis-Based Post-Silicon Timing Validation Using Statistical Tools and Methodologies. ITC 2003: 339-348 - [c31]Li-C. Wang, Angela Krstic, Leonard Lee, Kwang-Ting Cheng, M. Ray Mercer, Thomas W. Williams, Magdy S. Abadir:
Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects. ITC 2003: 1041-1050 - [c30]Angela Krstic, Li-C. Wang
, Kwang-Ting Cheng
, Jing-Jia Liou:
Diagnosis of Delay Defects Using Statistical Timing Models. VTS 2003: 339-344 - 2002
- [c29]Jing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams:
Enhancing test efficiency for delay fault testing using multiple-clocked schemes. DAC 2002: 371-374 - [c28]Jing-Jia Liou, Angela Krstic, Li-C. Wang, Kwang-Ting Cheng:
False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation. DAC 2002: 566-569 - [c27]Jennifer Dworak, James Wingfield, Brad Cobb, Sooryong Lee, Li-C. Wang
, M. Ray Mercer:
Fortuitous Detection and its Impact on Test Set Sizes Using Stuck-at and Transition Faults. DFT 2002: 177-185 - [c26]Jing-Jia Liou, Li-C. Wang
, Kwang-Ting Cheng
:
On theoretical and practical considerations of path selection for delay fault testing. ICCAD 2002: 94-100 - [c25]Ganapathy Parthasarathy, Madhu K. Iyer, Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Magdy S. Abadir:
Combining ATPG and Symbolic Simulation for Efficient Validation of Embedded Array Systems. ITC 2002: 203-212 - [c24]Li-C. Wang
, Magdy S. Abadir, Juhong Zhu:
On Testing High-Performance Custom Circuits without Explicit Testing of the Internal Faults. ITC 2002: 398-406 - [c23]Jing-Jia Liou, Li-C. Wang
, Kwang-Ting Cheng
, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams:
Analysis of Delay Test Effectiveness with a Multiple-Clock Scheme. ITC 2002: 407-416 - [c22]Li-C. Wang, Magdy S. Abadir:
Validation and Verification of Complex Digital Systems: A Practical Perspective. LATW 2002: 1 - 2001
- [j5]Jennifer Dworak, Jason D. Wicker, Sooryong Lee, Michael R. Grimaila, M. Ray Mercer, Kenneth M. Butler, Bret Stewart, Li-C. Wang
:
Defect-Oriented Testing and Defective-Part-Level Prediction. IEEE Des. Test Comput. 18(1): 31-41 (2001) - [c21]Jianbang Lai, Ming-Shiun Lin, Ting-Chi Wang, Li-C. Wang:
Module placement with boundary constraints using the sequence-pair representation. ASP-DAC 2001: 515-520 - [c20]Magdy S. Abadir, Li-C. Wang:
Verification and Validation of Complex Digital Systems: An Industrial Perspective. ISQED 2001: 11-12 - [c19]Magdy S. Abadir, Juhong Zhu, Li-C. Wang:
Analysis of Testing Methodologies for Custom Designs in PowerPCTM Microprocessor. VTS 2001: 252-259 - 2000
- [j4]Li-C. Wang, Magdy S. Abadir:
On Efficiently Producing Quality Tests for Custom Circuits in PowerPCTM Microprocessors. J. Electron. Test. 16(1-2): 121-130 (2000) - [c18]Kwang-Ting Cheng, Vishwani D. Agrawal, Jing-Yang Jou, Li-C. Wang, Chi-Feng Wu, Shianling Wu:
Collaboration between Industry and Academia in Test Research. Asian Test Symposium 2000: 17 - [c17]Jennifer Dworak, Michael R. Grimaila, Brad Cobb, Ting-Chi Wang, Li-C. Wang, M. Ray Mercer:
On the superiority of DO-RE-ME/MPG-D over stuck-at-based defective part level prediction. Asian Test Symposium 2000: 151- - [c16]Jennifer Dworak, Michael R. Grimaila, Sooryong Lee, Li-C. Wang, M. Ray Mercer:
Enhanced DO-RE-ME based defect level prediction using defect site aggregation-MPG-D. ITC 2000: 930-939
1990 – 1999
- 1999
- [j3]Li-C. Wang, Magdy S. Abadir:
Experience in Validation of PowerPCTM Microprocessor Embedded Arrays. J. Electron. Test. 15(1-2): 191-205 (1999) - [c15]Li-C. Wang, Magdy S. Abadir:
Tradeoff analysis for producing high quality tests for custom circuits in PowerPC microprocessors. ITC 1999: 830-838 - [c14]Jennifer Dworak, Michael R. Grimaila, Sooryong Lee, Li-C. Wang, M. Ray Mercer:
Modeling the probability of defect excitation for a commercial IC with implications for stuck-at fault-based ATPG strategies. ITC 1999: 1031-1037 - [c13]Michael R. Grimaila, Sooryong Lee, Jennifer Dworak, Kenneth M. Butler, Bret Stewart, Hari Balachandran, Bryan Houchins, Vineet Mathur, Jaehong Park, Li-C. Wang, M. Ray Mercer:
REDO - Probabilistic Excitation and Deterministic Observation - First Commercial Experimen. VTS 1999: 268-274 - 1998
- [j2]Li-C. Wang, Magdy S. Abadir:
Test Generation Based on High-Level Assertion Specification for PowerPCTM Microprocessor Embedded Arrays. J. Electron. Test. 13(2): 121-135 (1998) - [j1]Li-C. Wang, Magdy S. Abadir, Jing Zeng:
On measuring the effectiveness of various design validation approaches for PowerPC microprocessor embedded arrays. ACM Trans. Design Autom. Electr. Syst. 3(4): 524-532 (1998) - [c12]Li-C. Wang, Magdy S. Abadir, Nari Krishnamurthy:
Automatic Generation of Assertions for Formal Verification of PowerPC Microprocessor Arrays Using Symbolic Trajectory Evaluation. DAC 1998: 534-537 - [c11]Li-C. Wang
, Magdy S. Abadir, Jing Zeng:
Measuring the Effectiveness of Various Design Validation Approaches For PowerPC(TM) Microprocessor Arrays. DATE 1998: 273-277 - [c10]Arun Chandra, Li-C. Wang, Magdy S. Abadir:
Practical Considerations in Formal Equivalence Checking of PowerPC(tm) Microprocessors. Great Lakes Symposium on VLSI 1998: 362-367 - [c9]Li-C. Wang, Magdy S. Abadir, Jing Zeng:
On Logic and Transistor Level Design Error Detection of Various Validation Approaches for PowerPC(tm) Microprocessor Arrays. VTS 1998: 260-265 - 1997
- [c8]Li-C. Wang, Magdy S. Abadir:
A New Validation Methodology Combining Test and Formal Verification for PowerPCTM Microprocessor Arrays. ITC 1997: 954-963 - 1996
- [c7]Li-C. Wang, M. Ray Mercer, Thomas W. Williams:
A Better ATPG Algorithm and Its Design Principles. ICCD 1996: 248-253 - [c6]Li-C. Wang, M. Ray Mercer, Thomas W. Williams:
Using Target Faults To Detect Non-Tartget Defects. ITC 1996: 629-638 - 1995
- [c5]Li-C. Wang, M. Ray Mercer, Thomas W. Williams:
Enhanced testing performance via unbiased test sets. ED&TC 1995: 294-302 - [c4]Li-C. Wang, M. Ray Mercer, Thomas W. Williams:
On Efficiently and Reliably Achieving Low Defective Part Levels. ITC 1995: 616-625 - [c3]Li-C. Wang, M. Ray Mercer, Sophia W. Kao, Thomas W. Williams:
On the decline of testing efficiency as fault coverage approaches 100%. VTS 1995: 74-83 - 1993
- [c2]Albert G. Greenberg, Boris D. Lubachevsky, Li-C. Wang:
Experience in Massively Parallel Discrete Event Simulation. SPAA 1993: 193-202 - 1991
- [c1]Vijaya Ramachandran, Li-Chung Wang:
Parallel algorithm and complexity results for telephone link simulation. SPDP 1991: 378-385
Coauthor Index
aka: Jay Bhadra
aka: Kwang-Ting (Tim) Cheng
aka: Nikolas Sumikawa
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