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ORCIDHillel Miller
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2000 – 2009
- 2009
[c7]Mrinal Bose, Prashant Naphade, Jayanta Bhadra, Hillel Miller:
An abstraction mechanism to maximize stimulus portability across RTL, FPGA, software models and silicon of SoCs. ISQED 2009: 377-381- 2006
- [c6]Avishay Maman, Sharon Goldschlager, Hillel Miller, David Bell, Rob Slater, Oded Ben-Moshe, Nissan Levi, Hagit Gilboa:
Reusable On-Chip System Level Verification for Simulation Emulation and Silicon. HLDVT 2006: 119-126 - [c5]Onur Guzey, Charles H.-P. Wen
, Li-C. Wang, Tao Feng, Hillel Miller, Magdy S. Abadir:
Extracting a Simplified View of Design Functionality Based on Vector Simulation. Haifa Verification Conference 2006: 34-49 - 2004
- [c4]Michal Silbermintz, Amir Sahar, Itay Peled, Moshe Anschel, Emil Watralov, Hillel Miller, Eytan Weisberger:
SOC modeling methodology for architectural exploration and software development. ICECS 2004: 383-386 - [c3]Eyal Segev, Sharon Goldshlager, Hillel Miller, Oren Shua, Olga Sher, Shlomo Greenberg:
Evaluating and comparing simulation verification vs. formal verification approach on block level design. ICECS 2004: 515-518 - 2000
- [j2]Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz:
Automatic Vector Generation Using Constraints and Biasing. J. Electron. Test. 16(1-2): 107-120 (2000)
1990 – 1999
- 1999
- [j1]Shmuel Katz, Hillel Miller:
Saving Space by Fully Exploiting Invisible Transitions. Formal Methods Syst. Des. 14(3): 311-332 (1999) - [c2]Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz:
Modeling design constraints and biasing in simulation using BDDs. ICCAD 1999: 584-590 - 1996
- [c1]Hillel Miller, Shmuel Katz:
Saving Space by Fully Exploiting Invisible Transitions. CAV 1996: 336-347
Coauthor Index
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