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2020 – today
- 2025
[j56]Alexander J. Edwards
, Naimul Hassan, Jared Arzate, Alexander N. Chin, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman:
Physically Secure Logic Locking With Nanomagnet Logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(1): 105-118 (2025)- [j55]Apurva Jain, Thomas Broadfoot, Yiorgos Makris, Carl Sechen:
Modeling Bidirectional Switches for Enabling Logic Equivalence Checking in a Transistor-Level Programmable Fabric. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 44(1): 385-389 (2025) - 2024
- [j54]Ke Huang, Yu Liu, Nenad Korolija, John M. Carulli, Yiorgos Makris:
Statistical Methods for Detecting Recycled Electronics: From ICs to PCBs and Beyond. IEEE Des. Test 41(2): 15-22 (2024) - [j53]Shamik Kundu, Sanjay Das, Sayar Karmakar, Arnab Raha, Souvik Kundu, Yiorgos Makris, Kanad Basu:
Bit-by-Bit: Investigating the Vulnerabilities of Binary Neural Networks to Adversarial Bit Flipping. Trans. Mach. Learn. Res. 2024 (2024) - [c169]Xingyu Meng, Amisha Srivastava, Ayush Arunachalam, Avik Ray, Pedro Henrique Silva, Rafail Psiakis, Yiorgos Makris, Kanad Basu:
NSPG: Natural language Processing-based Security Property Generator for Hardware Security Assurance. DAC 2024: 154:1-154:6 - [c168]Matthew Nigh, John M. Carulli, Yiorgos Makris:
Generation and Quality Evaluation of Synthetic Process Control Monitoring Data. ITC 2024: 226-232 - [c167]N. Afroz, A. Sayem, Georgios Volanis, Dzmitry Maliuk, Haralampos-G. Stratigopoulos, Yiorgos Makris:
On the Sensitivity of Analog Artificial Neural Network Models to Process Variation. VTS 2024: 1-7 - [c166]Apurva Jain, Thomas Broadfoot, Carl Sechen, Yiorgos Makris:
Testing a Transistor-Level Programmable Fabric: Challenges and Solutions. VTS 2024: 1-7 - 2023
- [c165]Apurva Jain, Thomas Broadfoot, Yiorgos Makris, Carl Sechen:
Quo Vadis Signal? Automated Directionality Extraction for Post-Programming Verification of a Transistor-Level Programmable Fabric. DATE 2023: 1-2 - [c164]Chaitali Sathe, Yiorgos Makris, Benjamin Carrion Schafer:
MANTIS: Machine Learning-Based Approximate ModeliNg of RedacTed Integrated CircuitS. DATE 2023: 1-6 - [c163]Zhaokun Han, Mohammed Shayan, Aneesh Dixit, Mustafa M. Shihab, Yiorgos Makris, Jeyavijayan Rajendran:
FuncTeller: How Well Does eFPGA Hide Functionality? USENIX Security Symposium 2023: 5809-5826 - [c162]V. A. Niranjan, Deepika Neethirajan, Constantinos Xanthopoulos, D. Webster, Amit Nahar, Yiorgos Makris:
Machine Learning-Based Adaptive Outlier Detection for Underkill Reduction in Analog/RF IC Testing. VTS 2023: 1-7 - [i6]Josiah W. Smith, Shiva Thiagarajan, Richard Willis, Yiorgos Makris, Murat Torlak:
Improved Static Hand Gesture Classification on Deep Convolutional Neural Networks using Novel Sterile Training Technique. CoRR abs/2305.02039 (2023) - [i5]Christos Vasileiou, Josiah W. Smith, Shiva Thiagarajan, Matthew Nigh, Yiorgos Makris, Murat Torlak:
Efficient CNN-based Super Resolution Algorithms for mmWave Mobile Radar Imaging. CoRR abs/2305.02092 (2023) - [i4]Zhaokun Han, Mohammed Shayan, Aneesh Dixit, Mustafa M. Shihab, Yiorgos Makris, Jeyavijayan Rajendran:
FuncTeller: How Well Does eFPGA Hide Functionality? CoRR abs/2306.05532 (2023) - [i3]Xingyu Meng, Amisha Srivastava, Ayush Arunachalam, Avik Ray, Pedro Henrique Silva, Rafail Psiakis, Yiorgos Makris, Kanad Basu:
Unlocking Hardware Security Assurance: The Potential of LLMs. CoRR abs/2308.11042 (2023) - 2022
- [c161]Shiva Shankar Thiagarajan, Suriyaprakash Natarajan, Yiorgos Makris:
A defect tolerance framework for improving yield. DAC 2022: 847-852 - [c160]Alexander J. Edwards, Naimul Hassan, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman:
Physically and Algorithmically Secure Logic Locking with Hybrid CMOS/Nanomagnet Logic Circuits. DATE 2022: 17-22 - [c159]Christos Vasileiou, Josiah W. Smith, Shiva Thiagarajan, Matthew Nigh, Yiorgos Makris, Murat Torlak:
Efficient CNN-Based Super Resolution Algorithms for Mmwave Mobile Radar Imaging. ICIP 2022: 3803-3807 - [c158]Deepika Neethirajan, V. A. Niranjan, Richard Willis, Amit Nahar, D. Webster, Yiorgos Makris:
Machine Learning-Based Overkill Reduction through Inter-Test Correlation. VTS 2022: 1-7 - 2021
- [j52]Josiah W. Smith, Shiva Thiagarajan, Richard Willis, Yiorgos Makris, Murat Torlak:
Improved Static Hand Gesture Classification on Deep Convolutional Neural Networks Using Novel Sterile Training Technique. IEEE Access 9: 10893-10902 (2021) - [j51]Mohammad-Mahdi Bidmeshki, Yunjie Zhang, Monir Zaman, Liwei Zhou, Yiorgos Makris:
Hunting Security Bugs in SoC Designs: Lessons Learned. IEEE Des. Test 38(1): 22-29 (2021) - [j50]Liwei Zhou, Yunjie Zhang, Yiorgos Makris:
TPE: A Hardware-Based TLB Profiling Expert for Workload Reconstruction. IEEE J. Emerg. Sel. Topics Circuits Syst. 11(2): 292-305 (2021) - [j49]Mohammad-Mahdi Bidmeshki, Angelos Antonopoulos, Yiorgos Makris:
Proof-Carrying Hardware-Based Information Flow Tracking in Analog/Mixed-Signal Designs. IEEE J. Emerg. Sel. Topics Circuits Syst. 11(2): 415-427 (2021) - [j48]Kang Liu, Benjamin Tan, Gaurav Rajavendra Reddy, Siddharth Garg, Yiorgos Makris, Ramesh Karri:
Bias Busters: Robustifying DL-Based Lithographic Hotspot Detectors Against Backdooring Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(10): 2077-2089 (2021) - [j47]Gaurav Rajavendra Reddy, Constantinos Xanthopoulos, Yiorgos Makris:
On Improving Hotspot Detection Through Synthetic Pattern-Based Database Enhancement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(12): 2522-2527 (2021) - [c157]Naimul Hassan, Alexander J. Edwards, Dhritiman Bhattacharya, Mustafa M. Shihab, Varun Venkat, Peng Zhou, Xuan Hu, Shamik Kundu, Abraham Peedikayil Kuruvila, Kanad Basu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman:
Secure Logic Locking with Strain-Protected Nanomagnet Logic. DAC 2021: 127-132 - [c156]Zi Wang, Shayan Omais Mohammed, Yiorgos Makris, Benjamin Carrión Schäfer:
Functional Locking through Omission: From HLS to Obfuscated Design. ICCD 2021: 591-598 - [c155]V. A. Niranjan, Deepika Neethirajan, Constantinos Xanthopoulos, E. De La Rosa, C. Alleyne, S. Mier, Yiorgos Makris:
Trim Time Reduction in Analog/RF ICs Based on Inter-Trim Correlation. VTS 2021: 1-7 - 2020
- [j46]Yunjie Zhang, Liwei Zhou, Yiorgos Makris:
Hardware-Based Real-Time Workload Forensics. IEEE Des. Test 37(4): 52-58 (2020) - [j45]Liwei Zhou, Yang Hu, Yiorgos Makris:
A Hardware-Based Architecture-Neutral Framework for Real-Time IoT Workload Forensics. IEEE Trans. Computers 69(11): 1668-1680 (2020) - [j44]Kiruba Sankaran Subramani, Noha M. Helal, Angelos Antonopoulos, Aria Nosratinia, Yiorgos Makris:
Amplitude-Modulating Analog/RF Hardware Trojans in Wireless Networks: Risks and Remedies. IEEE Trans. Inf. Forensics Secur. 15: 3497-3510 (2020) - [c154]Yunjie Zhang, Yiorgos Makris:
Hardware-Based Detection of Spectre Attacks: A Machine Learning Approach. AsianHOST 2020: 1-6 - [c153]Jianqi Chen, Monir Zaman, Yiorgos Makris, R. D. Shawn Blanton, Subhasish Mitra, Benjamin Carrión Schäfer:
DECOY: DEflection-Driven HLS-Based Computation Partitioning for Obfuscating Intellectual PropertY. DAC 2020: 1-6 - [c152]Sai Govinda Rao Nimmalapudi, Georgios Volanis, Yichuan Lu, Angelos Antonopoulos, Andrew Marshall, Yiorgos Makris:
Range-Controlled Floating-Gate Transistors: A Unified Solution for Unlocking and Calibrating Analog ICs. DATE 2020: 286-289 - [c151]Bo Hu, Mustafa M. Shihab, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen:
An Efficient MILP-Based Aging-Aware Floorplanner for Multi-Context Coarse-Grained Runtime Reconfigurable FPGAs. DATE 2020: 1526-1531 - [c150]Mustafa M. Shihab, Bharath Ramanidharan, Gaurav Rajavendra Reddy, Jingxiang Tian, William Swartz, Carl Sechen, Yiorgos Makris:
CASPER: CAD Framework for a Novel Transistor-Level Programmable Fabric. ISCAS 2020: 1-5 - [c149]Mustafa Munawar Shihab, Bharath Ramanidharan, Suraag Sunil Tellakula, Gaurav Rajavendra Reddy, Jingxiang Tian, Carl Sechen, Yiorgos Makris:
ATTEST: Application-Agnostic Testing of a Novel Transistor-Level Programmable Fabric. VTS 2020: 1-6 - [i2]Kang Liu, Benjamin Tan, Gaurav Rajavendra Reddy, Siddharth Garg, Yiorgos Makris, Ramesh Karri:
Bias Busters: Robustifying DL-based Lithographic Hotspot Detectors Against Backdooring Attacks. CoRR abs/2004.12492 (2020) - [i1]Gaurav Rajavendra Reddy, Constantinos Xanthopoulos, Yiorgos Makris:
On Improving Hotspot Detection Through Synthetic Pattern-Based Database Enhancement. CoRR abs/2007.05879 (2020)
2010 – 2019
- 2019
- [j43]Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris:
CAPE: A cross-layer framework for accurate microprocessor power estimation. Integr. 68: 87-98 (2019) - [j42]Kiruba Sankaran Subramani, Angelos Antonopoulos, Ahmed Attia Abotabl, Aria Nosratinia, Yiorgos Makris:
Demonstrating and Mitigating the Risk of an FEC-Based Hardware Trojan in Wireless Networks. IEEE Trans. Inf. Forensics Secur. 14(10): 2720-2734 (2019) - [c148]Mustafa M. Shihab, Jingxiang Tian, Gaurav Rajavendra Reddy, Bo Hu, William Swartz, Benjamin Carrión Schäfer, Carl Sechen, Yiorgos Makris:
Design Obfuscation through Selective Post-Fabrication Transistor-Level Programming. DATE 2019: 528-533 - [c147]Constantinos Xanthopoulos, Deepika Neethirajan, Sirish Boddikurapati, Amit Nahar, Yiorgos Makris:
Wafer-Level Adaptive Vmin Calibration Seed Forecasting. DATE 2019: 1673-1678 - [c146]Bo Hu, Jingxiang Tian, Mustafa M. Shihab, Gaurav Rajavendra Reddy, William Swartz, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen:
Functional Obfuscation of Hardware Accelerators through Selective Partial Design Extraction onto an Embedded FPGA. ACM Great Lakes Symposium on VLSI 2019: 171-176 - [c145]Gaurav Rajavendra Reddy, Kareem Madkour, Yiorgos Makris:
Machine Learning-Based Hotspot Detection: Fallacies, Pitfalls and Marching Orders. ICCAD 2019: 1-8 - [c144]Mohammad-Mahdi Bidmeshki, Kiruba Sankaran Subramani, Yiorgos Makris:
Revisiting Capacitor-Based Trojan Design. ICCD 2019: 309-312 - [c143]Bo Hu, Mustafa M. Shihab, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen:
Extending the Lifetime of Coarse-Grained Runtime Reconfigurable FPGAs by Balancing Processing Element Usage. FPT 2019: 291-294 - [c142]Constantinos Xanthopoulos, Arnold Neckermann, Paulus List, Klaus-Peter Tschernay, Peter Sarson, Yiorgos Makris:
Automated Die Inking through On-line Machine Learning. IOLTS 2019: 27-32 - [c141]Kiruba S. Subramani, Georgios Volanis, Mohammad-Mahdi Bidmeshki, Angelos Antonopoulos, Yiorgos Makris:
Trusted and Secure Design of Analog/RF ICs: Recent Developments. IOLTS 2019: 125-128 - [c140]Kosuke Ikeda, Keith Schaub, Ira Leventhal, Yiorgos Makris, Constantinos Xanthopoulos, Deepika Neethirajan:
Subtle Anomaly Detection of Microscopic Probes using Deep learning based Image Completion. ITC 2019: 1-3 - [c139]Gaurav Rajavendra Reddy, Mohammad-Mahdi Bidmeshki, Yiorgos Makris:
VIPER: A Versatile and Intuitive Pattern GenERator for Early Design Space Exploration. ITC 2019: 1-7 - [c138]Gaurav Rajavendra Reddy, Yiorgos Makris:
Design Space Exploration for Hotspot Detection. MTV 2019: 73-77 - [c137]Angelos Antonopoulos, Georgios Volanis, Yichuan Lu, Yiorgos Makris:
Post-Production Calibration of Analog/RF ICs: Recent Developments and A Fully Integrated Solution. SMACD 2019: 77-80 - [c136]Deepika Neethirajan, Constantinos Xanthopoulos, Kiruba S. Subramani, Keith Schaub, Ira Leventhal, Yiorgos Makris:
Machine Learning-based Noise Classification and Decomposition in RF Transceivers. VTS 2019: 1-6 - [c135]Georgios Volanis, Yichuan Lu, Sai Govinda Rao Nimmalapudi, Angelos Antonopoulos, Andrew Marshall, Yiorgos Makris:
Analog Performance Locking through Neural Network-Based Biasing. VTS 2019: 1-6 - [c134]Yunjie Zhang, Liwei Zhou, Yiorgos Makris:
Hardware-based Real-time Workload Forensics via Frame-level TLB Profiling. VTS 2019: 1-6 - 2018
- [c133]Liwei Zhou, Yiorgos Makris:
Hardware-assisted rootkit detection via on-line statistical fingerprinting of process execution. DATE 2018: 1580-1585 - [c132]Monir Zaman, Abhrajit Sengupta, Danqing Liu, Ozgur Sinanoglu, Yiorgos Makris, Jeyavijayan (JV) Rajendran:
Towards provably-secure performance locking. DATE 2018: 1592-1597 - [c131]Martin Andraud, Laura Isabel Galindez Olascoaga, Yichuan Lu, Yiorgos Makris, Marian Verhelst:
On the use of Bayesian Networks for Resource-Efficient Self-Calibration of Analog/RF ICs. ITC 2018: 1-10 - [c130]Christiana Kapatsori, Yu Liu, Angelos Antonopoulos, Yiorgos Makris:
Hardware Dithering: A Run-Time Method for Trojan Neutralization in Wireless Cryptographic ICs. ITC 2018: 1-7 - [c129]Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris:
Towards a Cross-Layer Framework for Accurate Power Modeling of Microprocessor Designs. PATMOS 2018: 229-236 - [c128]Yiorgos Makris, Amit Nahar, Haralampos-G. D. Stratigopoulos, Marc Hutner:
Special session on machine learning: How will machine learning transform test? VTS 2018: 1 - [c127]Gaurav Rajavendra Reddy, Constantinos Xanthopoulos, Yiorgos Makris:
Enhanced hotspot detection through synthetic pattern generation and design of experiments. VTS 2018: 1-6 - 2017
- [j41]Angelos Antonopoulos, Christiana Kapatsori, Yiorgos Makris:
Trusted Analog/Mixed- Signal/RF ICs: A Survey and a Perspective. IEEE Des. Test 34(6): 63-76 (2017) - [j40]Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Ke Huang, Amit Nahar, Bob Orr, Michael Pas, John M. Carulli, Yiorgos Makris:
Yield Forecasting Across Semiconductor Fabrication Plants and Design Generations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(12): 2120-2133 (2017) - [j39]Yier Jin, Xiaolong Guo, Raj Gautam Dutta, Mohammad-Mahdi Bidmeshki, Yiorgos Makris:
Data Secrecy Protection Through Information Flow Tracking in Proof-Carrying Hardware IP - Part I: Framework Fundamentals. IEEE Trans. Inf. Forensics Secur. 12(10): 2416-2429 (2017) - [j38]Mohammad-Mahdi Bidmeshki, Xiaolong Guo, Raj Gautam Dutta, Yier Jin, Yiorgos Makris:
Data Secrecy Protection Through Information Flow Tracking in Proof-Carrying Hardware IP - Part II: Framework Automation. IEEE Trans. Inf. Forensics Secur. 12(10): 2430-2443 (2017) - [j37]Yu Liu, Yier Jin, Aria Nosratinia, Yiorgos Makris:
Silicon Demonstration of Hardware Trojan Design and Detection in Wireless Cryptographic ICs. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1506-1519 (2017) - [c126]Jingxiang Tian, Gaurav Rajavendra Reddy, Jiajia Wang, William Swartz, Yiorgos Makris, Carl Sechen:
A field programmable transistor array featuring single-cycle partial/full dynamic reconfiguration. DATE 2017: 1336-1341 - [c125]Liwei Zhou, Yiorgos Makris:
Hardware-based on-line intrusion detection via system call routine fingerprinting. DATE 2017: 1546-1551 - [c124]Mohammad-Mahdi Bidmeshki, Angelos Antonopoulos, Yiorgos Makris:
Information flow tracking in analog/mixed-signal designs through proof-carrying hardware IP. DATE 2017: 1703-1708 - [c123]Angelos Antonopoulos, Christiana Kapatsori, Yiorgos Makris:
Security and trust in the analog/mixed-signal/RF domain: A survey and a perspective. ETS 2017: 1-10 - [c122]Muhammad Yasin, Abhrajit Sengupta, Benjamin Carrión Schäfer, Yiorgos Makris, Ozgur Sinanoglu, Jeyavijayan Rajendran:
What to Lock?: Functional and Parametric Locking. ACM Great Lakes Symposium on VLSI 2017: 351-356 - [c121]Kiruba Sankaran Subramani, Angelos Antonopoulos, Ahmed Attia Abotabl, Aria Nosratinia, Yiorgos Makris:
INFECT: INconspicuous FEC-based Trojan: A hardware attack on an 802.11a/g wireless network. HOST 2017: 90-94 - [c120]Kiruba Sankaran Subramani, Angelos Antonopoulos, Ahmed Attia Abotabl, Aria Nosratinia, Yiorgos Makris:
ACE: Adaptive channel estimation for detecting analog/RF trojans in WLAN transceivers. ICCAD 2017: 722-727 - [c119]Constantinos Xanthopoulos, Ali Ahmadi, Sirish Boddikurapati, Amit Nahar, Bob Orr, Yiorgos Makris:
Wafer-level adaptive trim seed forecasting based on E-tests. ISCAS 2017: 1-4 - [c118]Constantinos Xanthopoulos, Peter Sarson, Heinz Reiter, Yiorgos Makris:
Automated die inking: A pattern recognition-based approach. ITC 2017: 1-6 - [c117]Yichuan Lu, Georgios Volanis, Kiruba S. Subramani, Angelos Antonopoulos, Yiorgos Makris:
Knob non-idealities in learning-based post-production tuning of analog/RF ICs: Impact & remedies. VTS 2017: 1-6 - [c116]Yiorgos Makris, Srivaths Ravi, Amit Majumdar:
Foreword. VTS 2017: 1-2 - 2016
- [j36]Georgios Volanis, Angelos Antonopoulos, Alkis A. Hatzopoulos, Yiorgos Makris:
Toward Silicon-Based Cognitive Neuromorphic ICs - A Survey. IEEE Des. Test 33(3): 91-102 (2016) - [c115]Liwei Zhou, Yiorgos Makris:
Hardware-based workload forensics: Process reconstruction via TLB monitoring. HOST 2016: 167-172 - [c114]Ali Ahmadi, Mohammad-Mahdi Bidmeshki, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris:
A machine learning approach to fab-of-origin attestation. ICCAD 2016: 92 - [c113]Mohammad-Mahdi Bidmeshki, Gaurav Rajavendra Reddy, Liwei Zhou, Jeyavijayan Rajendran, Yiorgos Makris:
Hardware-based attacks to compromise the cryptographic security of an election system. ICCD 2016: 153-156 - [c112]Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris:
Harnessing fabrication process signature for predicting yield across designs. ISCAS 2016: 898-901 - [c111]Ali Ahmadi, Constantinos Xanthopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris:
Harnessing process variations for optimizing wafer-level probe-test flow. ITC 2016: 1-8 - [c110]Liwei Zhou, Yiorgos Makris:
Hardware-Based Workload Forensics and Malware Detection in Microprocessors. MTV 2016: 45-50 - [c109]Amit Jha, Ali Ahmadi, Sandeep Kshattry, T. Cao, K. Liao, Geoffrey Yeap, Yiorgos Makris, Kenneth K. O:
-197dBc/Hz FOM 4.3-GHz VCO Using an addressable array of minimum-sized nmos cross-coupled transistor pairs in 65-nm CMOS. VLSI Circuits 2016: 1-2 - [c108]Ali Ahmadi, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris:
Wafer-level process variation-driven probe-test flow selection for test cost reduction in analog/RF ICs. VTS 2016: 1-6 - [c107]Georgios Volanis, Dzmitry Maliuk, Yichuan Lu, Kiruba S. Subramani, Angelos Antonopoulos, Yiorgos Makris:
On-die learning-based self-calibration of analog/RF ICs. VTS 2016: 1-6 - 2015
- [j35]Ke Huang, Nathan Kupp, Constantinos Xanthopoulos, John M. Carulli Jr., Yiorgos Makris:
Low-Cost Analog/RF IC Testing Through Combined Intra- and Inter-Die Correlation Models. IEEE Des. Test 32(1): 53-60 (2015) - [j34]Michail Maniatakos, Maria K. Michael, Chandra Tirumurti, Yiorgos Makris:
Revisiting Vulnerability Analysis in Modern Microprocessors. IEEE Trans. Computers 64(9): 2664-2674 (2015) - [j33]Ramesh Karri, Farinaz Koushanfar, Ozgur Sinanoglu, Yiorgos Makris, Ken Mai, Ahmad-Reza Sadeghi, Swarup Bhunia:
Guest Editorial Special Section on Hardware Security and Trust. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(6): 873-874 (2015) - [j32]Ke Huang, Yu Liu, Nenad Korolija, John M. Carulli, Yiorgos Makris:
Recycled IC Detection Based on Statistical Methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(6): 947-960 (2015) - [j31]Dzmitry Maliuk, Yiorgos Makris:
An Experimentation Platform for On-Chip Integration of Analog Neural Networks: A Pathway to Trusted and Robust Analog/RF ICs. IEEE Trans. Neural Networks Learn. Syst. 26(8): 1721-1734 (2015) - [j30]Michail Maniatakos, Maria K. Michael, Yiorgos Makris:
Multiple-Bit Upset Protection in Microprocessor Memory Arrays Using Vulnerability-Based Parity Optimization and Interleaving. IEEE Trans. Very Large Scale Integr. Syst. 23(11): 2447-2460 (2015) - [c106]Mohammad-Mahdi Bidmeshki, Yiorgos Makris:
Toward automatic proof generation for information flow policies in third-party hardware IP. HOST 2015: 163-168 - [c105]Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris:
Yield Forecasting in Fab-to-Fab Production Migration Based on Bayesian Model Fusion. ICCAD 2015: 9-14 - [c104]Monir Zaman, Ali Ahmadi, Yiorgos Makris:
Workload characterization and prediction: A pathway to reliable multi-core systems. IOLTS 2015: 116-121 - [c103]Mohammad-Mahdi Bidmeshki, Yiorgos Makris:
VeriCoq: A Verilog-to-Coq converter for proof-carrying hardware automation. ISCAS 2015: 29-32 - [c102]Yichuan Lu, Kiruba S. Subramani, He Huang, Nathan Kupp, Yiorgos Makris:
Silicon Demonstration of Statistical Post-Production Tuning. ISVLSI 2015: 628-633 - [c101]Yu Liu, Georgios Volanis, Ke Huang, Yiorgos Makris:
Concurrent hardware Trojan detection in wireless cryptographic ICs. ITC 2015: 1-8 - [c100]Yichuan Lu, Kiruba S. Subramani, He Huang, Nathan Kupp, Ke Huang, Yiorgos Makris:
A comparative study of one-shot statistical calibration methods for analog / RF ICs. ITC 2015: 1-10 - [c99]Ali Ahmadi, Ke Huang, Amit Nahar, Bob Orr, Michael Pas, John M. Carulli, Yiorgos Makris:
Yield prognosis for fab-to-fab product migration. VTS 2015: 1-6 - 2014
- [j29]Ujjwal Guin, Ke Huang, Daniel DiMase, John M. Carulli, Mohammad Tehranipoor, Yiorgos Makris:
Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain. Proc. IEEE 102(8): 1207-1228 (2014) - [c98]Yu Liu, Ke Huang, Yiorgos Makris:
Hardware Trojan Detection through Golden Chip-Free Statistical Side-Channel Fingerprinting. DAC 2014: 155:1-155:6 - [c97]Dzmitry Maliuk, Yiorgos Makris:
An analog non-volatile neural network platform for prototyping RF BIST solutions. DATE 2014: 1-6 - [c96]Ali Ahmadi, Ke Huang, Suriyaprakash Natarajan, John M. Carulli Jr., Yiorgos Makris:
Spatio-temporal wafer-level correlation modeling with progressive sampling: A pathway to HVM yield estimation. ITC 2014: 1-10 - [c95]Constantinos Xanthopoulos, Ke Huang, Abbas Poonawala, Amit Nahar, Bob Orr, John M. Carulli Jr., Yiorgos Makris:
IC laser trimming speed-up through wafer-level spatial correlation modeling. ITC 2014: 1-7 - [c94]Dzmitry Maliuk, Yiorgos Makris:
On-chip intelligence: A pathway to self-testable, tunable, and trusted analog/RF ICs. MWSCAS 2014: 1077-1080 - 2013
- [j28]Naghmeh Karimi, Michail Maniatakos, Chandrasekharan Tirumurti, Yiorgos Makris:
On the Impact of Performance Faults in Modern Microprocessors. J. Electron. Test. 29(3): 351-366 (2013) - [j27]Michail Maniatakos, Prabhakar Kudva, Bruce M. Fleischer, Yiorgos Makris:
Low-Cost Concurrent Error Detection for Floating-Point Unit (FPU) Controllers. IEEE Trans. Computers 62(7): 1376-1388 (2013) - [c93]Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris:
Handling discontinuous effects in modeling spatial correlation of wafer-level analog/RF tests. DATE 2013: 553-558 - [c92]Michail Maniatakos, Maria K. Michael, Yiorgos Makris:
AVF-driven parity optimization for MBU protection of in-core memory arrays. DATE 2013: 1480-1485 - [c91]Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris:
On combining alternate test with spatial correlation modeling in analog/RF ICs. ETS 2013: 1-6 - [c90]Ozgur Sinanoglu, Naghmeh Karimi, Jeyavijayan Rajendran, Ramesh Karri, Yier Jin, Ke Huang, Yiorgos Makris:
Reconciling the IC test and security dichotomy. ETS 2013: 1-6 - [c89]Yier Jin, Bo Yang, Yiorgos Makris:
Cycle-accurate information assurance by proof-carrying based signal sensitivity tracing. HOST 2013: 99-106 - [c88]Yu Liu, Yier Jin, Yiorgos Makris:
Hardware Trojans in wireless cryptographic ICs: silicon demonstration & detection method evaluation. ICCAD 2013: 399-404 - [c87]Yier Jin, Yiorgos Makris:
A proof-carrying based framework for trusted microprocessor IP. ICCAD 2013: 824-829 - [c86]Michail Maniatakos, Maria K. Michael, Yiorgos Makris:
Investigating the limits of AVF analysis in the presence of multiple bit errors. IOLTS 2013: 49-54 - [c85]Yier Jin, Dzmitry Maliuk, Yiorgos Makris:
A post-deployment IC trust evaluation architecture. IOLTS 2013: 224-225 - [c84]Ke Huang, John M. Carulli, Yiorgos Makris:
Counterfeit electronics: A rising threat in the semiconductor manufacturing industry. ITC 2013: 1-4 - [c83]Ke Huang, Nathan Kupp, John M. Carulli Jr., Yiorgos Makris:
Process monitoring through wafer-level spatial variation decomposition. ITC 2013: 1-10 - [c82]Chen-Yong Cher, Yiorgos Makris, C. Thibeault, Alan J. Drake:
Innovative practices session 7C: Self-calibration & trimming. VTS 2013: 1 - 2012
- [j26]Nathan Kupp, Yiorgos Makris:
Applying the Model-View-Controller Paradigm to Adaptive Test. IEEE Des. Test Comput. 29(1): 28-35 (2012) - [j25]Michail Maniatakos, Chandrasekharan Tirumurti, Rajesh Galivanche, Yiorgos Makris:
Global Signal Vulnerability (GSV) Analysis for Selective State Element Hardening in Modern Microprocessors. IEEE Trans. Computers 61(10): 1361-1370 (2012) - [j24]Eric Love, Yier Jin, Yiorgos Makris:
Proof-Carrying Hardware Intellectual Property: A Pathway to Trusted Module Acquisition. IEEE Trans. Inf. Forensics Secur. 7(1): 25-40 (2012) - [c81]Yier Jin, Dzmitry Maliuk, Yiorgos Makris:
Post-deployment trust evaluation in wireless cryptographic ICs. DATE 2012: 965-970 - [c80]Ke Huang, John M. Carulli Jr., Yiorgos Makris:
Parametric counterfeit IC detection via Support Vector Machines. DFT 2012: 7-12 - [c79]Nathan Kupp, Ke Huang, John M. Carulli Jr., Yiorgos Makris:
Spatial correlation modeling for probe test cost reduction in RF devices. ICCAD 2012: 23-29 - [c78]Yier Jin, Michail Maniatakos, Yiorgos Makris:
Exposing vulnerabilities of untrusted computing platforms. ICCD 2012: 131-134 - [c77]Dzmitry Maliuk, Yiorgos Makris:
A dual-mode weight storage analog neural network platform for on-chip applications. ISCAS 2012: 2889-2892 - [c76]Nathan Kupp, Ke Huang, John M. Carulli Jr., Yiorgos Makris:
Spatial estimation of wafer measurement parameters using Gaussian process models. ITC 2012: 1-8 - [c75]Nathan Kupp, Yiorgos Makris:
Integrated optimization of semiconductor manufacturing: A machine learning approach. ITC 2012: 1-10 - [c74]Michail Maniatakos, Maria K. Michael, Yiorgos Makris:
Vulnerability-based Interleaving for Multi-Bit Upset (MBU) protection in modern microprocessors. ITC 2012: 1-8 - [c73]Dzmitry Maliuk, Nathan Kupp, Yiorgos Makris:
Towards a fully stand-alone analog/RF BIST: A cost-effective implementation of a neural classifier. VTS 2012: 62-67 - [c72]Yier Jin, Yiorgos Makris:
Proof carrying-based information flow tracking for data secrecy protection and hardware trust. VTS 2012: 252-257 - 2011
- [j23]Nathan Kupp, He Huang, Yiorgos Makris, Petros Drineas:
Improving Analog and RF Device Yield through Performance Calibration. IEEE Des. Test Comput. 28(3): 64-75 (2011) - [j22]Alfredo Benso, Yiorgos Makris, Pinaki Mazumder:
Guest Editors' Introduction: Special Section on Chips and Architectures for Emerging Technologies and Applications. IEEE Trans. Computers 60(4): 450-451 (2011) - [j21]Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris:
Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller. IEEE Trans. Computers 60(9): 1260-1273 (2011) - [j20]Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Chandra Tirumurti, Yiorgos Makris:
Workload-Cognizant Concurrent Error Detection in the Scheduler of a Modern Microprocessor. IEEE Trans. Computers 60(9): 1274-1287 (2011) - [c71]Nathan Kupp, Mustapha Slamani, Yiorgos Makris:
Correlating inline data with final test outcomes in analog/RF devices. DATE 2011: 812-817 - [c70]Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris:
AVF Analysis Acceleration via Hierarchical Fault Pruning. ETS 2011: 87-92 - [c69]Eric Love, Yier Jin, Yiorgos Makris:
Enhancing security via provably trustworthy hardware intellectual property. HOST 2011: 12-17 - [c68]Nathan Kupp, Haralampos-G. D. Stratigopoulos, Petros Drineas, Yiorgos Makris:
On proving the efficiency of alternative RF tests. ICCAD 2011: 762-767 - [c67]Yier Jin, Yiorgos Makris:
Is single-scheme Trojan prevention sufficient? ICCD 2011: 305-308 - [c66]Yier Jin, Yiorgos Makris:
PSCML: Pseudo-Static Current Mode Logic. ICECS 2011: 41-44 - [c65]Michail Maniatakos, Yiorgos Makris, Prabhakar Kudva, Bruce M. Fleischer:
Exponent monitoring for low-cost concurrent error detection in FPU control logic. VTS 2011: 235-240 - 2010
- [j19]Yier Jin, Yiorgos Makris:
Hardware Trojans in Wireless Cryptographic ICs. IEEE Des. Test Comput. 27(1): 26-35 (2010) - [j18]Haralampos-G. D. Stratigopoulos, Petros Drineas, Mustapha Slamani, Yiorgos Makris:
RF Specification Test Compaction Using Learning Machines. IEEE Trans. Very Large Scale Integr. Syst. 18(6): 998-1002 (2010) - [c64]Yier Jin, Nathan Kupp, Yiorgos Makris:
DFTT: Design for Trojan Test. ICECS 2010: 1168-1171 - [c63]Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
An analog VLSI multilayer perceptron and its application towards built-in self-test in analog circuits. IOLTS 2010: 71-76 - [c62]Nathan Kupp, He Huang, Petros Drineas, Yiorgos Makris:
Post-production performance calibration in analog/RF devices. ITC 2010: 245-254 - [c61]Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, He Huang, Yiorgos Makris:
Analog neural network design for RF built-in self-test. ITC 2010: 684-693 - [c60]Michail Maniatakos, Yiorgos Makris:
Workload-driven selective hardening of control state elements in modern microprocessors. VTS 2010: 159-164
2000 – 2009
- 2009
- [j17]Nathan Kupp, Petros Drineas, Mustapha Slamani, Yiorgos Makris:
On Boosting the Accuracy of Non-RF to RF Correlation-Based Specification Test Compaction. J. Electron. Test. 25(6): 309-321 (2009) - [j16]Feng Shi, Yiorgos Makris:
Enhancing Simulation Accuracy through Advanced Hazard Detection in Asynchronous Circuits. IEEE Trans. Computers 58(3): 394-408 (2009) - [j15]Sobeeh Almukhaizim, Feng Shi, Eric Love, Yiorgos Makris:
Soft-Error Tolerance and Mitigation in Asynchronous Burst-Mode Circuits. IEEE Trans. Very Large Scale Integr. Syst. 17(7): 869-882 (2009) - [c59]Haralampos-G. D. Stratigopoulos, Salvador Mir, Yiorgos Makris:
Enrichment of limited training sets in machine-learning-based analog/RF test. DATE 2009: 1668-1673 - [c58]Yiorgos Makris:
Workload-Cognizant Impact Analysis and its Applications in Error Detection and Tolerance in Modern Microprocessors. DFT 2009: 421-421 - [c57]Yier Jin, Nathan Kupp, Yiorgos Makris:
Experiences in Hardware Trojan Design and Implementation. HOST 2009: 50-57 - [c56]Naghmeh Karimi, Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris:
Impact analysis of performance faults in modern microprocessors. ICCD 2009: 91-96 - [c55]Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris:
Instruction-Level Impact Comparison of RT- vs. Gate-Level Faults in a Modern Microprocessor Controller. VTS 2009: 9-14 - [c54]Yiorgos Makris, Haralampos-G. D. Stratigopoulos:
Special Session 7C: TTTC 2009 Best Doctoral Thesis Contest. VTS 2009: 233 - 2008
- [j14]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Error Moderation in Low-Cost Machine-Learning-Based Analog/RF Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(2): 339-351 (2008) - [j13]Sobeeh Almukhaizim, Yiorgos Makris:
Soft Error Mitigation Through Selective Addition of Functionally Redundant Wires. IEEE Trans. Reliab. 57(1): 23-31 (2008) - [c53]Sobeeh Almukhaizim, Feng Shi, Yiorgos Makris:
Coping with Soft Errors in Asynchronous Burst-Mode Machines. ASYNC 2008: 151-160 - [c52]Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris, Abhijit Jas, Chandra Tirumurti:
Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller. DFT 2008: 454-462 - [c51]Nathan Kupp, Petros Drineas, Mustapha Slamani, Yiorgos Makris:
Confidence Estimation in Non-RF to RF Correlation-Based Specification Test Compaction. ETS 2008: 35-40 - [c50]Yier Jin, Yiorgos Makris:
Hardware Trojan Detection Using Path Delay Fingerprint. HOST 2008: 51-57 - [c49]Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris:
On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD. IOLTS 2008: 123-128 - [c48]Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Yiorgos Makris:
On the Correlation between Controller Faults and Instruction-Level Errors in Modern Microprocessors. ITC 2008: 1-10 - [c47]James Dardig, Haralampos-G. D. Stratigopoulos, Eric Stern, Mark A. Reed, Yiorgos Makris:
A Statistical Approach to Characterizing and Testing Functionalized Nanowires. VTS 2008: 267-274 - 2007
- [j12]Yiorgos Makris, Alex Orailoglu:
On the identification of modular test requirements for low cost hierarchical test path construction. Integr. 40(3): 315-325 (2007) - [j11]Sobeeh Almukhaizim, Yiorgos Makris:
Concurrent Error Detection Methods for Asynchronous Burst-Mode Machines. IEEE Trans. Computers 56(6): 785-798 (2007) - [c46]Haralampos-G. D. Stratigopoulos, Petros Drineas, Mustapha Slamani, Yiorgos Makris:
Non-RF to RF Test Correlation Using Learning Machines: A Case Study. VTS 2007: 9-14 - 2006
- [j10]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
An adaptive checker for the fully differential analog code. IEEE J. Solid State Circuits 41(6): 1421-1429 (2006) - [j9]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Concurrent detection of erroneous responses in linear analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(5): 878-891 (2006) - [j8]Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris:
Entropy-driven parity-tree selection for low-overhead concurrent error detection in finite state machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(8): 1547-1554 (2006) - [c45]Gennette Gill, Ankur Agiwal, Montek Singh, Feng Shi, Yiorgos Makris:
Low-Overhead Testing of Delay Faults in High-Speed Asynchronous Pipelines. ASYNC 2006: 46-56 - [c44]Feng Shi, Yiorgos Makris:
A Transistor-Level Test Strategy for C^2MOS MOUSETRAP Asynchronous Pipelines. ASYNC 2006: 57-67 - [c43]Sobeeh Almukhaizim, Yiorgos Makris:
Berger code-based concurrent error detection in asynchronous burst-mode machines. DATE 2006: 71-72 - [c42]Feng Shi, Yiorgos Makris:
Testing delay faults in asynchronous handshake circuits. ICCAD 2006: 193-197 - [c41]Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris:
Seamless Integration of SER in Rewiring-Based Design Space Exploration. ITC 2006: 1-9 - [c40]Andreas G. Veneris, Yiorgos Makris:
Session Abstract. VTS 2006: 290-291 - [c39]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Bridging the Accuracy of Functional and Machine-Learning-Based Mixed-Signal Testing. VTS 2006: 406-411 - 2005
- [j7]Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris:
Compaction-based concurrent error detection for digital circuits. Microelectron. J. 36(9): 856-862 (2005) - [j6]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Nonlinear decision boundaries for testing analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24(11): 1760-1773 (2005) - [c38]Feng Shi, Yiorgos Makris:
SPIN-PAC: test compaction for speed-independent circuits. ASP-DAC 2005: 71-74 - [c37]Sobeeh Almukhaizim, Yiorgos Makris:
Concurrent Error Detection in Asynchronous Burst-Mode Controllers. DATE 2005: 1272-1277 - [c36]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Generating decision regions in analog measurement spaces. ACM Great Lakes Symposium on VLSI 2005: 88-91 - [c35]Feng Shi, Yiorgos Makris, Steven M. Nowick, Montek Singh:
Test generation for ultra-high-speed asynchronous pipelines. ITC 2005: 10 - [c34]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Constructive Derivation of Analog Specification Test Criteria. VTS 2005: 395-400 - 2004
- [j5]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
An Analog Checker with Input-Relative Tolerance for Duplicate Signals. J. Electron. Test. 20(5): 479-488 (2004) - [j4]Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu:
Enhancing reliability of RTL controller-datapath circuits via Invariant-based concurrent test. IEEE Trans. Reliab. 53(2): 269-278 (2004) - [c33]Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris:
On Concurrent Error Detection with Bounded Latency in FSMs. DATE 2004: 596-603 - [c32]Feng Shi, Yiorgos Makris:
Fault simulation and random test generation for speed-independent circuits. ACM Great Lakes Symposium on VLSI 2004: 127-130 - [c31]Feng Shi, Yiorgos Makris:
SPIN-TEST: automatic test pattern generation for speed-independent circuits. ICCAD 2004: 903-908 - [c30]Feng Shi, Sobeeh Almukhaizim, Pey-Chang Lin, Yiorgos Makris:
Compiler-Based Frame Formation for Static Optimization. ICCD 2004: 466-471 - [c29]Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris:
Concurrent Error Detection for Combinational and Sequential Logic via Output Compaction. ISQED 2004: 459-464 - [c28]Feng Shi, Yiorgos Makris:
SPIN-SIM: Logic and Fault Simulation for Speed-Independent Circuits. ITC 2004: 597-606 - [c27]Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris:
Cost-Driven Selection of Parity Trees. VTS 2004: 319-324 - 2003
- [j3]Petros Drineas, Yiorgos Makris:
SPaRe: selective partial replication for concurrent fault-detection in FSMs. IEEE Trans. Instrum. Meas. 52(6): 1729-1737 (2003) - [c26]Petros Drineas, Yiorgos Makris:
Non-Intrusive Concurrent Error Detection in FSMs through State/Output Compaction and Monitoring via Parity Trees. DATE 2003: 11164-11167 - [c25]Konstantinos Rokas, Yiorgos Makris, Dimitris Gizopoulos:
Low Cost Convolutional Code Based Concurrent Error Detection in FSMs. DFT 2003: 344-351 - [c24]Sobeeh Almukhaizim, Yiorgos Makris:
Fault Tolerant Design of Combinational and Sequential Logic Based on a Parity Check Code. DFT 2003: 563-570 - [c23]Sobeeh Almukhaizim, Thomas Verdel, Yiorgos Makris:
Cost-Effective Graceful Degradation in Speculative Processor Subsystems: The Branch Prediction Case. ICCD 2003: 194-197 - [c22]Petros Drineas, Yiorgos Makris:
Independent Test Sequence Compaction through Integer Programming. ICCD 2003: 380-386 - [c21]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
An Analog Checker With Input-Relative Tolerance for Duplicate Signals. IOLTS 2003: 54- - [c20]Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris:
On Compaction-Based Concurrent Error Detection. IOLTS 2003: 157 - [c19]Petros Drineas, Yiorgos Makris:
Concurrent Fault Detection in Random Combinational Logic. ISQED 2003: 425-430 - [c18]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
Concurrent Error Detection in Linear Analog Circuits Using State Estimation. ITC 2003: 1164-1173 - [c17]Petros Drineas, Yiorgos Makris:
SPaRe: Selective Partial Replication for Concurrent Fault Detection in FSMs. VLSI Design 2003: 167- - [c16]Haralampos-G. D. Stratigopoulos, Yiorgos Makris:
An Analog Checker with Dynamically Adjustable Error Threshold for Fully Differential Circuits. VTS 2003: 209-218 - 2002
- [j2]Yiorgos Makris, Jamison Collins, Alex Orailoglu:
Fast Hierarchical Test Path Construction for Circuits with DFT-Free Controller-Datapath Interface. J. Electron. Test. 18(1): 29-42 (2002) - [c15]Petros Drineas, Yiorgos Makris:
Non-Intrusive Design of Concurrently Self-Testable FSMs. Asian Test Symposium 2002: 33- - [c14]Yiorgos Makris, Alex Orailoglu:
Test Requirement Analysis for Low Cost Hierarchical Test Path Construction. Asian Test Symposium 2002: 134-139 - [c13]Thomas Verdel, Yiorgos Makris:
Duplication-Based Concurrent Error Detection in Asynchronous Circuits: Shortcomings and Remedies. DFT 2002: 345-353 - 2001
- [c12]Yiorgos Makris, Vishal Patel, Alex Orailoglu:
Efficient Transparency Extraction and Utilization in Hierarchical Test. VTS 2001: 246-251 - 2000
- [c11]Yiorgos Makris, Jamison Collins, Alex Orailoglu:
Fast hierarchical test path construction for DFT-free controller-datapath circuits. Asian Test Symposium 2000: 185-190 - [c10]Yiorgos Makris, Alex Orailoglu, Praveen Vishakantaiah:
Modular test generation and concurrent transparency-based test translation using gate-level ATPG. CICC 2000: 75-78 - [c9]Yiorgos Makris, Jamison Collins, Alex Orailoglu:
How to avoid random walks in hierarchical test path identification. ETW 2000: 111-116 - [c8]Yiorgos Makris, Jamison Collins, Alex Orailoglu, Praveen Vishakantaiah:
Transparency-based hierarchical test generation for modular RTL designs. ISCAS 2000: 689-692 - [c7]Yiorgos Makris, Alex Orailoglu:
Exploiting Off-Line Hierarchical Test Paths in Module Diagnosis and On-Line Test. LATW 2000: 250-255 - [c6]Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu:
Invariance-Based On-Line Test for RTL Controller-Datapath Circuits. VTS 2000: 459-464
1990 – 1999
- 1999
- [c5]Yiorgos Makris, Jamison Collins, Alex Orailoglu, Praveen Vishakantaiah:
TRANSPARENT: a system for RTL testability analysis, DFT guidance and hierarchical test generation. CICC 1999: 159-162 - [c4]Yiorgos Makris, Alex Orailoglu:
Channel-Based Behavioral Test Synthesis for Improved Module Reachability. DATE 1999: 283-288 - [c3]Yiorgos Makris, Alex Orailoglu:
A Module Diagnosis and Design-for-Debug Methodology Based on Hierarchical Test Paths. DFT 1999: 339-347 - [c2]Yiorgos Makris, Alex Orailoglu:
Property-based testability analysis for hierarchical RTL designs. ICECS 1999: 1089-1092 - 1998
- [j1]Yiorgos Makris, Alex Orailoglu:
RTL Test Justification and Propagation Analysis for Modular Designs. J. Electron. Test. 13(2): 105-120 (1998) - [c1]Yiorgos Makris, Alex Orailoglu:
DFT guidance through RTL test justification and propagation analysis. ITC 1998: 668-677
Coauthor Index
John M. Carulli Jr.
aka: John M. Carulli
aka: John M. Carulli
Benjamin Carrión Schäfer
aka: Benjamin Carrion Schafer
aka: Benjamin Carrion Schafer
Mustafa M. Shihab
aka: Mustafa Munawar Shihab
aka: Mustafa Munawar Shihab
Haralampos-G. D. Stratigopoulos
aka: Haralampos-G. Stratigopoulos
aka: Haralampos-G. Stratigopoulos
Kiruba S. Subramani
aka: Kiruba Sankaran Subramani
aka: Kiruba Sankaran Subramani
Chandra Tirumurti
aka: Chandrasekharan Tirumurti
aka: Chandrasekharan Tirumurti
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