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ORCIDIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 44
Volume 44, Number 1, January 2025
- Md. Mazharul Islam
, Shamiul Alam, Garrett S. Rose, Aly E. Fathy, Sumeet Kumar Gupta, Ahmedullah Aziz:
Harnessing Unipolar Threshold Switches for Enhanced Rectification. 2-10 - Ming-Che Li, Archisman Ghosh, Shreyas Sen:
Approximate DCT and Quantization Techniques for Energy-Constrained Image Sensors. 11-24 - Rozhin Yasaei, Luke Chen, Shih-Yuan Yu, Mohammad Abdullah Al Faruque:
Hardware Trojan Detection Using Graph Neural Networks. 25-38 - Junge Xu, Fan Zhang, Wenguang Jin, Kun Yang, Zeke Wang, Weixiong Jiang, Yajun Ha:
A Deep Investigation on Stealthy DVFS Fault Injection Attacks at DNN Hardware Accelerators. 39-51 - Seokjun Jang, Youngki Moon, Duyeon Won, Sungho Kang:
PASS: Pattern-Sequence-Authentication-Based Secure Scan Against Reverse Engineering Attacks. 52-64 - Yiwen Zhang, Jin-Peng Ma, Zonghua Gu:
Partitioned Scheduling With Shared Resources on Imprecise Mixed-Criticality Multiprocessor Systems. 65-76 - Wei Wei, Chen Pan, Sahidul Islam, Jishnu Banerjee, Shyamala Palanisamy, Mimi Xie:
Intermittent OTA Code Update Framework for Tiny Energy Harvesting Devices. 77-90 - Libing Deng, Gang Zeng, Ryo Kurachi, Fei Peng, Renfa Li, Guoqi Xie:
Design Synthesis and Optimization Strategy for Low Delay and High Bandwidth Utilization in Time-Sensitive Networking. 91-104 - Alexander J. Edwards, Naimul Hassan, Jared Arzate, Alexander N. Chin, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman:
Physically Secure Logic Locking With Nanomagnet Logic. 105-118 - Tianyang Yu, Bi Wu, Ke Chen, Gong Zhang, Weiqiang Liu:
LAHDC: Logic-Aggregation-Based Query for Embedded Hyperdimensional Computing Accelerator. 119-129 - Xuan Wang, Minxuan Zhou, Tajana Rosing:
Fast-OverlaPIM: A Fast Overlap-Driven Mapping Framework for Processing In-Memory Neural Network Acceleration. 130-143 - Mengying Zhao, Yuqing Xiong, Hao Zhang, Huichuan Zheng, Dongxiao Yu, Zhaoyan Shen:
CoaCAD: Correlation-Assisted Computer-Aided Design for Nonvolatile FPGAs. 144-156 - Zehua Dong, Boyu Zhang, Yucheng Jiang, Yu Yu, Han Li, Songping Mai:
PEPPR-DWS on FPGA: Elevating Universal Parallelism and Precision Through Pulse-Enhanced Push-Relabel and Diffusion Wave Search. 157-171 - Lihan Chen, Chen Dong, Qiaowen Wu, Ximeng Liu, Xiaodong Guo, Zhenyi Chen, Hao Zhang, Yang Yang:
GNN4HT: A Two-Stage GNN-Based Approach for Hardware Trojan Multifunctional Classification. 172-185 - Siang-Yun Lee, Alessandro Tempia Calvino, Heinz Riener, Giovanni De Micheli:
Technology Legalization and Optimization for Adiabatic Quantum-Flux Parametron. 186-199 - Wenji Fang, Yao Lu, Shang Liu, Qijun Zhang, Ceyu Xu, Lisa Wu Wills, Hongce Zhang, Zhiyao Xie:
Transferable Presynthesis PPA Estimation for RTL Designs With Data Augmentation Techniques. 200-213 - Tianji Liu, Yang Sun, Lei Chen, Xing Li, Mingxuan Yuan, Evangeline F. Y. Young:
A Unified Parallel Framework for LUT Mapping and Logic Optimization. 214-226 - Ziyi Wang, Chen Bai, Zhuolun He, Guangliang Zhang, Qiang Xu, Tsung-Yi Ho, Yu Huang, Bei Yu:
FGNN2: A Powerful Pretraining Framework for Learning the Logic Functionality of Circuits. 227-240 - Mariam Issa, Hanning Chen, Junyao Wang, Mohsen Imani:
CyberRL: Brain-Inspired Reinforcement Learning for Efficient Network Intrusion Detection. 241-250 - Jianfeng Song, Rongjian Liang, Bo Yuan, Jiang Hu:
DiMO-CNN: Deep Learning Toolkit-Accelerated Analytical Modeling and Optimization of CNN Hardware and Dataflow. 251-265 - Fuxun Yu, Zirui Xu, Longfei Shangguan, Di Wang, Dimitrios Stamoulis, Rishi Madhok, Nikolaos Karianakis, Ang Li, Chenchen Liu, Yiran Chen, Xiang Chen:
Rethinking Latency-Aware DNN Design With GPU Tail Effect Analysis. 266-279 - Jonti Talukdar, Akshay Vyas, Krishnendu Chakrabarty:
Detection of Voltage Droop-Induced Timing Fault Attacks Due to Hardware Trojans. 280-293 - Keyu Huang, Chunbiao Li, Xin Zhang, Irene M. Moroz, Zuohua Liu:
Constructing a Memristive Chaotic Oscillator With 2-D Offset Boosting. 294-303 - Hairong Lin, Xiaoheng Deng, Fei Yu, Yichuang Sun:
Diversified Butterfly Attractors of Memristive HNN With Two Memristive Systems and Application in IoMT for Privacy Protection. 304-316 - Shan Yu, Yair Censor, Guojie Luo:
Floorplanning With I/O Assignment via Feasibility-Seeking and Superiorization Methods. 317-330 - Wei Wang, Min Lyu, Tianyang Niu, Qiliang Li, Liangliang Xu, Yinlong Xu:
Fast Acceleration Strategies for XOR-Based Erasure Codes. 331-344 - Youngkwang Lee, Hyojun Yun, Younwoo Yoo, Sungho Kang:
PETRA: Powerful Early Termination-Based Redundancy Analysis. 345-356 - Jonti Talukdar, Arjun Chaudhuri, Eduardo Ortega, Krishnendu Chakrabarty:
TaintLock: Hardware IP Protection Against Oracle-Guided and Oracle-Reconstruction Attacks. 357-370 - Ruiyang Ma, Jiayi Huang, Shijian Zhang, Yuan Xie, Guojie Luo:
NoCFuzzer: Automating NoC Verification in UVM. 371-384 - Apurva Jain, Thomas Broadfoot, Yiorgos Makris, Carl Sechen:
Modeling Bidirectional Switches for Enabling Logic Equivalence Checking in a Transistor-Level Programmable Fabric. 385-389 - Aibin Yan, Yuting He, Zhengfeng Huang, Wenjie Yan, Jie Cui, Xiaolei Wang, Tianming Ni, Patrick Girard, Xiaoqing Wen:
Cost Efficient Flip-Flop Designs With Multiple-Node Upset-Tolerance and Algorithm-Based Verifications. 390-394 - Congyi Sun, Wenqing Song, Qinyu Chen, Chenyang Dai, Yuxiang Fu, Li Li:
An Energy Efficient Residual Spiking Neural Network Accelerator With Ternary Spikes. 395-400
Volume 44, Number 2, February 2025
- Yuxuan Zhao, Peiyu Liao, Siting Liu, Jiaxi Jiang, Yibo Lin, Bei Yu:
Analytical Heterogeneous Die-to-Die 3-D Placement With Macros. 402-415 - Shujie Pang, Yuhui Deng, Zhaorui Wu, Genxiong Zhang, Jie Li, Xiao Qin:
RDA: A Read-Request Driven Adaptive Allocation Scheme for Improving SSD Performance. 416-429 - Kun Cao, Mingsong Chen, Stamatis Karnouskos, Shiyan Hu:
Reliability-Aware Personalized Deployment of Approximate Computation IoT Applications in Serverless Mobile Edge Computing. 430-443 - Zehong Yu, Yixiao Yang, Zhuo Su, Rui Wang, Yang Tao, Yu Jiang:
Knight: Optimizing Code Generation for Simulink Models With Loop Reshaping. 444-457 - Grzegorz Pastuszak:
Optimization of Multisymbol Architecture of the Entropy Coder for H.265/HEVC Video Encoders. 458-468 - Meng Lian, Hu Peng, Mengchu Li, Yushen Zhang, Tsun-Ming Tseng, Bernhard Wolfrum, Ulf Schlichtmann:
Manufacturing Cycle Time Optimization for Inkjet-Printed Electronics. 469-482 - Yangruirui Zhou, Samuel M. D. Oliveira, Radhakrishna Sanka, David McIntyre, Douglas Densmore:
Vespa: Logic-Level Constraint-Based Validation for Continuous-Flow Microfluidic Devices. 483-496 - Minjin Tang, Mei Wen, Jianchao Yang, Zeyu Xue, Junzhong Shen:
SPSA: Exploring Sparse-Packing Computation on Systolic Arrays From Scratch. 497-511 - Cong Liu, Kaibo Wu, Haikun Liu, Hai Jin, Xiaofei Liao, Zhuohui Duan, Jiahong Xu, Huize Li, Yu Zhang, Jing Yang:
A ReRAM-Based Processing-In-Memory Architecture for Hyperdimensional Computing. 512-524 - Weihong Xu, Saransh Gupta, Justin Morris, Xincheng Shen, Mohsen Imani, Baris Aksanli, Tajana Rosing:
Tri-HD: Energy-Efficient On-Chip Learning With In-Memory Hyperdimensional Computing. 525-539 - Kui Dai, Zheren Xie, Shuanglong Liu:
DCP-CNN: Efficient Acceleration of CNNs With Dynamic Computing Parallelism on FPGA. 540-553 - Chuliang Guo, Binglei Lou, David Boland, Philip H. W. Leong:
Highly Parallel CNN Accelerator for RepVGG-Like Network Training on FPGAs. 554-558 - Md. Imtiaz Rashid, Benjamin Carrion Schafer:
Robust and Efficient RTL to C Compiler Optimized for High-Level Synthesis. 559-567 - Yangfan Li, Mengquan Li, Cen Chen, Xiaofeng Zou, Hongen Shao, Fengxiao Tang, Kenli Li:
SimDiff: Point Cloud Acceleration by Utilizing Spatial Similarity and Differential Execution. 568-581 - Mahsa Akhsham, Mohammad Javad Dousti, Saeed Safari:
Neural Network-Based Control of Forced-Convection and Thermoelectric Coolers. 582-591 - Abhiroop Bhattacharjee, Abhishek Moitra, Priyadarshini Panda:
ClipFormer: Key-Value Clipping of Transformers on Memristive Crossbars for Write Noise Mitigation. 592-601 - Chenyang Zhao, Jinbei Fang, Jingwen Jiang, Xiaoyong Xue, Xiaoyang Zeng:
Light-CIM: A Lightweight ADC/DAC-Fewer RRAM CIM DNN Accelerator With Fully Analog Tiles and Nonideality-Aware Algorithm for Consumer Electronics. 602-612 - Haining Fang, Yujuan Tan, Ao Ren, Wei Zhuang, Yang Hua, ZhiYong Qin, Duo Liu:
DSAV: A Deep Sparse Acceleration Framework for Voxel-Based 3-D Object Detection. 613-626 - Weidong Cao, Jian Gao, Tianrui Ma, Rui Ma, Mouhacine Benosman, Xuan Zhang:
RoSE-Opt: Robust and Efficient Analog Circuit Parameter Optimization With Knowledge-Infused Reinforcement Learning. 627-640 - Nicolò Bellarmino, Riccardo Cantoro, Martin Huch, Tobias Kilian, Ulf Schlichtmann, Giovanni Squillero:
Deep Learning Strategies for Labeling and Accuracy Optimization in Microcontroller Performance Screening. 641-654 - Siyuan Liang, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtamnn, Tsung-Yi Ho:
Combinatorial-Coding-Based High-Performance Microfluidic Control Multiplexer: Design, Synthesis, and Adaptation. 655-668 - Shiyuan Huang, Fangxin Liu, Tao Yang, Zongwu Wang, Ning Yang, Li Jiang:
SpMMPlu-Pro: An Enhanced Compiler Plug-In for Efficient SpMM and Sparsity Propagation Algorithm. 669-683 - Zekun Deng, Chunhua Wang, Hairong Lin, Quanli Deng, Yichuang Sun:
Memristor-Based Attention Network for Online Real-Time Object Tracking. 684-695 - Andrew B. Kahng, Zhiang Wang:
DG-RePlAce: A Dataflow-Driven GPU-Accelerated Analytical Global Placement Framework for Machine Learning Accelerators. 696-708 - Wenbo Guan, Xiaoyan Tang, Hongliang Lu, Jingru Tan, Jinlong Wang, Yuming Zhang, Yimen Zhang:
LSTM-Characterized Approach for Chip Floorplanning: Leveraging HyperGCN and DRQN. 709-722 - Zhican Wang, Gang Wang, Guanghui He:
COSA Plus: Enhanced Co-Operative Systolic Arrays for Attention Mechanism in Transformers. 723-736 - Tianyun Ma, Yuanbo Wen, Xinkai Song, Pengwei Jin, Di Huang, Husheng Han, Ziyuan Nan, Zhongkai Yu, Shaohui Peng, Yongwei Zhao, Huaping Chen, Zidong Du, Xing Hu, Qi Guo:
Harmonia: A Unified Architecture for Efficient Deep Symbolic Regression. 737-750 - Yaoxiu Lian, Xinhao Yang, Ke Hong, Yu Wang, Ningyi Xu, Guohao Dai:
A Point Transformer Accelerator With Distribution-Aware Heuristic Distance Calculation. 751-764 - Sooryeong Lee, Hayoung Lee, Juyong Lee, Sungho Kang:
A New Pipelined Output Data Reducer of BOST for Improved Parallelism. 765-776 - Kamilia Tahraoui, Thibault Vayssade, François Lefevre, Laurent Latorre, Florence Azaïs:
Digital-Based Solution for the Generation of FM/PM Test Stimuli. 777-790 - Rui Li, Lin Li, Heng Yu, Masahiro Fujita, Weixiong Jiang, Yajun Ha:
RefSCAT: Formal Verification of Logic-Optimized Multipliers via Automated Reference Multiplier Generation and SCA-SAT Synergy. 791-804
Volume 44, Number 3, March 2025
- Kuiwen Xu, Jianguo Wang, Jialin Cai, Xuetiao Ma, Qinyi Lv, Shichang Chen, Jie Liu, Jun Liu:
Flexible Inverse Design of Microwave Filter Customized on Demand With Wavelet Transform Deep Learning. 806-817 - Aidong Zhao, Ruiyu Lyu, Xuyang Zhao, Zhaori Bi, Fan Yang, Changhao Yan, Dian Zhou, Yangfeng Su, Xuan Zeng:
VTSMOC: An Efficient Voronoi Tree Search Boosted Multiobjective Bayesian Optimization With Constraints for High-Dimensional Analog Circuit Synthesis. 818-831 - Zhenxin Zhao, Jun Liu, Wen-Sheng Zhao, Lihong Zhang:
Automated Topology Synthesis of Analog Integrated Circuits With Frequency Compensation. 832-844 - Michael Sekyere, Isaac Bruce, Ruohan Yang, Degang Chen, Colin C. McAndrew, Xiankun Jin, Chen He, Doug Garrity:
Matching Critical Analog Circuit Components Up To Third-Order Gradients for All Possible Exact Matching Ratios. 845-857 - Egor Glukhov, Tianmu Li, Vaibhav Gupta, Puneet Gupta:
Learned Approximate Computing: Algorithm Hardware Co-Optimization. 858-866 - Jayeeta Chaudhuri, Mayukh Bhattacharya, Krishnendu Chakrabarty:
Enhancing Analog IC Security Using Randomized Obfuscation Circuits. 867-881 - Xinrui Wang, Lang Feng, Zhongfeng Wang:
PreSIT: Predict Cryptography Computations in SGX-Style Integrity Trees. 882-896 - Sirong Zhao, Guoqi Xie, Wenhong Ma, Wei Ren, Kenli Li:
vmPTP: Precise Time Protocol for Inter-VM Communication in Embedded Virtualized Systems. 897-910 - Bruno Morais, Qucheng Jiang, Gunar Schirner:
Enabling ILP-Based DSE for Multigranularity, Unified Domain Platforms With DmTSAR-ILP. 911-922 - Zhouxuan Peng, Dan Feng, Jianxi Chen, Jing Hu, Yachun Liu, Jinlei Hu, Jintong Zhang, Tianyu Wan, Zuoning Chen:
AdaptHM: A Fully Adaptive Data Migration Strategy for Hybrid Memory Systems. 923-936 - Sercan Aygun, M. Hassan Najafi:
Sobol Sequence Optimization for Hardware-Efficient Vector Symbolic Architectures. 937-950 - Sugil Lee, Mohammed E. Fouda, Chenghao Quan, Jongeun Lee, Ahmed M. Eltawil, Fadi J. Kurdahi:
Mitigating the Impact of ReRAM I-V Nonlinearity and IR Drop via Fast Offline Network Training. 951-960 - Amir Bahador, Mohammad Hossein Moaiyeri, Reza Ghaderi:
Algorithmically Enhanced Design of Spintronic-Based Tunable True Random Number Generator for Dependable Stochastic Computing. 961-974 - Rongliang Fu, Mengmeng Wang, Yirong Kan, Olivia Chen, Nobuyuki Yoshikawa, Bei Yu, Tsung-Yi Ho:
Buffer and Splitter Insertion for Adiabatic Quantum-Flux-Parametron Circuits. 975-988 - Liao Huang, Yue Chen, Dajiang Liu:
Optimizing Data Reuse for Loop Mapping on CGRAs With Joint Affine and Nonaffine Transformations. 989-1002 - Xun Jiang, Jiarui Wang, Jing Mai, Zhixiong Di, Yibo Lin:
A Robust FPGA Router With Optimization of High-Fanout Nets and Intra-CLB Connections. 1003-1016 - Alessandro Tempia Calvino, Giovanni De Micheli, Alan Mishchenko, Robert K. Brayton:
Enhancing Delay-Driven LUT Mapping With Boolean Decomposition. 1017-1030 - Haoyang Sun, Cong Jiang, Xun Ye, Dan Feng, Benjamin Tan, Yuzhe Ma, Kang Liu:
Interpretable CNN-Based Lithographic Hotspot Detection Through Error Marker Learning. 1031-1044 - Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie:
Klotski v2: Improved DNN Model Orchestration Framework for Dataflow Architecture Accelerators. 1045-1058 - Qing Yao, Jing Chen, Kemeng Yang, Jiafei Yao, Jun Zhang, Yuxuan Dai, Weihua Tang, Bo Zhang, Yufeng Guo:
Efficient Automatic Design of IGBT Structural Parameters Using Differential Evolution and Machine Learning Model. 1059-1069 - Yi-Ting Hsieh, Tung-Wei Lin, Ya-Chu Chang, Hao-Yu Wu, Iris Hui-Ru Jiang:
Graceful Register Clustering and Rebanking for Power and Timing Balancing. 1070-1083 - Suwan Kim, Taewhan Kim:
Design and Utilization of Multiskewed Multibit Flip-Flop Cells for Timing Optimization: Design and Technology Co-Optimization Approach. 1084-1097 - Hao-Chiang Shao, Guan-Yu Chen, Yu-Hsien Lin, Chia-Wen Lin, Shao-Yun Fang, Pin-Yian Tsai, Yan-Hsiu Liu:
LithoHoD: A Litho Simulator-Powered Framework for IC Layout Hotspot Detection. 1098-1111 - Hongduo Liu, Peiyu Liao, Mengchuan Zou, Bowen Pang, Xijun Li, Mingxuan Yuan, Tsung-Yi Ho, Bei Yu:
Layout Decomposition via Boolean Satisfiability. 1112-1125 - Yifan Hua, Shengan Zheng, Weihan Kong, Cong Zhou, Linpeng Huang:
Phoenix: A Dynamically Reconfigurable Hybrid Memory System Combining Caching and Migration. 1126-1140 - Zheng Wu, Jinyi Shen, Xiaoling Yi, Li Shang, Fan Yang, Xuan Zeng:
Prior-Boosted GRL: Microarchitecture Design Space Exploration via Graph Representation Learning. 1141-1154 - Po-Yao Chuang, Francesco Lorenzelli, Cheng-Wen Wu, Erik Jan Marinissen:
Generating Test Patterns for Chiplet Interconnects With Optimized Effectiveness and Efficiency. 1155-1168 - Jongho Park, Sangjun Lee, Hyemin Kim, Jaeyoung Joung, Jaehyun Kim, Sungho Kang:
An Efficient Low-Power BIST for Automotive SoC With Periodic Pattern Type Selection. 1169-1179 - Ziyi Wang, Wenqian Zhao, Yuan Pu, Lei Chen, Wilson W. K. Thong, Weihua Sheng, Tsung-Yi Ho, Bei Yu:
ParSGCN: Bridging the Gap Between Emulation Partitioning and Scheduling. 1180-1192 - Jinyi Shen, Fan Yang, Li Shang, Changhao Yan, Zhaori Bi, Dian Zhou, Xuan Zeng:
ATOM: An Automatic Topology Synthesis Framework for Operational Amplifiers. 1193-1198 - Kun Wu, Yuncheng Liu, Hui Gao, Jun Tao, Wei Xiong, Xin Li:
Efficient Design Optimization for Diffractive Deep Neural Networks. 1199-1203 - Songyu Sun, Xiao Dong, Qi Sun, Xunzhao Yin, Quan Chen, Cheng Zhuo:
Fast Machine-Learning-Driven Supply Noise-Aware Macromodeling for High-Speed Nonlinear Drivers. 1204-1208
Volume 44, Number 4, April 2025
- Nibedita Karmokar, Ramesh Harjani, Sachin S. Sapatnekar:
Minimum Unit Capacitance Calculation for Capacitor Arrays in Binary-Weighted and Split DACs. 1210-1223 - Elias Trommer, Bernd Waschneck, Akash Kumar:
Fast Retraining of Approximate CNNs for High Accuracy. 1224-1237 - Janusz Rajski, Maciej Trawka, Jerzy Tyszer, Bartosz Wlodarczak:
On Near-Maximum-Length Galois Nonlinear Feedback Shift Registers. 1238-1249 - Mark Deutel, Frank Hannig, Christopher Mutschler, Jürgen Teich:
On-Device Training of Fully Quantized Deep Neural Networks on Cortex-M Microcontrollers. 1250-1261 - Zizhan Chen, Tianyu Wang, Kai Zhang, Yang Guo, Zili Shao:
A Q-Learning-Based Display Energy Optimization Scheme for Android Systems. 1262-1275 - Yihao Liu, Yaoyao Ye:
An Efficient Branch-and-Bound Routing Optimization Method for Optical NoCs. 1276-1289 - Qimin Zhou, Hui Xu, Jingyu Li, Tuo Ma, Changlin Chen:
OPASCA: Outer Product-Based Accelerator With Unified Architecture for Sparse Convolution and Attention. 1290-1303 - Jefferson D. S. Silva, Thiago Melo D. Azevedo, Israel F. Araujo, Adenilton J. da Silva:
Linear Decomposition of Approximate Multicontrolled Single Qubit Gates. 1304-1312 - Ajay B. S, Phani Pavan K, Madhav Rao:
MC-QDSNN: Quantized Deep Evolutionary SNN With Multidendritic Compartment Neurons for Stress Detection Using Physiological Signals. 1313-1325 - Yuxian Jiang, Zhan Li, Zhihan Zhang, Hao Wang, Sheng Chang:
PEDSA: High-Throughput Pipeline-Based FPGA Accelerator for Convolutional Encoder-Decoder Segmentation Networks. 1326-1339 - Lan Huang, Teng Gao, Yang Feng, Kangping Wang:
MCSSA: A Stream-Based Multiconcurrency Systolic Sorting Array Combining Merge Tree. 1340-1353 - Yuchao Liao, Tosiron Adegbija, Roman Lysecky:
System-Level Design Space Exploration for High-Level Synthesis Under End-to-End Latency Constraints. 1354-1365 - Samuel Coward, Theo Drane, George A. Constantinides:
Constraint-Aware E-Graph Rewriting for Hardware Performance Optimization. 1366-1379 - Yuhao Zhou, Zhen, Xiangxue Kong, Hongyang Pan, Zhenxue He, Ying Zhang, Jianhui Jiang, Limin Xiao, Xiang Wang:
Multiobjective Optimization in Logic Synthesis Based on TB-RM Dual Logic. 1380-1393 - Wenqian Zhao, Shuo Yin, Chen Bai, Zixiao Wang, Bei Yu:
BAQE: Backend-Adaptive DNN Deployment via Synchronous Bayesian Quantization and Hardware Configuration Exploration. 1394-1405 - Jun Liu, Zhenglun Kong, Pu Zhao, Weihao Zeng, Hao Tang, Xuan Shen, Changdi Yang, Wenbin Zhang, Geng Yuan, Wei Niu, Xue Lin, Yanzhi Wang:
TSLA: A Task-Specific Learning Adaptation for Semantic Segmentation on Autonomous Vehicles Platform. 1406-1419 - Jienan Chen, Jun Tu, Hao Wang, Jie Zheng, Hao Liu, Shenglong Bai, Xiantuo He, Weikang Qian:
GPCB Routing: Generative Pretrained Transformers-Based Printed Circuit Board Routing Method. 1420-1433 - Tingting Li, Liqiang Lu, Ziming Zhao, Ziqi Tan, Siwei Tan, Jianwei Yin:
QuST: Optimizing Quantum Neural Network Against Spatial and Temporal Noise Biases. 1434-1447 - Shang Liu, Wenji Fang, Yao Lu, Jing Wang, Qijun Zhang, Hongce Zhang, Zhiyao Xie:
RTLCoder: Fully Open-Source and Efficient LLM-Assisted RTL Code Generation Technique. 1448-1461 - Xin Jian, Junyi Zhang, Yaoyao Li, Tianyu Yang, Amr Tolba, Osama Alfarraj, Keping Yu, Mohsen Guizani:
CircuitGTL: An Intelligent Circuit Design Methodology Across Electromagnetic Topologies With Graph Transfer Learning. 1462-1474 - Wenxun Wang, Wenyu Sun, Yongpan Liu:
Improving Transformer Inference Through Optimized Nonlinear Operations With Quantization-Approximation-Based Strategy. 1475-1488 - Zhixuan Dong, Longlong Yang, Cuiyang Ding, Changhao Yan, Zhaori Bi, Sheng-Guo Wang, Dian Zhou, Xuan Zeng:
pPIRW: An Efficient and Accurate Precalculation Path Integral Random Walk Solver for Steady-State Thermal Simulation With Robin Boundary Conditions. 1489-1502 - Yihang Ma, Shijie Wang, Chao Yu, Jialin Cai:
Threshold Optimized DVR Model for RF Power Amplifier Using Particle Swarm Algorithm for 5G Application. 1503-1515 - Bing Wu, Yibo Liu, Jinpeng Liu, Huan Cheng, Xueliang Wei, Wei Tong, Dan Feng:
FADESIM: Enable Fast and Accurate Design Exploration for Memristive Accelerators Considering Nonidealities. 1529-1543 - Yang Dai, Leiyu Gao, Yukun Li, Jing Zuo, Yue Zhang, Wu Zhao:
Effect of Gate Structure on the Performances of Lateral AlGaN/GaN High-Electron-Mobility Avalanche-Transit-Time Transistor. 1544-1552 - Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler:
OPTI-Sim: Performing Optical Probing Simulation on Layout Design Files. 1553-1566 - Xingbo Wang, Chenxi Feng, Xinyu Kang, Qi Wang, Yucong Huang, Terry Tao Ye:
RV-SCNN: A RISC-V Processor With Customized Instruction Set for SNN and CNN Inference Acceleration on Edge Platforms. 1567-1580 - Hayoung Lee, Juyong Lee, Sungho Kang:
A Robust Test Architecture for Low-Power AI Accelerators. 1581-1594 - Zhengfeng Huang, Lei Ai, Xinyu Jiang, Xiaolei Wang, Yingchun Lu, Jun Pan, Tai Song, Xiaoqing Wen, Aibin Yan:
Low-Cost Quadruple-Node-Upset Self-Recoverable Latch Based on Cross-Interlocking. 1595-1608 - Ranyang Zhou, Jacqueline T. Liu, Sabbir Ahmed, Nakul Kochar, Adnan Siraj Rakin, Shaahin Angizi:
Assessing the Potential of Escalating RowHammer Attack Distance to Bypass-Counter-Based Defenses. 1609-1613 - Yao Tong, Quan Chen:
A Predictive Readout Fidelity Model Considering Nonidealities for Readout Circuit Design in Superconducting Quantum Computers. 1614-1618
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