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ORCIDYing Wang 0001
Person information
- affiliation: Chinese Academy of Sciences, State Key Laboratory of Computer Architecture, Beijing, China
Other persons with the same name
- Ying Wang — disambiguation page
- Ying Wang 0002
![[0000-0002-4494-6389]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-4494-6389")
— Beijing University of Posts and Telecommunications, State Key Laboratory of Networking and Switching Technology, China (and 2 more) - Ying Wang 0003 — Macquarie University, Centre for Health Informatics, Sydney, Australia
- Ying Wang 0004 — Hong Kong University of Science and Technology, Department of Computer Science and Engineering, Hong Kong
- Ying Wang 0005 — Xiamen University, Department of Automation, China
- Ying Wang 0006 — College of Economics and Management, Nanjing University of Aeronautics and Astronautics, Nanjing, China
- Ying Wang 0007 — Xidian University, School of Electronic Engineering, Lab of Video and Image Processing Systems, Xi'an, China
- Ying Wang 0008 — Chinese Academy of Sciences, Institute of Automation, National Laboratory of Pattern Recognition, Beijing, China (and 1 more)
- Ying Wang 0009 — Jilin University, College of Computer Science and Technology / MoE Key Laboratory of Symbolic Computation and Knowledge Engineering, Changchun, China
- Ying Wang 0010 — North China Electric Power University, School of Electric and Electronic Engineering, Beijing, China
- Ying Wang 0011 — Queen's University Belfast, UK
- Ying Wang 0012 — University of Huddersfield, UK
- Ying Wang 0013 — Georgia Institute of Technology, Atlanta, GA, USA
- Ying Wang 0014 — Chinese Academy of Sciences / Beijing Normal University, Institute of Remote Sensing Applications (IRSA), Beijing, China
- Ying Wang 0015 — Southwest University, School of Computer and Information Science, Chongqing, China
- Ying Wang 0016 — Jiangsu University of Science and Technology, Department of Applied Physics, Zhenjiang, China (and 1 more)
- Ying Wang 0017 — Nanjing University of Posts and Telecommunications, School of Telecommunication and Information Engineering, Jiangsu Key Laboratory of Wireless Communications, Nanjing, China
- Ying Wang 0018 — University of Texas Rio Grande Valley, College of Business and Entrepreneurship, Edinburg, TX, USA
- Ying Wang 0019 — Northern Illinois University, DeKalb, IL, USA
- Ying Wang 0020 — Lanzhou University, School of Information Science and Engineering, Gansu Provincial Key Laboratory of Wearable Computing, China
- Ying Wang 0021 — University of Illinois at Urbana-Champaign, Department of Electrical and Computer Engineering, Urbana, IL, USA
- Ying Wang 0022 — Shanghai Jiaotong University, Department of Automation, China
- Ying Wang 0023 — Southeast University, School of Automation, Key Laboratory of Measurement and Control of CSE, Nanjing, China
- Ying Wang 0024 — Jilin University, College of Computer Science and Technology / State Key Laboratory of Automotive Simulation and Control, Changchun, China
- Ying Wang 0025 — Harbin Institute of Technology, School of Civil and Environmental Engineering, Shenzhen, China (and 3 more)
- Ying Wang 0026 — Xi'an University of Architecture and Technology, School of Science, Xi'an, China (and 1 more)
- Ying Wang 0027 — Beijing Jiaotong University, School of Electrical Engineering, China
- Ying Wang 0028 — Harbin University of Science and Technology, Higher Education Key Lab for Measure & Control Technology and Instrumentations of Heilongjiang, China
- Ying Wang 0029 — Beihang University, Beijing, China
- Ying Wang 0030 — University of Chinese Academy of Sciences, School of Artificial Intelligence,Beijing, China (and 1 more)
- Ying Wang 0031 — Sun Yat-sen University, School of Information Science and Technology, Guangzhou, China (and 1 more)
- Ying Wang 0032 — Fudan University, School of Computer Science and Technology, State Key Laboratory of ASIC and System, Shanghai, China
- Ying Wang 0033 — Qinhuangdao Institute of Technology, Department of Information Engineering, Qinhuangdao, China
- Ying Wang 0034 — Chinese Academy of Sciences, Institute of Information Engineering, Beijing, China
- Ying Wang 0035 — Kennesaw State University, Department of Mechatronics Engineering, Marietta, GA, USA (and 2 more)
- Ying Wang 0036 — Beijing Jiaotong University, School of Economics and Management, Department of Information Management, Beijing, China
- Ying Wang 0037 — Nanjing University of Aeronautics and Astronautics, College of Electronic and Information Engineering, Nanjing, China
- Ying Wang 0038 — Northeastern University, Software College, Shenyang, China
- Ying Wang 0039 — Shenzhen University, Key Laboratory of Optoelectronic Devices and Systems, Shenzhen, China
- Ying Wang 0040 — Harbin Engineering University, College of Automation, Harbin, China (and 1 more)
- Ying Wang 0041 — Hangzhou Dianzi University, Key Laboratory of RF Circuits and Systems, Hangzhou, China (and 1 more)
- Ying Wang 0042 — Beijing Jiaotong University, School of Traffic and Transportation, MOT Key Laboratory of Transport Industry of Big Data Application Technologies for Comprehensive Transport, Beijing, China
- Ying Wang 0043 — Capital Medical University, Beijing Chaoyang Hospital, Department of Pathology, Beijing, China
- Ying Wang 0044 — Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China
- Ying Wang 0045 — Xi'an International Studies University, Graduate School, Xi'an, China
- Ying Wang 0046 — Sichuan University, School of Electronics and Information Engineering, Chengdu, China
- Ying Wang 0047 — Hong Kong Polytechnic University, Department of Building and Real Estate, Hong Kong
- Ying Wang 0048 — Geological Survey of Norway, Trondheim, Norway
- Ying Wang 0049 — Hunan University of Chinese Medicine, School of Humanities and Management, Changsha, China
- Ying Wang 0050 — Beijing Jiaotong University, School of Science, Key Laboratory of Luminescence & Optical Information
- Ying Wang 0051 — Qualcomm AI Research, San Diego, CA, USA
- Ying Wang 0052 — Wuhan University, School of Information Management, Wuhan, China
- Ying Wang 0053 — Shanghai Eastern Hepatobiliary Surgery Hospital, Department of Laboratory Medicine, Shanghai, China (and 2 more)
- Ying Wang 0054 — Stockholm University, Department of English, Stockholm, Sweden
- Ying Wang 0055 — Shanghai Academy of Agriculture Science, Institute of Edible Fungi, Shanghai, China (and 2 more)
- Ying Wang 0056 — State Grid Information & Telecommunication Company, Beijing, China (and 1 more)
- Ying Wang 0057 — Xidian University, Key Laboratory of Computer Networks and Information Security, Xi'an, China
- Ying Wang 0058 — Longyan University, School of Physics and Mechanical and Electrical Engineering, Longyan, China
- Ying Wang 0059 — Harbin Institute of Technology, School of Electronics and Information Engineering, Peng Cheng Laboratory, Shenzhen, China (and 1 more)
- Ying Wang 0060 — Wayne State University, Department of Radiology, Detroit, MI, USA (and 1 more)
- Ying Wang 0061 — University of Electronic Science and Technology of China, MOE Key Lab for Neuroinformation, Chengdu, China (and 1 more)
- Ying Wang 0062 — Stevens Institute of Technology, NJ, USA
- Ying Wang 0063 — New York University, Center for Data Science, NY, USA
- Ying Wang 0064 — Beijing Institute of Technology, School of Optoelectronics, China
- Ying Wang 0065 — Xi'an Jiaotong University, Systems Engineering Institute, China
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2020 – today
- 2024
[j82]Sen Li, Hui Jin, Yingke Gao, Ying Wang, Shuhong Dai, Yongjun Xu, Long Cheng:
Approximate data mapping in refresh-free DRAM for energy-efficient computing in modern mobile systems. Comput. Commun. 216: 151-158 (2024)- [j81]Husheng Han, Xing Hu, Yifan Hao, Kaidi Xu, Pucheng Dang, Ying Wang, Yongwei Zhao, Zidong Du, Qi Guo, Yanzhi Wang, Xishan Zhang, Tianshi Chen:
Real-Time Robust Video Object Detection System Against Physical-World Adversarial Attacks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(1): 366-379 (2024) - [j80]Lian Liu, Ying Wang, Xiandong Zhao, Weiwei Chen, Huawei Li, Xiaowei Li, Yinhe Han:
An Automatic Neural Network Architecture-and-Quantization Joint Optimization Framework for Efficient Model Inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5): 1497-1510 (2024) - [j79]Mingkai Chen, Cheng Liu, Shengwen Liang, Lei He, Ying Wang, Lei Zhang, Huawei Li, Xiaowei Li:
An Energy-Efficient In-Memory Accelerator for Graph Construction and Updating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(6): 1781-1793 (2024) - [j78]Yintao He, Bing Li, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li:
A Task-Adaptive In-Situ ReRAM Computing for Graph Convolutional Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(9): 2635-2646 (2024) - [j77]Cong Liu, Ying Wang, Lijie Wen, Jiujun Cheng, Long Cheng, Qingtian Zeng:
Discovering Hierarchical Multi-Instance Business Processes From Event Logs. IEEE Trans. Serv. Comput. 17(1): 142-155 (2024) - [j76]Long Cheng, Yue Wang, Feng Cheng, Cheng Liu, Zhiming Zhao, Ying Wang:
A Deep Reinforcement Learning-Based Preemptive Approach for Cost-Aware Cloud Job Scheduling. IEEE Trans. Sustain. Comput. 9(3): 422-432 (2024) - [j75]Long Cheng, Yan Gu, Qingzhi Liu, Lei Yang, Cheng Liu, Ying Wang:
Advancements in Accelerating Deep Neural Network Inference on AIoT Devices: A Survey. IEEE Trans. Sustain. Comput. 9(6): 830-847 (2024) - [c127]Zihao Chang, Jihan Lin, Haifeng Sun, Runkuang Li, Ying Wang, Bin Hu, Xiaofang Zhao, Dejun Jiang, Ninghui Sun, Sa Wang:
Chaos: Function Granularity Runtime Address Layout Space Randomization for Kernel Module. APSys 2024: 23-30 - [c126]Fuping Li, Ying Wang, Yujie Wang, Mengdi Wang, Yinhe Han, Huawei Li, Xiaowei Li:
Chipletizer: Repartitioning SoCs for Cost-Effective Chiplet Integration. ASPDAC 2024: 58-64 - [c125]Lei Dai, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li:
APoX: Accelerate Graph-Based Deep Point Cloud Analysis via Adaptive Graph Construction. ASPDAC 2024: 231-237 - [c124]Songyun Qu, Shixin Zhao, Bing Li, Yintao He, Xuyi Cai, Lei Zhang, Ying Wang:
CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators. ASPLOS (2) 2024: 185-200 - [c123]Haoran Wang, Lei Wang, Haobo Xu, Ying Wang, Yuming Li, Yinhe Han:
PrimePar: Efficient Spatial-temporal Tensor Partitioning for Large Transformer Model Training. ASPLOS (3) 2024: 801-817 - [c122]Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li:
Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. DAC 2024: 60:1-60:6 - [c121]Lian Liu, Zhaohui Xu, Yintao He, Ying Wang, Huawei Li, Xiaowei Li, Yinhe Han:
Drift: Leveraging Distribution-based Dynamic Precision Quantization for Efficient Deep Neural Network Acceleration. DAC 2024: 140:1-140:6 - [c120]Yibo Du, Ying Wang, Bing Li, Fuping Li, Shengwen Liang, Huawei Li, Xiaowei Li, Yinhe Han:
Chiplever: Towards Effortless Extension of Chiplet-based System for FHE. DAC 2024: 243:1-243:6 - [c119]Yibo Du, Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li, Yinhe Han:
GPACE: An Energy-Efficient PQ-Based GCN Accelerator with Redundancy Reduction. DATE 2024: 1-6 - [c118]Yintao He, Shixin Zhao, Songyun Qu, Huawei Li, Xiaowei Li, Ying Wang:
Bit-Trimmer: Ineffectual Bit-Operation Removal for CLM Architecture. DATE 2024: 1-6 - [c117]Shengwen Liang, Ziming Yuan, Ying Wang, Dawen Xu, Huawei Li, Xiaowei Li:
HyQA: Hybrid Near-Data Processing Platform for Embedding Based Question Answering System. DATE 2024: 1-6 - [i21]Songyun Qu, Shixin Zhao, Bing Li, Yintao He, Xuyi Cai, Lei Zhang, Ying Wang:
CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators. CoRR abs/2401.12428 (2024) - [i20]Kaiyan Chang, Kun Wang, Nan Yang, Ying Wang, Dantong Jin, Wenlong Zhu, Zhirong Chen, Cangyuan Li, Hao Yan, Yunhao Zhou, Zhuoliang Zhao, Yuan Cheng, Yudong Pan, Yiqi Liu, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li:
Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. CoRR abs/2403.11202 (2024) - [i19]Kaiyan Chang, Zhirong Chen, Yunhao Zhou, Wenlong Zhu, Kun Wang, Haobo Xu, Cangyuan Li, Mengdi Wang, Shengwen Liang, Huawei Li, Yinhe Han, Ying Wang:
Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation. CoRR abs/2407.08473 (2024) - [i18]Yilun Zhao, Bingmeng Wang, Wenle Jiang, Xiwei Pan, Bing Li, Yinhe Han, Ying Wang:
SuperEncoder: Towards Universal Neural Approximate Quantum State Preparation. CoRR abs/2408.05435 (2024) - [i17]Lian Liu, Haimeng Ren, Long Cheng, Zhaohui Xu, Yudong Pan, Mengdi Wang, Xiaowei Li, Yinhe Han, Ying Wang:
COMET: Towards Partical W4A4KV4 LLMs Serving. CoRR abs/2410.12168 (2024) - 2023
- [j74]Ying Wang, Wenqing Jia, Dejun Jiang, Jin Xiong:
A Survey of Non-Volatile Main Memory File Systems. J. Comput. Sci. Technol. 38(2): 348-372 (2023) - [j73]Yuquan He, Long Zhang, Cheng Liu, Lei Zhang, Ying Wang:
S$^{2}$ Loop: A Lightweight Spectral-Spatio Loop Closure Detector for Resource-Constrained Platforms. IEEE Robotics Autom. Lett. 8(3): 1826-1833 (2023) - [j72]Chengsi Gao, Ying Wang, Yinhe Han, Weiwei Chen, Lei Zhang:
IVP: An Intelligent Video Processing Architecture for Video Streaming. IEEE Trans. Computers 72(1): 264-277 (2023) - [j71]Wen Li, Ying Wang, Cheng Liu, Yintao He, Lian Liu, Huawei Li, Xiaowei Li:
On-Line Fault Protection for ReRAM-Based Neural Networks. IEEE Trans. Computers 72(2): 423-437 (2023) - [j70]Hao Lv, Bing Li, Lei Zhang, Cheng Liu, Ying Wang:
Variation Enhanced Attacks Against RRAM-Based Neuromorphic Computing System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(5): 1588-1596 (2023) - [j69]Xiandong Zhao, Ying Wang, Cheng Liu, Cong Shi, Kaijie Tu, Lei Zhang:
Network Pruning for Bit-Serial Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(5): 1597-1609 (2023) - [j68]Songyun Qu, Bing Li, Shixin Zhao, Lei Zhang, Ying Wang:
A Coordinated Model Pruning and Mapping Framework for RRAM-Based DNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2364-2376 (2023) - [j67]Haitong Huang, Xinghua Xue, Cheng Liu, Ying Wang, Tao Luo, Long Cheng, Huawei Li, Xiaowei Li:
Statistical Modeling of Soft Error Influence on Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(11): 4152-4163 (2023) - [j66]Xuyi Cai, Ying Wang, Lei Zhang:
Optimus: An Operator Fusion Framework for Deep Neural Networks. ACM Trans. Embed. Comput. Syst. 22(1): 1:1-1:26 (2023) - [j65]Weiwei Chen, Ying Wang, Ying Xu, Chengsi Gao, Cheng Liu, Lei Zhang:
A Framework for Neural Network Architecture and Compile Co-optimization. ACM Trans. Embed. Comput. Syst. 22(1): 5:1-5:24 (2023) - [j64]Bi Wu, Haonan Zhu, Dayane Reis, Zhaohao Wang, Ying Wang, Ke Chen, Weiqiang Liu, Fabrizio Lombardi, Xiaobo Sharon Hu:
An Energy-Efficient Computing-in-Memory (CiM) Scheme Using Field-Free Spin-Orbit Torque (SOT) Magnetic RAMs. IEEE Trans. Emerg. Top. Comput. 11(2): 331-342 (2023) - [j63]Long Cheng, Ying Wang, Rutvij H. Jhaveri, Qingle Wang, Ying Mao:
Toward Network-Aware Query Execution Systems in Large Datacenters. IEEE Trans. Netw. Serv. Manag. 20(4): 4494-4504 (2023) - [j62]Cheng Chu, Cheng Liu, Dawen Xu, Ying Wang, Tao Luo, Huawei Li, Xiaowei Li:
Accelerating Deformable Convolution Networks with Dynamic and Irregular Memory Accesses. ACM Trans. Design Autom. Electr. Syst. 28(4): 67:1-67:23 (2023) - [j61]Xinghua Xue, Cheng Liu, Bo Liu, Haitong Huang, Ying Wang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li:
Exploring Winograd Convolution for Cost-Effective Neural Network Fault Tolerance. IEEE Trans. Very Large Scale Integr. Syst. 31(11): 1763-1773 (2023) - [j60]Xinghua Xue, Cheng Liu, Ying Wang, Bing Yang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li:
Soft Error Reliability Analysis of Vision Transformers. IEEE Trans. Very Large Scale Integr. Syst. 31(12): 2126-2136 (2023) - [c116]Huiqing Xu, Kuang Mao, Quihong Pan, Zhaorong Tang, Mengdi Wang, Ying Wang:
Deep Learning Compiler Optimization on Multi-Chiplet Architecture. AICAS 2023: 1-5 - [c115]Zhongcheng Zhang, Yan Ou, Ying Liu, Chenxi Wang, Yongbin Zhou, Xiaoyu Wang, Yuyang Zhang, Yucheng Ouyang, Jiahao Shan, Ying Wang, Jingling Xue, Huimin Cui, Xiaobing Feng:
Occamy: Elastically Sharing a SIMD Co-processor across Multiple CPU Cores. ASPLOS (3) 2023: 483-497 - [c114]Wen Li, Ying Wang, Kaiwei Zou, Huawei Li, Xiaowei Li:
Adversarial Testing: A Novel On-Line Testing Method for Deep Learning Processors. ATS 2023: 1-6 - [c113]Mingjia Fan, Xiaotian Tian, Yintao He, Junxian Li, Yiru Duan, Xiaozhe Hu, Ying Wang, Zhou Jin, Weifeng Liu:
AmgR: Algebraic Multigrid Accelerated on ReRAM. DAC 2023: 1-6 - [c112]Cangyuan Li, Ying Wang, Huawei Li, Yinhe Han:
APPEND: Rethinking ASIP Synthesis in the Era of AI. DAC 2023: 1-6 - [c111]Chengsi Gao, Ying Wang, Cheng Liu, Mengdi Wang, Weiwei Chen, Yinhe Han, Lei Zhang:
Layer-Puzzle: Allocating and Scheduling Multi-task on Multi-core NPUs by Using Layer Heterogeneity. DATE 2023: 1-6 - [c110]Shixin Zhao, Songyun Qu, Ying Wang, Yinhe Han:
ENASA: Towards Edge Neural Architecture Search based on CIM acceleration. DATE 2023: 1-2 - [c109]Haoran Wang, Haobo Xu, Ying Wang, Yinhe Han:
CTA: Hardware-Software Co-design for Compressed Token Attention Mechanism. HPCA 2023: 429-441 - [c108]Ying Xu, Long Cheng, Xuyi Cai, Xiaohan Ma, Weiwei Chen, Lei Zhang, Ying Wang:
Efficient Supernet Training Using Path Parallelism. HPCA 2023: 1249-1261 - [c107]Erjing Luo, Haitong Huang, Cheng Liu, Guoyu Li, Bing Yang, Ying Wang, Huawei Li, Xiaowei Li:
DeepBurning-MixQ: An Open Source Mixed-Precision Neural Network Accelerator Design Framework for FPGAs. ICCAD 2023: 1-9 - [c106]Yilun Zhao, Yu Chen, He Li, Ying Wang, Kaiyan Chang, Bingmeng Wang, Bing Li, Yinhe Han:
Full State Quantum Circuit Simulation Beyond Memory Limit. ICCAD 2023: 1-9 - [c105]Yibo Du, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li, Yinhe Han:
PANG: A Pattern-Aware GCN Accelerator for Universal Graphs. ICCD 2023: 263-266 - [c104]Kaiwei Zou, Songyun Qu, Wen Li, Ying Wang, Huawei Li, Yongpan Liu:
Communication-aware Quantization for Deep Learning Inference Parallelization on Chiplet-based Accelerators. ICPADS 2023: 1123-1130 - [i16]Hao Lv, Bing Li, Lei Zhang, Cheng Liu, Ying Wang:
Variation Enhanced Attacks Against RRAM-based Neuromorphic Computing System. CoRR abs/2302.09902 (2023) - [i15]Xinghua Xue, Cheng Liu, Ying Wang, Bing Yang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li:
Reliability Analysis of Vision Transformers. CoRR abs/2302.10468 (2023) - [i14]Xinghua Xue, Cheng Liu, Haitong Huang, Ying Wang, Bing Yang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li:
ApproxABFT: Approximate Algorithm-Based Fault Tolerance for Vision Transformers. CoRR abs/2302.10469 (2023) - [i13]Kaiyan Chang, Ying Wang, Haimeng Ren, Mengdi Wang, Shengwen Liang, Yinhe Han, Huawei Li, Xiaowei Li:
ChipGPT: How far are we from natural language hardware design. CoRR abs/2305.14019 (2023) - [i12]Haitong Huang, Cheng Liu, Xinghua Xue, Ying Wang, Huawei Li, Xiaowei Li:
MRFI: An Open Source Multi-Resolution Fault Injection Framework for Neural Network Processing. CoRR abs/2306.11758 (2023) - [i11]Xinghua Xue, Cheng Liu, Bo Liu, Haitong Huang, Ying Wang, Tao Luo, Lei Zhang, Huawei Li, Xiaowei Li:
Exploring Winograd Convolution for Cost-effective Neural Network Fault Tolerance. CoRR abs/2308.08230 (2023) - [i10]Erjing Luo, Haitong Huang, Cheng Liu, Guoyu Li, Bing Yang, Ying Wang, Huawei Li, Xiaowei Li:
DeepBurning-MixQ: An Open Source Mixed-Precision Neural Network Accelerator Design Framework for FPGAs. CoRR abs/2308.11334 (2023) - [i9]Qing Zhang, Cheng Liu, Bo Liu, Haitong Huang, Ying Wang, Huawei Li, Xiaowei Li:
Cross-Layer Optimization for Fault-Tolerant Deep Learning. CoRR abs/2312.13754 (2023) - 2022
- [j59]Hang Xiao, Haobo Xu, Ying Wang, Yujie Wang, Yinhe Han:
LINAC: A Spatially Linear Accelerator for Convolutional Neural Networks. IEEE Comput. Archit. Lett. 21(1): 29-32 (2022) - [j58]Xiaohan Ma, Ying Wang, Yujie Wang, Xuyi Cai, Yinhe Han:
Survey on chiplets: interface, interconnect and integration methodology. CCF Trans. High Perform. Comput. 4(1): 43-52 (2022) - [j57]Shengwen Liang, Ying Wang, Huawei Li, Xiaowei Li:
Cognitive SSD+: a deep learning engine for energy-efficient unstructured data retrieval. CCF Trans. High Perform. Comput. 4(3): 302-320 (2022) - [j56]Feng Min, Ying Wang, Haobo Xu, Junpei Huang, Yujie Wang, Xingqi Zou, Meixuan Lu, Yinhe Han:
Dadu-SV: Accelerate Stereo Vision Processing on NPU. IEEE Embed. Syst. Lett. 14(4): 191-194 (2022) - [j55]Haibing Wang, Zhen He, Tengxiao Wang, Junxian He, Xichuan Zhou, Ying Wang, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi:
TripleBrain: A Compact Neuromorphic Hardware Core With Fast On-Chip Self-Organizing and Reinforcement Spike-Timing Dependent Plasticity. IEEE Trans. Biomed. Circuits Syst. 16(4): 636-650 (2022) - [j54]Kaiwei Zou, Ying Wang, Long Cheng, Songyun Qu, Huawei Li, Xiaowei Li:
CAP: Communication-Aware Automated Parallelization for Deep Learning Inference on CMP Architectures. IEEE Trans. Computers 71(7): 1626-1639 (2022) - [j53]Xuyi Cai, Ying Wang, Kaijie Tu, Chengsi Gao, Lei Zhang:
Olympus: Reaching Memory-Optimality on DNN Processors. IEEE Trans. Computers 71(8): 1939-1951 (2022) - [j52]Bing Li, Songyun Qu, Ying Wang:
An Automated Quantization Framework for High-Utilization RRAM-Based PIM. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(3): 583-596 (2022) - [j51]Ying Wang, Yintao He, Long Cheng, Huawei Li, Xiaowei Li:
A Fast Precision Tuning Solution for Always-On DNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(5): 1236-1248 (2022) - [j50]Yintao He, Ying Wang, Huawei Li, Xiaowei Li:
Saving Energy of RRAM-Based Neural Accelerator Through State-Aware Computing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(7): 2115-2127 (2022) - [j49]Yongchen Wang, Ying Wang, Huawei Li, Xiaowei Li:
An Efficient Deep Learning Accelerator Architecture for Compressed Video Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(9): 2808-2820 (2022) - [j48]Cheng Liu, Cheng Chu, Dawen Xu, Ying Wang, Qianlong Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(10): 3400-3413 (2022) - [j47]Weiwei Chen, Ying Wang, Ying Xu, Chengsi Gao, Yinhe Han, Lei Zhang:
Amphis: Managing Reconfigurable Processor Architectures With Generative Adversarial Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 3993-4003 (2022) - [j46]Zhen He, Cong Shi, Tengxiao Wang, Ying Wang, Min Tian, Xichuan Zhou, Ping Li, Liyuan Liu, Nanjian Wu, Gang Luo:
A Low-Cost FPGA Implementation of Spiking Extreme Learning Machine With On-Chip Reward-Modulated STDP Learning. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 1657-1661 (2022) - [j45]Mingming Liu, Long Cheng, Yingqi Gu, Ying Wang, Qingzhi Liu, Noel E. O'Connor:
MPC-CSAS: Multi-Party Computation for Real-Time Privacy-Preserving Speed Advisory Systems. IEEE Trans. Intell. Transp. Syst. 23(6): 5887-5893 (2022) - [j44]Dawen Xu, Zhuangyu Feng, Cheng Liu, Li Li, Ying Wang, Huawei Li, Xiaowei Li:
Taming Process Variations in CNFET for Efficient Last-Level Cache Design. IEEE Trans. Very Large Scale Integr. Syst. 30(4): 418-431 (2022) - [c103]Yintao He, Songyun Qu, Ying Wang, Bing Li, Huawei Li, Xiaowei Li:
InfoX: an energy-efficient ReRAM accelerator design with information-lossless low-bit ADCs. DAC 2022: 97-102 - [c102]Yuquan He, Songyun Qu, Gangliang Lin, Cheng Liu, Lei Zhang, Ying Wang:
Processing-in-SRAM acceleration for ultra-low power visual 3D perception. DAC 2022: 295-300 - [c101]Xinghua Xue, Haitong Huang, Cheng Liu, Tao Luo, Lei Zhang, Ying Wang:
Winograd convolution: a perspective from fault tolerance. DAC 2022: 853-858 - [c100]Shengwen Liang, Ying Wang, Ziming Yuan, Cheng Liu, Huawei Li, Xiaowei Li:
VStore: in-storage graph based vector search accelerator. DAC 2022: 997-1002 - [c99]Fuping Li, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li:
NoCeption: A Fast PPA Prediction Framework for Network-on-Chips Using Graph Neural Network. DATE 2022: 1035-1040 - [c98]Samuel J. Engers, Cheng Chu, Dawen Xu, Ying Wang, Fan Chen:
MOCCA: A Process Variation Tolerant Systolic DNN Accelerator using CNFETs in Monolithic 3D. ACM Great Lakes Symposium on VLSI 2022: 379-382 - [c97]Fuping Li, Ying Wang, Yuanqing Cheng, Yujie Wang, Yinhe Han, Huawei Li, Xiaowei Li:
GIA: A Reusable General Interposer Architecture for Agile Chiplet Integration. ICCAD 2022: 42:1-42:9 - [c96]Lei Dai, Ying Wang, Cheng Liu, Fuping Li, Huawei Li, Xiaowei Li:
Reexamining CGRA Memory Sub-system for Higher Memory Utilization and Performance. ICCD 2022: 42-49 - [c95]Bing Li, Hao Lv, Ying Wang, Yiran Chen:
Security Threat to the Robustness of RRAM-based Neuromorphic Computing System. iSES 2022: 267-271 - [c94]Cheng Chu, Dawen Xu, Ying Wang, Fan Chen:
Canopy: A CNFET-based Process Variation Aware Systolic DNN Accelerator. ISLPED 2022: 24:1-24:6 - [c93]Xuyi Cai, Ying Wang, Xiaohan Ma, Yinhe Han, Lei Zhang:
DeepBurning-SEG: Generating DNN Accelerators of Segment-Grained Pipeline Architecture. MICRO 2022: 1396-1413 - [i8]Xinghua Xue, Haitong Huang, Cheng Liu, Ying Wang, Tao Luo, Lei Zhang:
Winograd Convolution: A Perspective from Fault Tolerance. CoRR abs/2202.08675 (2022) - [i7]Husheng Han, Xing Hu, Kaidi Xu, Pucheng Dang, Ying Wang, Yongwei Zhao, Zidong Du, Qi Guo, Yanzhi Yang, Tianshi Chen:
Real-Time Robust Video Object Detection System Against Physical-World Adversarial Attacks. CoRR abs/2208.09195 (2022) - [i6]Haitong Huang, Xinghua Xue, Cheng Liu, Ying Wang, Tao Luo, Long Cheng, Huawei Li, Xiaowei Li:
Statistical Modeling of Soft Error Influence on Neural Networks. CoRR abs/2210.05876 (2022) - 2021
- [j43]Yibin Tang, Ying Wang, Huawei Li, Xiaowei Li:
To cloud or not to cloud: an on-line scheduler for dynamic privacy-protection of deep learning workload on edge devices. CCF Trans. High Perform. Comput. 3(1): 85-100 (2021) - [j42]Xianzhong Zhou, Ying Wang:
Enhancing the security of memory in cloud infrastructure through in-phase change memory data randomisation. IET Comput. Digit. Tech. 15(5): 321-334 (2021) - [j41]Tengxiao Wang, Cong Shi, Xichuan Zhou, Yingcheng Lin, Junxian He, Ping Gan, Ping Li, Ying Wang, Liyuan Liu, Nanjian Wu, Gang Luo:
CompSNN: A lightweight spiking neural network based on spatiotemporally compressive spike features. Neurocomputing 425: 96-106 (2021) - [j40]Shengwen Liang, Ying Wang, Cheng Liu, Lei He, Huawei Li, Dawen Xu, Xiaowei Li:
EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks. IEEE Trans. Computers 70(9): 1511-1525 (2021) - [j39]Ying Wang, Yongchen Wang, Cong Shi, Long Cheng, Huawei Li, Xiaowei Li:
An Edge 3D CNN Accelerator for Low-Power Activity Recognition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(5): 918-930 (2021) - [j38]Feng Min, Haobo Xu, Ying Wang, Yujie Wang, Jiajun Li, Xingqi Zou, Bei Li, Yinhe Han:
Dadu-Eye: A 5.3 TOPS/W, 30 fps/1080p High Accuracy Stereo Vision Accelerator. IEEE Trans. Circuits Syst. I Regul. Pap. 68(10): 4207-4220 (2021) - [j37]Bi Wu, Zhaohao Wang, Yuxuan Li, Ying Wang, Dijun Liu, Weisheng Zhao, Xiaobo Sharon Hu:
A NAND-SPIN-Based Magnetic ADC. IEEE Trans. Circuits Syst. II Express Briefs 68(2): 617-621 (2021) - [j36]Long Cheng, Ying Wang, Qingzhi Liu, Dick H. J. Epema, Cheng Liu, Ying Mao, John Murphy:
Network-Aware Locality Scheduling for Distributed Data Operators in Data Centers. IEEE Trans. Parallel Distributed Syst. 32(6): 1494-1510 (2021) - [j35]Dawen Xu, Ziyang Zhu, Cheng Liu, Ying Wang, Shuang Zhao, Lei Zhang, Huaguo Liang, Huawei Li, Kwang-Ting Cheng:
Reliability Evaluation and Analysis of FPGA-Based Neural Network Acceleration System. IEEE Trans. Very Large Scale Integr. Syst. 29(3): 472-484 (2021) - [j34]Dawen Xu, Meng He, Cheng Liu, Ying Wang, Long Cheng, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
R2F: A Remote Retraining Framework for AIoT Processors With Computing Errors. IEEE Trans. Very Large Scale Integr. Syst. 29(11): 1955-1966 (2021) - [c92]Cong Shi, Jing Lu, Ying Wang, Ping Li, Min Tian:
Exploiting Memristors for Neuromorphic Reinforcement Learning. AICAS 2021: 1-4 - [c91]Hao Lv, Bing Li, Ying Wang, Cheng Liu, Lei Zhang:
VADER: Leveraging the Natural Variation of Hardware to Enhance Adversarial Attack. ASP-DAC 2021: 487-492 - [c90]Mengdi Wang, Ying Wang, Cheng Liu, Lei Zhang:
Network-on-Interposer Design for Agile Neural-Network Processor Chip Customization. DAC 2021: 49-54 - [c89]Lei He, Cheng Liu, Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li:
GCiM: A Near-Data Processing Accelerator for Graph Construction. DAC 2021: 205-210 - [c88]Chengsi Gao, Ying Wang, Weiwei Chen, Lei Zhang:
An Intelligent Video Processing Architecture for Edge-cloud Video Streaming. DAC 2021: 415-420 - [c87]Yintao He, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li:
TARe: Task-Adaptive in-situ ReRAM Computing for Graph Learning. DAC 2021: 577-582 - [c86]Songyun Qu, Bing Li, Ying Wang, Lei Zhang:
ASBP: Automatic Structured Bit-Pruning for RRAM-based NN Accelerator. DAC 2021: 745-750 - [c85]Yongchen Wang, Ying Wang, Huawei Li, Xiaowei Li:
PixelSieve: Towards Efficient Activity Analysis From Compressed Video Streams. DAC 2021: 811-816 - [c84]Mengdi Wang, Bing Li, Ying Wang, Cheng Liu, Xiaohan Ma, Xiandong Zhao, Lei Zhang:
MT-DLA: An Efficient Multi-Task Deep Learning Accelerator Design. ACM Great Lakes Symposium on VLSI 2021: 1-8 - [c83]Chengsi Gao, Bing Li, Ying Wang, Weiwei Chen, Lei Zhang:
Tenet: A Neural Network Model Extraction Attack in Multi-core Architecture. ACM Great Lakes Symposium on VLSI 2021: 21-26 - [c82]Cheng Chu, Fan Chen, Dawen Xu, Ying Wang:
RECOIN: A Low-Power Processing-in-ReRAM Architecture for Deformable Convolution. ACM Great Lakes Symposium on VLSI 2021: 235-240 - [c81]Yuquan He, Ying Wang, Cheng Liu, Lei Zhang:
PicoVO: A Lightweight RGB-D Visual Odometry Targeting Resource-Constrained IoT Devices. ICRA 2021: 5567-5573 - [c80]Xiaohan Ma, Chang Si, Ying Wang, Cheng Liu, Lei Zhang:
NASA: Accelerating Neural Network Design with a NAS Processor. ISCA 2021: 790-803 - [c79]Weiwei Chen, Ying Wang, Gangliang Lin, Chengsi Gao, Cheng Liu, Lei Zhang:
CHaNAS: coordinated search for network architecture and scheduling policy. LCTES 2021: 42-53 - [c78]Xuyi Cai, Ying Wang, Lei Zhang:
Optimus: towards optimal layer-fusion on deep learning processors. LCTES 2021: 67-79 - [c77]Cangyuan Li, Ying Wang, Cheng Liu, Shengwen Liang, Huawei Li, Xiaowei Li:
GLIST: Towards In-Storage Graph Learning. USENIX ATC 2021: 225-238 - [c76]Huawei Li, Xiaowei Li, Yu Huang, Ying Wang, Gary Guo:
Special Session - Test for AI Chips: from DFT to On-line Testing. VTS 2021: 1 - [i5]Mingming Liu, Long Cheng, Yingqi Gu, Ying Wang, Qingzhi Liu, Noel E. O'Connor:
MPC-CSAS: Multi-Party Computation for Real-time Privacy-preserving Speed Advisory Systems. CoRR abs/2101.06451 (2021) - [i4]Dawen Xu, Qianlong Wang, Cheng Liu, Cheng Chu, Ying Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
HyCA: A Hybrid Computing Architecture for Fault Tolerant Deep Learning. CoRR abs/2106.04772 (2021) - [i3]Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
Energy-Efficient Accelerator Design for Deformable Convolution Networks. CoRR abs/2107.02547 (2021) - [i2]Dawen Xu, Meng He, Cheng Liu, Ying Wang, Long Cheng, Huawei Li, Xiaowei Li, Kwang-Ting Cheng:
R2F: A Remote Retraining Framework for AIoT Processors with Computing Errors. CoRR abs/2107.03096 (2021) - [i1]Dawen Xu, Zhuangyu Feng, Cheng Liu, Li Li, Ying Wang, Yuanqing Cheng, Huawei Li, Xiaowei Li:
Taming Process Variations in CNFET for Efficient Last Level Cache Design. CoRR abs/2108.05023 (2021) - 2020
- [j33]Jiacheng Ni, Keren Liu, Bi Wu, Weisheng Zhao, Yuanqing Cheng, Xiaolong Zhang, Ying Wang:
Write Back Energy Optimization for STT-MRAM-based Last-level Cache with Data Pattern Characterization. ACM J. Emerg. Technol. Comput. Syst. 16(3): 29:1-29:18 (2020) - [j32]Wei He, Jinguo Huang, Tengxiao Wang, Yingcheng Lin, Junxian He, Xichuan Zhou, Ping Li, Ying Wang, Nanjian Wu, Cong Shi:
A High-Speed Low-Cost VLSI System Capable of On-Chip Online Learning for Dynamic Vision Sensor Data Classification. Sensors 20(17): 4715 (2020) - [j31]Dawen Xu, Cheng Liu, Ying Wang, Kaijie Tu, Bingsheng He, Lei Zhang:
Accelerating Generative Neural Networks on Unmodified Deep Learning Processors - A Software Approach. IEEE Trans. Computers 69(8): 1172-1184 (2020) - [j30]Bi Wu, Pengcheng Dai, Yuanqing Cheng, Ying Wang, Jianlei Yang, Zhaohao Wang, Dijun Liu, Weisheng Zhao:
A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(4): 803-815 (2020) - [j29]Bi Wu, Weisheng Zhao, Xiaobo Sharon Hu, Pengcheng Dai, Zhaohao Wang, Chao Wang, Ying Wang, Jianlei Yang, Yuanqing Cheng, Dijun Liu, Youguang Zhang:
Bulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(1): 108-120 (2020) - [j28]Bi Wu, Chao Wang, Zhaohao Wang, Ying Wang, Deming Zhang, Dijun Liu, Youguang Zhang, Xiaobo Sharon Hu:
Field-Free 3T2SOT MRAM for Non-Volatile Cache Memories. IEEE Trans. Circuits Syst. 67-I(12): 4660-4669 (2020) - [c75]Dawen Xu, Ziyang Zhu, Cheng Liu, Ying Wang, Huawei Li, Lei Zhang, Kwang-Ting Cheng:
Persistent Fault Analysis of Neural Networks on FPGA-based Acceleration System. ASAP 2020: 85-92 - [c74]Bosheng Liu, Xiaoming Chen, Yinhe Han, Ying Wang, Jiajun Li, Haobo Xu, Xiaowei Li:
Search-free Accelerator for Sparse Convolutional Neural Networks. ASP-DAC 2020: 524-529 - [c73]Yintao He, Ying Wang, Xiandong Zhao, Huawei Li, Xiaowei Li:
Towards State-Aware Computation in ReRAM Neural Networks. DAC 2020: 1-6 - [c72]Songyun Qu, Bing Li, Ying Wang, Dawen Xu, Xiandong Zhao, Lei Zhang:
RaQu: An automatic high-utilization CNN quantization and mapping framework for general-purpose RRAM Accelerator. DAC 2020: 1-6 - [c71]Yongchen Wang, Ying Wang, Huawei Li, Yinhe Han, Xiaowei Li:
An Efficient Deep Learning Accelerator for Compressed Video Analysis. DAC 2020: 1-6 - [c70]Xiandong Zhao, Ying Wang, Cheng Liu, Cong Shi, Kaijie Tu, Lei Zhang:
BitPruner: Network Pruning for Bit-serial Accelerators. DAC 2020: 1-6 - [c69]Dawen Xu, Kexin Chu, Cheng Liu, Ying Wang, Lei Zhang, Huawei Li:
CNT-Cache: an Energy-Efficient Carbon Nanotube Cache with Adaptive Encoding. DATE 2020: 963-966 - [c68]Weiwei Chen, Ying Wang, Shuang Yang, Chen Liu, Lei Zhang:
You Only Search Once: A Fast Automation Framework for Single-Stage DNN/Accelerator Co-design. DATE 2020: 1283-1286 - [c67]Weiwei Chen, Ying Wang, Shuang Yang, Chen Liu, Lei Zhang:
Towards Best-effort Approximation: Applying NAS to General-purpose Approximate Computing. DATE 2020: 1315-1318 - [c66]Dawen Xu, Cheng Chu, Cheng Liu, Ying Wang, Xianzhong Zhou, Lei Zhang, Huaguo Liang, Huawei Li:
Multi-task Scheduling for PIM-based Heterogeneous Computing System. ACM Great Lakes Symposium on VLSI 2020: 457-462 - [c65]Ying Wang, Mengdi Wang, Bing Li, Huawei Li, Xiaowei Li:
A Many-Core Accelerator Design for On-Chip Deep Reinforcement Learning. ICCAD 2020: 46:1-46:7 - [c64]Shengwen Liang, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li:
DeepBurning-GL: an Automated Framework for Generating Graph Neural Network Accelerators. ICCAD 2020: 72:1-72:9 - [c63]Bing Li, Ying Wang, Yiran Chen:
HitM: High-Throughput ReRAM-based PIM for Multi-Modal Neural Networks. ICCAD 2020: 105:1-105:7 - [c62]Dawen Xu, Cheng Chu, Qianlong Wang, Cheng Liu, Ying Wang, Lei Zhang, Huaguo Liang, Kwang-Ting Cheng:
A Hybrid Computing Architecture for Fault-tolerant Deep Learning Accelerators. ICCD 2020: 478-485 - [c61]Xiandong Zhao, Ying Wang, Xuyi Cai, Cheng Liu, Lei Zhang:
Linear Symmetric Quantization of Neural Networks for Low-precision Integer Hardware. ICLR 2020 - [c60]Rajendra Bishnoi, Lizhou Wu, Moritz Fieback, Christopher Münch, Sarath Mohanachandran Nair, Mehdi Baradaran Tahoori, Ying Wang, Huawei Li, Said Hamdioui:
Special Session - Emerging Memristor Based Memory and CIM Architecture: Test, Repair and Yield Analysis. VTS 2020: 1-10
2010 – 2019
- 2019
- [j27]Ke Han, Lei Zhang, Ying Wang, Miao Wang, Mian Guo, Huan Li, Yu Zhang, Ming Zhao, Qian Zhao, Chunyu Wang, Rui Zhang:
Modeling of Mixing Uniformity for Food With Special Medicinal Purposes Based on Chinese Herbal Medicine. IEEE Access 7: 117318-117326 (2019) - [j26]Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xuehai Qian, Xiaowei Li:
PIMSim: A Flexible and Detailed Processing-in-Memory Simulator. IEEE Comput. Archit. Lett. 18(1): 6-9 (2019) - [j25]Ning Li, Junjie Yang, Jiaming Zhang, Cheng Liang, Ying Wang, Bin Chen, Changying Zhao, Jingwen Wang, Guangye Zhang, Dongmei Zhao, Yi Liu, Lehai Zhang, Jun Yang, Guimei Li, Zhongtao Gai, Lei Zhang, Guoping Zhao:
Correlation of Gut Microbiome Between ASD Children and Mothers and Potential Biomarkers for Risk Assessment. Genom. Proteom. Bioinform. 17(1): 26-38 (2019) - [j24]Shichang Zhang, Ying Wang, Xiaoming Chen, Yinhe Han, Yujie Wang, Xiaowei Li:
Thread: Towards fine-grained precision reconfiguration in variable-precision neural network accelerator. IEICE Electron. Express 16(14): 20190145 (2019) - [j23]Yibin Tang, Ying Wang, Huawei Li, Xiaowei Li:
MV-Net: Toward Real-Time Deep Learning on Mobile GPGPU Systems. ACM J. Emerg. Technol. Comput. Syst. 15(4): 35:1-35:25 (2019) - [j22]Long Cheng, Spyros Kotoulas, Qingzhi Liu, Ying Wang:
Load-balancing distributed outer joins through operator decomposition. J. Parallel Distributed Comput. 132: 21-35 (2019) - [j21]Yun Cheng, Huawei Li, Ying Wang, Xiaowei Li:
Cluster Restoration-Based Trace Signal Selection for Post-Silicon Debug. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(4): 767-779 (2019) - [j20]Ying Wang, Huawei Li, Long Cheng, Xiaowei Li:
A QoS-QoR Aware CNN Accelerator Design Approach. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(11): 1995-2007 (2019) - [j19]Bi Wu, Beibei Zhang, Yuanqing Cheng, Ying Wang, Dijun Liu, Weisheng Zhao:
An Adaptive Thermal-Aware ECC Scheme for Reliable STT-MRAM LLC Design. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1851-1860 (2019) - [c59]Dawen Xu, KouZi Xing, Cheng Liu, Ying Wang, Yulin Dai, Long Cheng, Huawei Li, Lei Zhang:
Resilient Neural Network Training for Accelerators with Computing Errors. ASAP 2019: 99-102 - [c58]Sheng Xu, Xiaoming Chen, Ying Wang, Yinhe Han, Xiaowei Li:
CuckooPIM: an efficient and less-blocking coherence mechanism for processing-in-memory systems. ASP-DAC 2019: 140-145 - [c57]Jiajun Li, Ying Wang, Bosheng Liu, Yinhe Han, Xiaowei Li:
Simulate-the-hardware: training accurate binarized neural networks for low-precision neural accelerators. ASP-DAC 2019: 323-328 - [c56]Dawen Xu, Li Li, Ying Wang, Cheng Liu, Huawei Li:
Exploring emerging CNFET for efficient last level cache design. ASP-DAC 2019: 426-431 - [c55]Wen Li, Ying Wang, Huawei Li, Xiaowei Li:
P3M: a PIM-based neural network model protection scheme for deep learning accelerator. ASP-DAC 2019: 633-638 - [c54]Bosheng Liu, Xiaoming Chen, Ying Wang, Yinhe Han, Jiajun Li, Haobo Xu, Xiaowei Li:
Addressing the issue of processing element under-utilization in general-purpose systolic deep learning accelerators. ASP-DAC 2019: 733-738 - [c53]Ying Wang, Shengwen Liang, Huawei Li, Xiaowei Li:
A None-Sparse Inference Accelerator that Distills and Reuses the Computation Redundancy in CNNs. DAC 2019: 202 - [c52]Yongchen Wang, Ying Wang, Huawei Li, Cong Shi, Xiaowei Li:
Systolic Cube: A Spatial 3D CNN Accelerator Architecture for Low Power Video Analysis. DAC 2019: 210 - [c51]Kaiwei Zou, Ying Wang, Huawei Li, Xiaowei Li:
Learn-to-Scale: Parallelizing Deep Learning Inference on Chip Multiprocessor Architecture. DATE 2019: 1172-1177 - [c50]Shengwen Liang, Ying Wang, Cheng Liu, Huawei Li, Xiaowei Li:
InS-DLA: An In-SSD Deep Learning Accelerator for Near-Data Processing. FPL 2019: 173-179 - [c49]Yintao He, Ying Wang, Yongchen Wang, Huawei Li, Xiaowei Li:
An Agile Precision-Tunable CNN Accelerator based on ReRAM. ICCAD 2019: 1-7 - [c48]Haobo Xu, Ying Wang, Yujie Wang, Jiajun Li, Bosheng Liu, Yinhe Han:
ACG-Engine: An Inference Accelerator for Content Generative Neural Networks. ICCAD 2019: 1-7 - [c47]Wen Li, Ying Wang, Huawei Li, Xiaowei Li:
RRAMedy: Protecting ReRAM-Based Neural Network from Permanent and Soft Faults During Its Lifetime. ICCD 2019: 91-99 - [c46]Cheng Liu, Xinyu Chen, Bingsheng He, Xiaofei Liao, Ying Wang, Lei Zhang:
OBFS: OpenCL Based BFS Optimizations on Software Programmable FPGAs. FPT 2019: 315-318 - [c45]Li Li, Dawen Xu, Kouzi Xing, Cheng Liu, Ying Wang, Huawei Li, Xiaowei Li:
Squeezing the Last MHz for CNN Acceleration on FPGAs. ITC-Asia 2019: 151-156 - [c44]Shengwen Liang, Ying Wang, Youyou Lu, Zhe Yang, Huawei Li, Xiaowei Li:
Cognitive SSD: A Deep Learning Engine for In-Storage Data Retrieval. USENIX ATC 2019: 395-410 - [c43]Wen Li, Ying Wang, Huawei Li, Xiaowei Li:
Leveraging Memory PUFs and PIM-based encryption to secure edge deep learning systems. VTS 2019: 1-6 - 2018
- [j18]Cong Shi, Jiajun Li, Ying Wang, Gang Luo:
Exploiting Lightweight Statistical Learning for Event-Based Vision Processing. IEEE Access 6: 19396-19406 (2018) - [j17]Xiaowei Li, Guihai Yan, Jing Ye, Ying Wang:
Fault tolerance on-chip: a reliable computing paradigm using self-test, self-diagnosis, and self-repair (3S) approach. Sci. China Inf. Sci. 61(11): 112102:1-112102:17 (2018) - [j16]Shiqi Lian, Ying Wang, Yinhe Han:
DimRouter: A Multi-Mode Router Architecture for Higher Energy-Proportionality of On-Chip Networks. J. Comput. Sci. Technol. 33(5): 984-997 (2018) - [j15]Ying Wang, Huawei Li, Yinhe Han, Xiaowei Li:
A Low Overhead In-Network Data Compressor for the Memory Hierarchy of Chip Multiprocessors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(6): 1265-1277 (2018) - [j14]Ying Wang, Huawei Li, Xiaowei Li:
A Case of On-Chip Memory Subsystem Design for Low-Power CNN Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 1971-1984 (2018) - [j13]Yun Cheng, Huawei Li, Ying Wang, Haihua Shen, Bo Liu, Xiaowei Li:
On Trace Buffer Reuse-Based Trigger Generation in Post-Silicon Debug. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(10): 2166-2179 (2018) - [c42]Sheng Xu, Ying Wang, Yinhe Han, Xiaowei Li:
PIMCH: Cooperative memory prefetching in processing-in-memory architecture. ASP-DAC 2018: 209-214 - [c41]Kaiwei Zou, Ying Wang, Huawei Li, Xiaowei Li:
XORiM: A case of in-memory bit-comparator implementation and its performance implications. ASP-DAC 2018: 349-354 - [c40]Shiqi Lian, Yinhe Han, Xiaoming Chen, Ying Wang, Hang Xiao:
Dadu-P: a scalable accelerator for robot motion planning in a dynamic environment. DAC 2018: 109:1-109:6 - [c39]Ying Wang, Zhenyu Quan, Jiajun Li, Yinhe Han, Huawei Li, Xiaowei Li:
A retrospective evaluation of energy-efficient object detection solutions on embedded devices. DATE 2018: 709-714 - [c38]Ying Wang, Dejun Jiang, Jin Xiong:
Caching or Not: Rethinking Virtual File System for Non-Volatile Main Memory. HotStorage 2018 - [c37]Dawen Xu, Kaijie Tu, Ying Wang, Cheng Liu, Bingsheng He, Huawei Li:
FCN-engine: accelerating deconvolutional layers in classic CNN processors. ICCAD 2018: 22 - [c36]Chen Liu, Yuanqing Cheng, Ying Wang, Youguang Zhang, Weisheng Zhao:
NEAR: A Novel Energy Aware Replacement Policy for STT-MRAM LLCs. ISCAS 2018: 1-5 - [c35]Ying Wang, Wen Li, Huawei Li, Xiaowei Li:
Lightweight Timing Channel Protection for Shared DRAM Controller. ITC 2018: 1-10 - [c34]Desong Pang, Dawen Xu, Ying Wang, Huaguo Liang:
MTTF-Aware Reliability Task Scheduling for PIM-Based Heterogeneous Computing System. ITC-Asia 2018: 25-30 - [c33]Ying Wang, Wen Li, Huawei Li, Xiaowei Li:
Leveraging DRAM Refresh to Protect the Memory Timing Channel of Cloud Chip Multi-processors. ITC-Asia 2018: 73-78 - 2017
- [j12]Bing Li, Yu Hu, Ying Wang, Jing Ye, Xiaowei Li:
Power-Utility-Driven Write Management for MLC PCM. ACM J. Emerg. Technol. Comput. Syst. 13(3): 50:1-50:22 (2017) - [j11]Ying Wang, Yinhe Han, Cheng Wang, Huawei Li, Xiaowei Li:
Retention-Aware DRAM Assembly and Repair for Future FGR Memories. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(5): 705-718 (2017) - [j10]Lili Song, Ying Wang, Yinhe Han, Huawei Li, Yuanqing Cheng, Xiaowei Li:
STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1285-1296 (2017) - [j9]Ying Wang, Jiachao Deng, Yuntan Fang, Huawei Li, Xiaowei Li:
Resilience-Aware Frequency Tuning for Neural-Network-Based Approximate Computing Chips. IEEE Trans. Very Large Scale Integr. Syst. 25(10): 2736-2748 (2017) - [c32]Cheng Wang, Ying Wang, Yinhe Han, Lili Song, Zhenyu Quan, Jiajun Li, Xiaowei Li:
CNN-based object detection solutions for embedded heterogeneous multicore SoCs. ASP-DAC 2017: 105-110 - [c31]Yibin Tang, Ying Wang, Huawei Li, Xiaowei Li:
ApproxPIM: Exploiting realistic 3D-stacked DRAM for energy-efficient processing in-memory. ASP-DAC 2017: 396-401 - [c30]Shiqi Lian, Ying Wang, Yinhe Han, Xiaowei Li:
BoDNoC: Providing bandwidth-on-demand interconnection for multi-granularity memory systems. ASP-DAC 2017: 738-743 - [c29]Said Hamdioui, Peyman Pouyan, Huawei Li, Ying Wang, Arijit Raychowdhury, Insik Yoon:
Test and Reliability of Emerging Non-volatile Memories. ATS 2017: 175-183 - [c28]Dawen Xu, Yi Liao, Ying Wang, Huawei Li, Xiaowei Li:
Selective off-loading to Memory: Task Partitioning and Mapping for PIM-enabled Heterogeneous Systems. Conf. Computing Frontiers 2017: 255-258 - [c27]Ying Wang, Huawei Li, Xiaowei Li:
Real-Time Meets Approximate Computing: An Elastic CNN Inference Accelerator with Adaptive Trade-off between QoS and QoR. DAC 2017: 33:1-33:6 - [c26]Shiqi Lian, Yinhe Han, Ying Wang, Yungang Bao, Hang Xiao, Xiaowei Li, Ninghui Sun:
Dadu: Accelerating Inverse Kinematics for High-DOF Robots. DAC 2017: 59:1-59:6 - [c25]Dandan Li, Shuzhen Yao, Senzhang Wang, Ying Wang:
Cross-program design space exploration by ensemble transfer learning. ICCAD 2017: 201-208 - [c24]Bi Wu, Yuanqing Cheng, Pengcheng Dai, Jianlei Yang, Youguang Zhang, Dijun Liu, Ying Wang, Weisheng Zhao:
Thermosiphon: A thermal aware NUCA architecture for write energy reduction of the STT-MRAM based LLCs. ICCAD 2017: 474-481 - [c23]Long Cheng, Ying Wang, Yulong Pei, Dick H. J. Epema:
A Coflow-Based Co-Optimization Framework for High-Performance Data Analytics. ICPP 2017: 392-401 - [c22]Yun Cheng, Huawei Li, Ying Wang, Yingke Gao, Bo Liu, Xiaowei Li:
Flip-flop clustering based trace signal selection for post-silicon debug. VTS 2017: 1-6 - 2016
- [j8]Yinhe Han, Jianbo Dong, Kaiheng Weng, Ying Wang, Xiaowei Li:
Enhanced Wear-Rate Leveling for PRAM Lifetime Improvement Considering Process Variation. IEEE Trans. Very Large Scale Integr. Syst. 24(1): 92-102 (2016) - [j7]Ying Wang, Yinhe Han, Huawei Li, Xiaowei Li:
VANUCA: Enabling Near-Threshold Voltage Operation in Large-Capacity Cache. IEEE Trans. Very Large Scale Integr. Syst. 24(3): 858-870 (2016) - [j6]Ying Wang, Yinhe Han, Huawei Li, Lei Zhang, Yuanqing Cheng, Xiaowei Li:
PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM. IEEE Trans. Very Large Scale Integr. Syst. 24(5): 1613-1625 (2016) - [c21]Ying Wang, Yinhe Han, Jun Zhou, Huawei Li, Xiaowei Li:
DISCO: a low overhead in-network data compressor for energy-efficient chip multi-processors. DAC 2016: 37:1-37:6 - [c20]Ying Wang, Jie Xu, Yinhe Han, Huawei Li, Xiaowei Li:
DeepBurning: automatic generation of FPGA-based learning accelerators for the neural network family. DAC 2016: 110:1-110:6 - [c19]Lili Song, Ying Wang, Yinhe Han, Xin Zhao, Bosheng Liu, Xiaowei Li:
C-brain: a deep learning accelerator that tames the diversity of CNNs through adaptive data-level parallelization. DAC 2016: 123:1-123:6 - [c18]Ying Wang, Huawei Li, Xiaowei Li:
Frequency scheduling for resilient chip multi-processors operating at Near Threshold Voltage. DATE 2016: 1164-1167 - [c17]Ying Wang, Huawei Li, Xiaowei Li:
Re-architecting the on-chip memory sub-system of machine-learning accelerator for embedded devices. ICCAD 2016: 13 - 2015
- [j5]Bosheng Liu, Ying Wang, Zhiqiang You, Yinhe Han, Xiaowei Li:
A signal degradation reduction method for memristor ratioed logic (MRL) gates. IEICE Electron. Express 12(8): 20150062 (2015) - [j4]Ying Wang, Yinhe Han, Lei Zhang, Binzhang Fu, Cheng Liu, Huawei Li, Xiaowei Li:
Economizing TSV Resources in 3-D Network-on-Chip Design. IEEE Trans. Very Large Scale Integr. Syst. 23(3): 493-506 (2015) - [j3]Ying Wang, Lei Zhang, Yinhe Han, Huawei Li, Xiaowei Li:
Data Remapping for Static NUCA in Degradable Chip Multiprocessors. IEEE Trans. Very Large Scale Integr. Syst. 23(5): 879-892 (2015) - [j2]Hang Lu, Binzhang Fu, Ying Wang, Yinhe Han, Guihai Yan, Xiaowei Li:
RISO: Enforce Noninterfered Performance With Relaxed Network-on-Chip Isolation in Many-Core Cloud Processors. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 3053-3064 (2015) - [c16]Hang Lu, Guihai Yan, Yinhe Han, Ying Wang, Xiaowei Li:
ShuttleNoC: Boosting on-chip communication efficiency by enabling localized power adaptation. ASP-DAC 2015: 142-147 - [c15]Guopei Liu, Ying Wang, Sen Li, Huawei Li, Xiaowei Li:
A Lightweight Timing Channel Protection for Shared Memory Controllers. ATS 2015: 55-60 - [c14]Jun Zhou, Huawei Li, Tiancheng Wang, Sen Li, Ying Wang, Xiaowei Li:
TWiN: A Turn-Guided Reliable Routing Scheme for Wireless 3D NoCs. ATS 2015: 85-90 - [c13]Jun Zhou, Huawei Li, Tiancheng Wang, Ying Wang, Xiaowei Li:
TURO: A lightweight turn-guided routing scheme for 3D NoCs. COOL Chips 2015: 1-3 - [c12]Ying Wang, Yinhe Han, Cheng Wang, Huawei Li, Xiaowei Li:
RADAR: a case for retention-aware DRAM assembly and repair in future FGR DRAM memory. DAC 2015: 19:1-19:6 - [c11]Ying Wang, Yinhe Han, Lei Zhang, Huawei Li, Xiaowei Li:
ProPRAM: exploiting the transparent logic resources in non-volatile memory for near data computing. DAC 2015: 47:1-47:6 - [c10]Jiachao Deng, Yuntan Fang, Zidong Du, Ying Wang, Huawei Li, Olivier Temam, Paolo Ienne, David Novo, Xiaowei Li, Yunji Chen, Chengyong Wu:
Retraining-based timing error mitigation for hardware neural networks. DATE 2015: 593-596 - [c9]Ying Wang, Lili Song, Yinhe Han, Yuanqing Cheng, Huawei Li, Xiaowei Li:
A case of precision-tunable STT-RAM memory design for approximate neural network. ISCAS 2015: 1534-1537 - [c8]Yun Cheng, Ying Wang, Huawei Li, Xiaowei Li:
A Similarity Based Circuit Partitioning and Trimming Method to Defend against Hardware Trojans. ISVLSI 2015: 368-373 - [c7]Bi Wu, Yuanqing Cheng, Ying Wang, Aida Todri-Sanial, Guangyu Sun, Lionel Torres, Weisheng Zhao:
An architecture-level cache simulation framework supporting advanced PMA STT-MRAM. NANOARCH 2015: 7-12 - 2014
- [j1]Ying Wang, Lei Zhang, Yinhe Han, Huawei Li:
Reinventing Memory System Design for Many-Accelerator Architecture. J. Comput. Sci. Technol. 29(2): 273-280 (2014) - [c6]Ying Wang, Yinhe Han, Huawei Li:
A low power DRAM refresh control scheme for 3D memory cube. COOL Chips 2014: 1-3 - [c5]Yinhe Han, Ying Wang, Huawei Li, Xiaowei Li:
Data-aware DRAM refresh to squeeze the margin of retention time in hybrid memory cube. ICCAD 2014: 295-300 - 2013
- [c4]Yinhe Han, Ying Wang, Huawei Li, Xiaowei Li:
Enabling Near-Threshold Voltage(NTV) operation in Multi-VDD cache for power reduction. ISCAS 2013: 337-340 - 2011
- [c3]Jianbo Dong, Lei Zhang, Yinhe Han, Ying Wang, Xiaowei Li:
Wear rate leveling: lifetime enhancement of PRAM with endurance variation. DAC 2011: 972-977 - [c2]Ying Wang, Lei Zhang, Yinhe Han, Huawei Li, Xiaowei Li:
Flex memory: Exploiting and managing abundant off-chip optical bandwidth. DATE 2011: 968-973 - 2010
- [c1]Ying Wang, Lei Zhang, Yinhe Han, Huawei Li, Xiaowei Li:
Address Remapping for Static NUCA in NoC-Based Degradable Chip-Multiprocessors. PRDC 2010: 70-76
Coauthor Index
[j80] [c126] [c123] [c122] [c121] [c120] [c119] [i20] [i19] [i18] [i17] [j72] [c112] [c111] [c110] [c109] [c106] [c105] [i13] [j59] [j58] [j56] [j47] [c97] [c93] [j38] [c74] [c71] [j26] [j24] [c58] [c57] [c54] [c48] [j16] [j15] [c42] [c40] [c39] [j11] [j10] [c32] [c30] [c26] [j8] [j7] [j6] [c21] [c20] [c19] [j5] [j4] [j3] [j2] [c16] [c12] [c11] [c9] [j1] [c6] [c5] [c4] [c3] [c2] [c1]
[j80] [j79] [j78] [c126] [c125] [c122] [c121] [c120] [c119] [c118] [c117] [i20] [i19] [j71] [j67] [j62] [j61] [j60] [c114] [c112] [c107] [c105] [c104] [i15] [i14] [i13] [i12] [i11] [i10] [i9] [j57] [j54] [j51] [j50] [j49] [j48] [j44] [c103] [c100] [c99] [c97] [c96] [i6] [j43] [j40] [j39] [j35] [j34] [c89] [c87] [c85] [c77] [c76] [i4] [i3] [i2] [i1] [c75] [c73] [c71] [c69] [c66] [c65] [c64] [c60] [j23] [j21] [j20] [c59] [c56] [c55] [c53] [c52] [c51] [c50] [c49] [c47] [c45] [c44] [c43] [j15] [j14] [j13] [c41] [c39] [c37] [c35] [c33] [j11] [j10] [j9] [c31] [c29] [c28] [c27] [c22] [j7] [j6] [c21] [c20] [c18] [c17] [j4] [j3] [c15] [c14] [c13] [c12] [c11] [c10] [c9] [c8] [j1] [c6] [c5] [c4] [c2] [c1]
[j80] [j79] [j78] [c126] [c125] [c122] [c121] [c120] [c119] [c118] [c117] [i20] [i17] [j71] [j67] [j62] [j61] [j60] [c114] [c107] [c105] [i15] [i14] [i13] [i12] [i11] [i10] [i9] [j57] [j54] [j51] [j50] [j49] [j48] [j44] [c103] [c100] [c99] [c97] [c96] [i6] [j43] [j40] [j39] [j34] [c89] [c87] [c85] [c77] [c76] [i4] [i3] [i2] [i1] [c74] [c73] [c71] [c65] [c64] [j26] [j24] [j23] [j21] [j20] [c58] [c57] [c55] [c54] [c53] [c52] [c51] [c50] [c49] [c47] [c45] [c44] [c43] [j17] [j15] [j14] [j13] [c42] [c41] [c39] [c35] [c33] [j12] [j11] [j10] [j9] [c32] [c31] [c30] [c28] [c27] [c26] [c22] [j8] [j7] [j6] [c21] [c20] [c19] [c18] [c17] [j5] [j4] [j3] [j2] [c16] [c15] [c14] [c13] [c12] [c11] [c10] [c9] [c8] [c5] [c4] [c3] [c2] [c1]
[j79] [j78] [j76] [j75] [j73] [j71] [j70] [j69] [j67] [j65] [j62] [j61] [j60] [c111] [c107] [i16] [i15] [i14] [i12] [i11] [i10] [i9] [j48] [j44] [c102] [c101] [c100] [c99] [c96] [i8] [i6] [j40] [j36] [j35] [j34] [c91] [c90] [c89] [c87] [c84] [c81] [c80] [c79] [c77] [i4] [i3] [i2] [i1] [j31] [c75] [c70] [c69] [c66] [c64] [c62] [c61] [c59] [c56] [c50] [c46] [c45] [c37] [j4]
[j79] [c124] [i21] [j73] [j72] [j70] [j69] [j68] [j66] [j65] [j61] [j60] [c111] [c108] [i16] [i15] [i14] [i11] [j53] [j47] [c102] [c101] [c93] [i8] [j35] [c91] [c90] [c88] [c86] [c84] [c83] [c81] [c80] [c79] [c78] [j31] [c75] [c72] [c70] [c69] [c68] [c67] [c66] [c62] [c61] [j27] [j25] [c59] [c46] [j6] [j4] [j3] [c11] [j1] [c3] [c2] [c1]
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