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ORCIDSarath Mohanachandran Nair
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2020 – today
- 2020
[b1]Sarath Mohanachandran Nair:
Variation Analysis, Fault Modeling and Yield Improvement of Emerging Spintronic Memories. Karlsruhe University, Germany, 2020- [c14]Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Lionel Torres, Sophiane Senni, Guillaume Patrigeon, Pascal Benoit, Gregory di Pendina, Guillaume Prenat:
A Universal Spintronic Technology based on Multifunctional Standardized Stack. DATE 2020: 394-399 - [c13]Sarath Mohanachandran Nair, Rajendra Bishnoi, Arunkumar Vijayan, Mehdi Baradaran Tahoori:
Dynamic Faults based Hardware Trojan Design in STT-MRAM. DATE 2020: 933-938 - [c12]Sarath Mohanachandran Nair, Christopher Münch, Mehdi Baradaran Tahoori:
Defect Characterization and Test Generation for Spintronic-based Compute-In-Memory. ETS 2020: 1-6 - [c11]Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi B. Tahoori, Houman Zahedmanesh, Kristof Croes, Kevin Garello
, Gouri Sankar Kar, Francky Catthoor:
Physics based modeling of bimodal electromigration failure distributions and variation analysis for VLSI interconnects. IRPS 2020: 1-5 - [c10]Rajendra Bishnoi, Lizhou Wu, Moritz Fieback, Christopher Münch, Sarath Mohanachandran Nair, Mehdi Baradaran Tahoori, Ying Wang, Huawei Li, Said Hamdioui:
Special Session - Emerging Memristor Based Memory and CIM Architecture: Test, Repair and Yield Analysis. VTS 2020: 1-10 - [c9]Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori:
Mitigating Read Failures in STT-MRAM. VTS 2020: 1-6
2010 – 2019
- 2019
- [j3]Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori:
A Comprehensive Framework for Parametric Failure Modeling and Yield Analysis of STT-MRAM. IEEE Trans. Very Large Scale Integr. Syst. 27(7): 1697-1710 (2019) - [j2]Samir Ben Dodo, Rajendra Bishnoi, Sarath Mohanachandran Nair, Mehdi Baradaran Tahoori:
A Spintronics Memory PUF for Resilience Against Cloning Counterfeit. IEEE Trans. Very Large Scale Integr. Syst. 27(11): 2511-2522 (2019) - [c8]Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Hayk T. Grigoryan, Grigor Tshagharyan:
Variation-aware Fault Modeling and Test Generation for STT-MRAM. IOLTS 2019: 80-83 - [c7]Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Houman Zahedmanesh, Kristof Croes, Kevin Garello, Gouri Sankar Kar, Francky Catthoor:
Variation-Aware Physics-Based Electromigration Modeling and Experimental Calibration for VLSI Interconnects. IRPS 2019: 1-6 - 2018
- [j1]Sarath Mohanachandran Nair, Rajendra Bishnoi, Mohammad Saber Golanbari, Fabian Oboril, Fazal Hameed, Mehdi Baradaran Tahoori:
VAET-STT: Variation Aware STT-MRAM Analysis and Design Space Exploration Tool. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(7): 1396-1407 (2018) - [c6]Nour Sayed, Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori:
Process variation and temperature aware adaptive scrubbing for retention failures in STT-MRAM. ASP-DAC 2018: 203-208 - [c5]Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori:
Parametric failure modeling and yield analysis for STT-MRAM. DATE 2018: 265-268 - [c4]Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Abdoulaye Gamatié, Pascal Nouet, Frederic Ouattara, Gilles Sassatelli, Kotb Jabeur, Pierre Vanhauwaert, A. Atitoaie, I. Firastrau, Gregory di Pendina, Guillaume Prenat:
Using multifunctional standardized stack as universal spintronic technology for IoT. DATE 2018: 931-936 - [c3]Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori, Grigor Tshagharyan, Hayk T. Grigoryan, Gurgen Harutyunyan, Yervant Zorian:
Defect injection, Fault Modeling and Test Algorithm Generation Methodology for STT-MRAM. ITC 2018: 1-10 - 2017
- [c2]Sarath Mohanachandran Nair, Rajendra Bishnoi, Mohammad Saber Golanbari, Fabian Oboril, Mehdi Baradaran Tahoori:
VAET-STT: A variation aware estimator tool for STT-MRAM based memories. DATE 2017: 1456-1461 - [c1]Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Pascal Nouet, Rui Ma, Martin Kreißig, Frank Ellinger, Kotb Jabeur, Pierre Vanhauwaert, Gregory di Pendina, Guillaume Prenat:
GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTack. ISVLSI 2017: 344-349
Coauthor Index
aka: Mehdi B. Tahoori
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