• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 198 matches

• 2004
• 
  Samar Abdi, Daniel Gajski:
  Automatic generation of equivalent architecture model from functional specification. DAC 2004: 608-613
• 
  Aseem Agarwal, Florentin Dartu, David T. Blaauw:
  Statistical gate delay model considering multiple input switching. DAC 2004: 658-663
• 
  Amit Agarwal, Chris H. Kim, Saibal Mukhopadhyay, Kaushik Roy:
  Leakage in nano-scale technologies: mechanisms, impact and design considerations. DAC 2004: 6-11
• 
  Kanak Agarwal, Dennis Sylvester, David T. Blaauw, Frank Liu, Sani R. Nassif, Sarma B. K. Vrudhula:
  Variational delay metrics for interconnect timing analysis. DAC 2004: 381-384
• 
  Anuradha Agarwal, Hemanth Sampath, Veena Yelamanchili, Ranga Vemuri:
  Fast and accurate parasitic capacitance models for layout-aware. DAC 2004: 145-150
• 
  Charles J. Alpert, Milos Hrkic, Jiang Hu, Stephen T. Quay:
  Fast and flexible buffer trees that navigate the physical layout environment. DAC 2004: 24-29
• 
  Demos Anastasakis, Lisa McIlwain, Slawomir Pilarski:
  Efficient equivalence checking with partitions and hierarchical cut-points. DAC 2004: 539-542
• 
  Zaher S. Andraus, Karem A. Sakallah:
  Automatic abstraction and verification of verilog models. DAC 2004: 218-223
• 
  Dominic A. Antonelli, Danny Z. Chen, Timothy J. Dysart, Xiaobo Sharon Hu, Andrew B. Kahng, Peter M. Kogge, Richard C. Murphy, Michael T. Niemier:
  Quantum-Dot Cellular Automata (QCA) circuit partitioning: problem modeling and solutions. DAC 2004: 363-368
• 
  Sigal Asaf, Eitan Marcus, Avi Ziv:
  Defining coverage views to improve functional coverage analysis. DAC 2004: 41-44
• 
  Todd M. Austin:
  Designing robust microarchitectures. DAC 2004: 78
• 
  Francine Bacchini, Robert F. Damiano, Bob Bentley, Kurt Baty, Kevin Normoyle, Makoto Ishii, Einat Yogev:
  Verification: what works and what doesn't. DAC 2004: 274
• 
  Francine Bacchini, Pierre G. Paulin, Reinaldo A. Bergamaschi, Raj Pawate, Arie Bernstein, Ramesh Chandra, Mohamed Ben-Romdhane:
  System level design: six success stories in search of an industry. DAC 2004: 349-350
• 
  David Bañeres, Jordi Cortadella, Michael Kishinevsky:
  A recursive paradigm to solve Boolean relations. DAC 2004: 416-421
• 
  Max Baron:
  Trends in the use of re-configurable platforms. DAC 2004: 415
• 
  Anirban Basu, Sheng-Chih Lin, Vineet Wason, Amit Mehrotra, Kaustav Banerjee:
  Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant era. DAC 2004: 884-887
• 
  Michael L. Behm, John M. Ludden, Yossi Lichtenstein, Michal Rimon, Michael Vinov:
  Industrial experience with test generation languages for processor verification. DAC 2004: 36-40
• 
  Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy Hartono, Chuanjin Richard Shi:
  Correct-by-construction layout-centric retargeting of large analog designs. DAC 2004: 139-144
• 
  Partha Biswas, Vinay Choudhary, Kubilay Atasu, Laura Pozzi, Paolo Ienne, Nikil D. Dutt:
  Introduction of local memory elements in instruction set extensions. DAC 2004: 729-734
• 
  Shekhar Borkar, Tanay Karnik, Vivek De:
  Design and reliability challenges in nanometer technologies. DAC 2004: 75
• 
  Carlo Brandolese, William Fornaciari, Fabio Salice:
  An area estimation methodology for FPGA based designs at systemc-level. DAC 2004: 129-132
• 
  Gunnar Braun, Achim Nohl, Weihua Sheng, Jianjiang Ceng, Manuel Hohenauer, Hanno Scharwächter, Rainer Leupers, Heinrich Meyr:
  A novel approach for flexible and consistent ADL-driven ASIP design. DAC 2004: 717-722
• 
  Philip Brisk, Adam Kaplan, Majid Sarrafzadeh:
  Area-efficient instruction set synthesis for reconfigurable system-on-chip designs. DAC 2004: 395-400
• 
  Lukai Cai, Andreas Gerstlauer, Daniel Gajski:
  Retargetable profiling for rapid, early system-level design space exploration. DAC 2004: 281-286
• 
  Aiqun Cao, Cheng-Kok Koh:
  Post-layout logic optimization of domino circuits. DAC 2004: 820-825
• 
  Luigi Capodieci, Puneet Gupta, Andrew B. Kahng, Dennis Sylvester, Jie Yang:
  Toward a methodology for manufacturability-driven design rule exploration. DAC 2004: 311-316
• 
  Juan Antonio Carballo, Kevin J. Nowka, Seung-Moon Yoo, Ivan Vo, Clay Cranford, V. Robert Norman:
  Requirement-based design methods for adaptive communications links. DAC 2004: 93-98
• 
  Mario R. Casu, Luca Macchiarulo:
  A new approach to latency insensitive design. DAC 2004: 576-581
• 
  Shih-Chieh Chang, Cheng-Tao Hsieh, Kai-Chiang Wu:
  Re-synthesis for delay variation tolerance. DAC 2004: 814-819
• 
  Pankaj Chauhan, Edmund M. Clarke, Daniel Kroening:
  A SAT-based algorithm for reparameterization in symbolic simulation. DAC 2004: 524-529

skipping 168 more matches