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ORCIDManuel Hohenauer
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2000 – 2009
- 2009
[b1]Manuel Hohenauer:
Retargetable code generation based on an architecture description language. RWTH Aachen University, 2009, pp. 1-192- [j4]Manuel Hohenauer, Felix Engel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr:
A SIMD optimization framework for retargetable compilers. ACM Trans. Archit. Code Optim. 6(1): 2:1-2:27 (2009) - 2008
- [c10]Manuel Hohenauer, Felix Engel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gerrit Bette, Balpreet Singh:
Retargetable Code Optimization for Predicated Execution. DATE 2008: 1492-1497 - 2007
- [j3]Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr:
ASIP architecture exploration for efficient IPSec encryption: A case study. ACM Trans. Embed. Comput. Syst. 6(2): 12 (2007) - [c9]Kingshuk Karuri, Anupam Chattopadhyay, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr:
Increasing data-bandwidth to instruction-set extensions through register clustering. ICCAD 2007: 166-171 - 2006
- [j2]Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun:
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting. J. VLSI Signal Process. 43(2-3): 235-246 (2006) - [c8]Manuel Hohenauer, Christoph Schumacher, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Hans van Someren:
Retargetable code optimization with SIMD instructions. CODES+ISSS 2006: 148-153 - [c7]Hanno Scharwächter, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr:
An interprocedural code optimization technique for network processors using hardware multi-threading support. DATE 2006: 919-924 - 2005
- [c6]Jianjiang Ceng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun:
C Compiler Retargeting Based on Instruction Semantics Models. DATE 2005: 1150-1155 - 2004
- [c5]Gunnar Braun, Achim Nohl, Weihua Sheng, Jianjiang Ceng, Manuel Hohenauer, Hanno Scharwächter, Rainer Leupers, Heinrich Meyr:
A novel approach for flexible and consistent ADL-driven ASIP design. DAC 2004: 717-722 - [c4]Manuel Hohenauer, Hanno Scharwächter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Hans van Someren:
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models. DATE 2004: 1276-1283 - [c3]Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun:
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting. SAMOS 2004: 463-473 - [c2]Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr:
ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study. SCOPES 2004: 33-46 - 2003
- [j1]Oliver Wahlen, Manuel Hohenauer, Rainer Leupers, Heinrich Meyr:
Instruction Scheduler Generation for Retargetable Compilation. IEEE Des. Test Comput. 20(1): 34-41 (2003) - [c1]Oliver Wahlen, Manuel Hohenauer, Gunnar Braun, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Xiaoning Nie:
Extraction of Efficient Instruction Schedulers from Cycle-True Processor Models. SCOPES 2003: 167-181
Coauthor Index
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