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2010 – 2019
- 2015
[j4]Klaus-Dieter Schubert, John M. Ludden, Salma Ayub, J. Behrend, Bishop Brock, Fady Copty, S. M. German, Oz Hershkovitz, H. Horbach, Jonathan R. Jackson, K. Keuerleber, J. Koesters, L. S. Leitner, G. B. Meil, Charles Meissner, Ronny Morad, Amir Nahir, Viresh Paruthi, Richard D. Peterson, Randall R. Pratt, Michal Rimon, John Schumann:
Solutions to IBM POWER8 verification challenges. IBM J. Res. Dev. 59(1) (2015)- 2012
- [c11]Yoav Katz, Michal Rimon, Avi Ziv:
Generating instruction streams using abstract CSP. DATE 2012: 15-20 - [c10]Yoav Katz, Michal Rimon, Avi Ziv:
A Novel Approach for Implementing Microarchitectural Verification Plans in Processor Designs. Haifa Verification Conference 2012: 148-161 - 2011
- [c9]Yoav Katz, Michal Rimon, Avi Ziv, Gai Shaked:
Learning microarchitectural behaviors to improve stimuli generation quality. DAC 2011: 848-853 - 2010
- [c8]John M. Ludden, Michal Rimon, Bryan G. Hickerson, Allon Adir:
Advances in Simultaneous Multithreading Testcase Generation Methods. Haifa Verification Conference 2010: 146-160 - [c7]Eyal Bin, Alaa Ghanayim, Karen Holtz, Eitan Marcus, Ronny Morad, Ofer Peled, Michal Rimon, Gil Shurek, Elena Tsanko:
Ontology-Based Tools in the Service of Hardware Verification. SEKE 2010: 303-308
2000 – 2009
- 2007
- [j3]Yehuda Naveh, Michal Rimon, Itai Jaeger, Yoav Katz, Michael Vinov, Eitan Marcus, Gil Shurek:
Constraint-Based Random Stimuli Generation for Hardware Verification. AI Mag. 28(3): 13-30 (2007) - 2006
- [c6]Yehuda Naveh, Michal Rimon, Itai Jaeger, Yoav Katz, Michael Vinov, Eitan Marcus, Gil Shurek:
Constraint-Based Random Stimuli Generation for Hardware Verification. AAAI 2006: 1720-1727 - [c5]Michal Rimon, Yossi Lichtenstein, Allon Adir, Itai Jaeger, Michael Vinov, S. Johnson, D. Jani:
Addressing Test Generation Challenges for Configurable Processor Verification. HLDVT 2006: 95-101 - 2005
- [c4]Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Lichtenstein, Michal Rimon, Michael Vinov, Massimo A. Calligaro, Andrew Cofler, Gabriel Duffy:
VLIW: a case study of parallelism verification. DAC 2005: 779-782 - 2004
- [j2]Allon Adir, Eli Almog, Laurent Fournier, Eitan Marcus, Michal Rimon, Michael Vinov, Avi Ziv:
Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification. IEEE Des. Test Comput. 21(2): 84-93 (2004) - [c3]Michael L. Behm, John M. Ludden, Yossi Lichtenstein, Michal Rimon, Michael Vinov:
Industrial experience with test generation languages for processor verification. DAC 2004: 36-40 - 2001
- [c2]Allon Adir, Eitan Marcus, Michal Rimon, Amir Voskoboynik:
Improving test quality through resource reallocation. HLDVT 2001: 64-69
1990 – 1999
- 1994
- [j1]Richard M. Keller, Michal Rimon, Aseem Das:
A knowledge-based prototyping environment for construction of scientific modeling software. Autom. Softw. Eng. 1(1): 79-128 (1994) - 1992
- [c1]Richard M. Keller, Michal Rimon:
A knowledge-based software development environment for scientific model-building. KBSE 1992: 192-201
Coauthor Index
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