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2010 – 2019
- 2016
[c14]Hamid R. Motahari Nezhad, Karen Yorav, Peifeng Yin, Taiga Nakamura, Scott Trent, Gil Shurek, Takayuki Kushida, Uma Subramanian:
COOL: A Model-Driven and Automated System for Guided and Verifiable Cloud Solution Design. ICSOC Workshops 2016: 194-198- 2015
- [c13]Stephen Bergman, Gabor Bobok, Walter Kowalski, Shlomit Koyfman, Shiri Moran, Ziv Nevo, Avigail Orni, Viresh Paruthi, Wolfgang Roesner, Gil Shurek, Vasantha Vuyyuru:
Designer-level verification: an industrial experience story. DATE 2015: 410-411 - [c12]Moab Arar, Michael L. Behm, Odellia Boni, Raviv Gal, Alex Goldin, Maxim Ilyaev, Einat Kermany, John R. Reysa, Bilal Saleh
, Klaus-Dieter Schubert, Gil Shurek, Avi Ziv:
The Verification Cockpit - Creating the Dream Playground for Data Analytics over the Verification Process. Haifa Verification Conference 2015: 51-66 - 2012
- [c11]Allon Adir, Alex Goryachev, Lev Greenberg, Tamer Salman, Gil Shurek:
A New Test-Generation Methodology for System-Level Verification of Production Processes. Haifa Verification Conference 2012: 178-192 - 2011
- [c10]Allon Adir, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann:
Leveraging pre-silicon verification resources for the post-silicon validation of the IBM POWER7 processor. DAC 2011: 569-574 - [c9]Allon Adir, Maxim Golubev, Shimon Landa, Amir Nahir, Gil Shurek, Vitali Sokhin, Avi Ziv:
Threadmill: a post-silicon exerciser for multi-threaded processors. DAC 2011: 860-865 - [c8]Allon Adir, Shady Copty, Shimon Landa, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann:
A unified methodology for pre-silicon verification and post-silicon validation. DATE 2011: 1590-1595 - 2010
- [c7]Rajiv Bhatia, Eyal Bin, Eitan Marcus, Gil Shurek:
An ontology and constraint based approach to cache preloading. HLDVT 2010: 129-136 - [c6]Eyal Bin, Alaa Ghanayim, Karen Holtz, Eitan Marcus, Ronny Morad, Ofer Peled, Michal Rimon, Gil Shurek, Elena Tsanko:
Ontology-Based Tools in the Service of Hardware Verification. SEKE 2010: 303-308
2000 – 2009
- 2007
- [j3]Yehuda Naveh, Michal Rimon, Itai Jaeger, Yoav Katz, Michael Vinov, Eitan Marcus, Gil Shurek:
Constraint-Based Random Stimuli Generation for Hardware Verification. AI Mag. 28(3): 13-30 (2007) - 2006
- [c5]Yehuda Naveh, Michal Rimon, Itai Jaeger, Yoav Katz, Michael Vinov, Eitan Marcus, Gil Shurek:
Constraint-Based Random Stimuli Generation for Hardware Verification. AAAI 2006: 1720-1727 - 2003
- [j2]Allon Adir, Hagit Attiya, Gil Shurek:
Information-Flow Models for Shared Memory with an Application to the PowerPC Architecture. IEEE Trans. Parallel Distributed Syst. 14(5): 502-515 (2003) - 2002
- [j1]Eyal Bin, Roy Emek, Gil Shurek, Avi Ziv:
Using a constraint satisfaction formulation and solution techniques for random test program generation. IBM Syst. J. 41(3): 386-402 (2002) - [c4]Allon Adir, Gil Shurek:
Generating concurrent test-programs with collisions for multi-processor verification. HLDVT 2002: 77-82
1990 – 1999
- 1995
- [c3]Aharon Aharon, Dave Goodman, Moshe Levinger, Yossi Lichtenstein, Yossi Malka, Charlotte Metzger, Moshe Molcho, Gil Shurek:
Test Program Generation for Functional Verification of PowerPC Processors in IBM. DAC 1995: 279-285 - 1990
- [c2]Gil Shurek, Orna Grumberg:
The Modular Framework of Computer-Aided Verification. CAV 1990: 214-223 - [c1]Gil Shurek, Orna Grumberg:
The Modular Framework of Computer-Aided Verification. CAV (DIMACS/AMS volume) 1990: 359-380
Coauthor Index
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