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2020 – today
- 2024
[j28]Ramesh Karri, Janusz Rajski, Rob Aitken, Subhasish Mitra, Mark M. Tehranipoor:
VLSI Test and Trust Roundtable. IEEE Des. Test 41(6): 84-94 (2024)- 2023
- [j27]Robert P. Dick
, Rob Aitken, Jace Mogill, John Paul Strachan, Kirk Bresniker, Wei Lu, Yorie Nakahira, Zhiyong Li, Matthew J. Marinella, William Severa, A. Alec Talin, Craig M. Vineyard, Suhas Kumar, Christian Mailhiot, Lennie Klebanoff:
Research Challenges for Energy-Efficient Computing in Automated Vehicles. Computer 56(3): 47-58 (2023) - 2022
- [c97]Xiaosu Lyu, Ludmila Cherkasova, Robert C. Aitken, Gabriel Parmer, Timothy Wood:
Towards efficient processing of latency-sensitive serverless DAGs at the edge. EdgeSys@EuroSys 2022: 49-54
2010 – 2019
- 2019
- [j26]Robert C. Aitken:
56th Design Automation Conference Report. IEEE Des. Test 36(6): 80-81 (2019) - [j25]Rob Aitken, Cecilia Metra:
Special Section on Emerging Trends and Design Paradigms for Memory Systems and Storage. IEEE Trans. Emerg. Top. Comput. 7(3): 433-434 (2019) - [c96]Poojitha Amin, Ludmila Cherkasova, Rob Aitken, Vikas Kache:
Automating Energy Demand Modeling and Forecasting Using Smart Meter Data. ICIOT 2019: 133-137 - [c95]Poojitha Amin, Ludmila Cherkasova, Rob Aitken, Vikas Kache:
Analysis and Demand Forecasting of Residential Energy Consumption at Multiple Time Scales. IM 2019: 494-499 - [c94]Phani Kishore Gadepalli, Gregor Peach, Ludmila Cherkasova, Rob Aitken, Gabriel Parmer:
Challenges and Opportunities for Efficient Serverless Computing at the Edge. SRDS 2019: 261-266 - 2017
- [c93]Maria K. Michael, Rolf Drechsler, Stephan Eggersglüß, Haralampos-G. D. Stratigopoulos, Sybille Hellebrand, Rob Aitken:
Foreword. ETS 2017: 1-2 - [c92]Rob Aitken:
The road to a trillion: Making the IoT work. VLSI-DAT 2017: 1 - 2016
- [j24]Robert C. Aitken, Vikas Chandra, Brian Cline, Shidhartha Das, David Pietromonaco, Lucian Shifren, Saurabh Sinha, Greg Yeric:
Predicting future complementary metal-oxide-semiconductor technology - challenges and approaches. IET Comput. Digit. Tech. 10(6): 315-322 (2016) - [c91]Liangzhen Lai, Vikas Chandra, Rob Aitken:
Resiliency in dynamically power managed designs. ICCAD 2016: 69 - [c90]Rob Aitken:
Coordinating Communication, Technology and Design in the IOT Era. ISLPED 2016: 2 - [c89]Azeez Bhavnagarwala, Imran Iqbal, An Nguyen, David Ondricek, Vikas Chandra, Robert C. Aitken:
A 400mV active VMIN, 200mV retention VMIN, 2.8 GHz 64Kb SRAM with a 0.09 um2 6T bitcell in a 16nm FinFET CMOS process. VLSI Circuits 2016: 1-2 - [c88]Mehdi Baradaran Tahoori, Rob Aitken, Sriram R. Vangal, Bal Sandhu:
Test implications and challenges in near threshold computing special session. VTS 2016: 1 - 2015
- [c87]Robert C. Aitken, Tetsuya Iizuka:
Session 12 - Tutorial - beyond CMOS: Large area electronics-concepts and prospects. CICC 2015: 1 - [c86]Saurabh Sinha, Lucian Shifren, Vikas Chandra, Brian Cline, Greg Yeric, Robert C. Aitken, Bingjie Cheng, Andrew R. Brown, Craig Riddet, C. Alexandar, Campbell Millar, Asen Asenov:
Circuit design perspectives for Ge FinFET at 10nm and beyond. ISQED 2015: 57-60 - [c85]Rob Aitken:
Panel: Is design-for-security the new DFT? VTS 2015: 1 - [c84]Rob Aitken, Ethan H. Cannon, Mondira Pant, Mehdi Baradaran Tahoori:
Resiliency challenges in sub-10nm technologies. VTS 2015: 1-4 - [c83]Erik Larsson, Bill Eklow, Scott Davidsson, Rob Aitken, Artur Jutman, Christophe Lotz:
No Fault Found: The root cause. VTS 2015: 1 - 2014
- [j23]Liangzhen Lai, Vikas Chandra, Robert C. Aitken, Puneet Gupta:
BTI-Gater: An Aging-Resilient Clock Gating Methodology. IEEE J. Emerg. Sel. Topics Circuits Syst. 4(2): 180-189 (2014) - [j22]Mihir R. Choudhury, Vikas Chandra, Robert C. Aitken, Kartik Mohanram:
Time-Borrowing Circuit Designs and Hardware Prototyping for Timing Error Resilience. IEEE Trans. Computers 63(2): 497-509 (2014) - [j21]Liangzhen Lai, Vikas Chandra, Robert C. Aitken, Puneet Gupta:
SlackProbe: A Flexible and Efficient In Situ Timing Slack Monitoring Methodology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(8): 1168-1179 (2014) - [c82]Marco Casale-Rossi, Giovanni De Micheli, Rob Aitken, Antun Domic, Manfred Horstmann, Robert Hum, Philippe Magarshack:
Panel: Emerging vs. established technologies, a two sphinxes' riddle at the crossroads? DATE 2014: 1-4 - [c81]Vikas Chandra, Rob Aitken:
Mobile hardware security. Hot Chips Symposium 2014: 1-40 - [c80]Robert C. Aitken, David Pietromonaco, Brian Cline:
DFM is dead - Long live DFM. ICCD 2014: 300-307 - [c79]James Boley, Benton H. Calhoun, Vikas Chandra, Robert C. Aitken:
Modeling SRAM dynamic VMIN. ICICDT 2014: 1-4 - [c78]Peter Beshay, Vikas Chandra, Rob Aitken, Benton H. Calhoun:
A digital dynamic write margin sensor for low power read/write operations in 28nm SRAM. ISLPED 2014: 307-310 - [c77]Robert C. Aitken, Greg Yeric, Brian Cline, Saurabh Sinha, Lucian Shifren, Imran Iqbal, Vikas Chandra:
Physical design and FinFETs. ISPD 2014: 65-68 - 2013
- [c76]Greg Yeric, Brian Cline, Saurabh Sinha, David Pietromonaco, Vikas Chandra, Rob Aitken:
The past present and future of design-technology co-optimization. CICC 2013: 1-8 - [c75]Liangzhen Lai, Vikas Chandra, Robert C. Aitken, Puneet Gupta:
SlackProbe: a low overhead in situ on-line timing slack monitoring methodology. DATE 2013: 282-287 - [c74]Robert C. Aitken, Görschwin Fey, Zbigniew T. Kalbarczyk, Frank Reichenbach, Matteo Sonza Reorda:
Reliability analysis reloaded: how will we survive? DATE 2013: 358-367 - [c73]James Boley, Vikas Chandra, Robert C. Aitken, Benton H. Calhoun:
Leveraging sensitivity analysis for fast, accurate estimation of SRAM dynamic write VMIN. DATE 2013: 1819-1824 - [c72]Gordon W. Roberts, Rob Aitken:
Welcome message. ITC 2013: 1 - [c71]Adrian Evans, Michael Nicolaidis, Rob Aitken, Burcin Aktan, Olivier Lauzeral:
Hot topic session 4A: Reliability analysis of complex digital systems. VTS 2013: 1 - 2012
- [j20]Rob Aitken:
Yield Learning Perspectives. IEEE Des. Test Comput. 29(1): 59-62 (2012) - [c70]Said Hamdioui, Rob Aitken:
VLSI Test technology: Why is the field not sexy enough? ETS 2012: 1 - [c69]Daeyeon Kim, Vikas Chandra, Robert C. Aitken, David T. Blaauw, Dennis Sylvester:
An adaptive write word-line pulse width and voltage modulation architecture for bit-interleaved 8T SRAMs. ISLPED 2012: 91-96 - [c68]Kenneth Wagner, Martin St. Laurent, Robert C. Aitken, Hugh Barrass, Randall Robinson:
Panel: going green across communications and storage systems: control of power in non-mobile devices. ISLPED 2012: 121-122 - 2011
- [c67]Vikas Chandra, Robert C. Aitken:
On the impact of gate oxide degradation on SRAM dynamic and static write-ability. ASP-DAC 2011: 707-712 - [c66]Satyanand Nalam, Vikas Chandra, Robert C. Aitken, Benton H. Calhoun:
Dynamic write limited minimum operating voltage for nanoscale SRAMs. DATE 2011: 467-472 - [c65]Rob Aitken, Greg Yeric, David Flynn:
Correlating models and silicon for improved parametric yield. DATE 2011: 1159-1163 - [c64]Vikas Chandra, Robert C. Aitken:
Analytical model for SRAM dynamic write-ability degradation due to gate oxide breakdown. DATE 2011: 1172-1175 - [c63]Daeyeon Kim, Vikas Chandra, Robert C. Aitken, David T. Blaauw, Dennis Sylvester:
Variation-aware static and dynamic writability analysis for voltage-scaled bit-interleaved 8-T SRAMs. ISLPED 2011: 145-150 - [p1]Rob Aitken, Krisztián Flautner, John Goodacre:
High-Performance Multiprocessor System on Chip: Trends in Chip Architecture for the Mass Market. Multiprocessor System-on-Chip 2011: 223-239 - 2010
- [j19]Rob Aitken:
Time to retire our benchmarks. IEEE Des. Test Comput. 27(3): 88 (2010) - [c62]John Goodenough, Rob Aitken:
Post-silicon is too late avoiding the $50 million paperweight starts with validated designs. DAC 2010: 8-11 - [c61]Nagaraj Ns, Juan C. Rey, Jamil Kawa, Robert C. Aitken, Christian Lütkemeyer, Vijay Pitchumani, Andrzej J. Strojwas, Steve Trimberger:
Who solves the variability problem? DAC 2010: 218-219 - [c60]Vikas Chandra, Cezary Pietrzyk, Robert C. Aitken:
On the efficacy of write-assist techniques in low voltage nanoscale SRAMs. DATE 2010: 345-350 - [c59]Mihir R. Choudhury, Vikas Chandra, Kartik Mohanram, Robert C. Aitken:
Analytical model for TDDB-based performance degradation in combinational logic. DATE 2010: 423-428 - [c58]Michael Wieckowski, Dennis Sylvester, David T. Blaauw, Vikas Chandra, Sachin Idgunji, Cezary Pietrzyk, Robert C. Aitken:
A black box method for stability analysis of arbitrary SRAM cell structures. DATE 2010: 795-800 - [c57]Mihir R. Choudhury, Vikas Chandra, Kartik Mohanram, Robert C. Aitken:
TIMBER: Time borrowing and error relaying for online timing error resilience. DATE 2010: 1554-1559 - [c56]Satyanand Nalam, Vikas Chandra, Cezary Pietrzyk, Robert C. Aitken, Benton H. Calhoun:
Asymmetric 6T SRAM with two-phase write and split bitline differential sensing for low voltage operation. ISQED 2010: 139-146 - [c55]S. Saqib Khursheed, Shida Zhong, Robert C. Aitken, Bashir M. Al-Hashimi, Sandip Kundu:
Modeling the impact of process variation on resistive bridge defects. ITC 2010: 295-304
2000 – 2009
- 2009
- [c54]Shidhartha Das, David T. Blaauw, David M. Bull, Krisztián Flautner, Rob Aitken:
Addressing design margins through error-tolerant circuits. DAC 2009: 11-12 - [c53]Vikas Chandra, Robert C. Aitken:
Impact of voltage scaling on nanoscale SRAM reliability. DATE 2009: 387-392 - [c52]Robert C. Aitken:
The challenges of correlating silicon and models in high variability CMOS processes. ISPD 2009: 181-182 - [c51]Robert C. Aitken:
DFX and Productivity. VLSI Design 2009: 8 - 2008
- [j18]Rob Aitken, Erik Jan Marinissen:
Guest Editors' Introduction: Addressing the Challenges of Debug and Diagnosis. IEEE Des. Test Comput. 25(3): 206-207 (2008) - [c50]Juan C. Rey, N. S. Nagaraj, Andrew B. Kahng, Fabian Klass, Rob Aitken, Cliff Hou, Luigi Capodieci, Vivek Singh:
DFM in practice: hit or hype? DAC 2008: 898-899 - [c49]S. Turnoy, Peter Wintermayr, Robert C. Aitken, Rudy Lauwereins, J. Tracy Weed, V. Kiefer, J. Hartmann:
Panel Session - Caution Ahead: The Road to Design and Manufacturing at 32 and 22 nm. DATE 2008: 510 - [c48]Vikas Chandra, Robert C. Aitken:
Impact of Technology and Voltage Scaling on the Soft Error Susceptibility in Nanoscale CMOS. DFT 2008: 114-122 - [c47]Rob Aitken, Jerry Bautista, Wojciech Maly, Jan M. Rabaey:
More Moore: foolish, feasible, or fundamentally different? ICCAD 2008: 9 - [c46]Rob Aitken:
Special Session 4: Reliability and Circuit Simulation. IOLTS 2008: 195-196 - 2007
- [b1]Michael Keating, David Flynn, Robert C. Aitken, Alan Gibbons, Kaijian Shi:
Low Power Methodology Manual - for System-on-Chip Design. Springer 2007, ISBN 978-0-387-71818-7, pp. I-XVI, 1-300 - [j17]Dimitris Gizopoulos, Robert C. Aitken, Sandip Kundu:
Guest Editorial: Special Section on "Autonomous Silicon Validation and Testing of Microprocessors and Microprocessor-Based Systems". IEEE Trans. Very Large Scale Integr. Syst. 15(5): 493-494 (2007) - [c45]Anis Uzzaman, Fidel Muradali, Takashi Aikyo, Robert C. Aitken, Tom Jackson, Rajesh Galivanche, Takeshi Onodera:
Test Roles in Diagnosis and Silicon Debug. ATS 2007: 367 - [c44]Marco Casale-Rossi, Andrzej J. Strojwas, Robert C. Aitken, Antun Domic, Carlo Guardiani, Philippe Magarshack, Douglas Pattullo, Joseph Sawicki:
DFM/DFY: should you trust the surgeon or the family doctor? DATE 2007: 439-442 - [c43]Robert C. Aitken, Sachin Idgunji:
Worst-case design and margin for embedded SRAM. DATE 2007: 1289-1294 - [c42]Robert C. Aitken:
Defect or Variation? Characterizing Standard Cell Behavior at 90nm and below. ISQED 2007: 693-698 - 2006
- [c41]Enrico Macii, Massoud Pedram, Dirk Friebel, Robert C. Aitken, Antun Domic, Roberto Zafalon:
Low-power design tools: are EDA vendors taking this matter seriously? DATE 2006: 1227 - [c40]Robert C. Aitken:
Reliability Issues for Embedded SRAM at 90nm and Below. IOLTS 2006: 75 - [c39]Robert C. Aitken:
DFM Metrics for Standard Cells. ISQED 2006: 491-496 - [c38]Robert C. Aitken:
The Design and Validation of IP for DFM/DFY Assurance. ITC 2006: 1-7 - 2005
- [j16]Robert C. Aitken:
ITC is Cool. IEEE Des. Test Comput. 22(6): 616 (2005) - [c37]Gordon W. Roberts, Robert C. Aitken:
Noise and reliability containment approaches. CICC 2005: 20-21 - [c36]Mike Zachariah, Robert C. Aitken:
ESD implementation strategies. CICC 2005: 474-475 - [c35]Robert C. Aitken, Betina Hold:
Modeling Soft-Error Susceptibility for IP Blocks. IOLTS 2005: 70-73 - 2004
- [j15]Rob Aitken, Stefan Eichenberger, Gary Maier, Sandip Kundu, Hank Walker:
ITC 2003 Roundtable: Design for Manufacturability. IEEE Des. Test Comput. 21(2): 144-156 (2004) - [j14]Carol Stolicny, Tapio Koivukangas, Rubin A. Parekhji, Ian G. Harris, Rob Aitken:
ITC 2003 panels: Part 1. IEEE Des. Test Comput. 21(2): 160-163 (2004) - [j13]Rob Aitken:
Test at Gbps: Megaproblem or micromanagement? IEEE Des. Test Comput. 21(4): 344- (2004) - [c34]Robert C. Aitken, Fidel Muradali:
From Working Design Flow to Working Chips: Dependencies and Impacts of Methodology Decisions. DATE 2004: 2 - [c33]Robert C. Aitken:
A Modular Wrapper Enabling High Speed BIST and Repair for Small Wide Memories. ITC 2004: 997-1005 - [c32]Robert C. Aitken:
Redundancy & It's Not Just for Defects Anymore. MTDT 2004: 117-120 - 2003
- [j12]Dimitris Gizopoulos, Robert C. Aitken:
Guest editorial - testing and verification of communication system-on-chip devices. IEEE Commun. Mag. 41(9): 72-73 (2003) - [j11]Robert C. Aitken, Gordon W. Roberts:
ITC 2003: Breaking Test Interface Bottlenecks. IEEE Des. Test Comput. 20(5): 54- (2003) - [j10]Gordon W. Roberts, Robert C. Aitken:
ITC Highlights. IEEE Des. Test Comput. 20(5): 55-57 (2003) - [c31]Rob Aitken, Neeraj Dogra, Dhrumil Gandhi, Scott Becker:
Redundancy, Repair, and Test Features of a 90nm Embedded SRAM Generator. DFT 2003: 467-474 - [c30]Robert C. Aitken:
DFM: The Real 90nm Hurdle. ITC 2003: 1313 - [c29]Robert C. Aitken:
Silicon IP And Successful DFM. ITC 2003: 1314 - [c28]Robert C. Aitken:
Applying Defect-Based Test to Embedded Memories in a COT Model. MTDT 2003: 72- - 2002
- [j9]Robert C. Aitken, Donald L. Wheater:
Guest Editors' Introduction: Stressing the Fundamentals. IEEE Des. Test Comput. 19(5): 54-55 (2002) - [c27]Robert C. Aitken:
Test Generation and Fault Modeling for Stress Testing (invited). ISQED 2002: 95-99 - [c26]Robert C. Aitken, Mustapha Slamani, H. Ding, William R. Eisenstadt, Sanghoon Choi, John McLaughlin:
Wireless Test. VTS 2002: 173-174 - [c25]Julie Segal, Rene Segers, Rob Aitken, S. Eichenberge, A. Gattike, M. Millegen, R. Seger, S. Venkataraman:
Test as a Key Enabler for Faster Yield Ramp-Up. VTS 2002: 177-180 - 2000
- [c24]Peter C. Maxwell, Pete O'Neill, Robert C. Aitken, Ronald Dudley, Neal Jaarsma, Minh Quach, Don Wiseman:
Current ratios: a self-scaling technique for production IDDQ testing. ITC 2000: 1148-1156
1990 – 1999
- 1999
- [j8]Robert C. Aitken:
Nanometer Technology Effects on Fault Models for IC Testing. Computer 32(11): 46-51 (1999) - [c23]Robert C. Aitken, Fidel Muradali:
Trends in SLI design and their effect on test. ITC 1999: 628-637 - [c22]Peter C. Maxwell, Pete O'Neill, Robert C. Aitken, Ronald Dudley, Neal Jaarsma, Minh Quach, Don Wiseman:
Current ratios: a self-scaling technique for production I_DDQ testing. ITC 1999: 738-746 - [c21]Robert C. Aitken:
It Makes Sense to Combine DFT and DFR/DFY. ITC 1999: 1143 - [c20]Robert C. Aitken:
Extending the Pseudo-Stuck-At Fault Model to Provide Complete IDDQ Coverage. VTS 1999: 128-134 - 1998
- [c19]Robert C. Aitken, Jason Cong, Randy Harr, Kenneth L. Shepard, Wayne H. Wolf:
How will CAD handle billion-transistor systems? (panel). ICCAD 1998: 5 - [c18]Robert C. Aitken:
On-chip versus off-chip test: an artificial dichotomy. ITC 1998: 1146 - 1997
- [j7]Robert C. Aitken:
Modeling the Unmodelable: Algorithmic Fault Diagnosis. IEEE Des. Test Comput. 14(3): 98-103 (1997) - [c17]Phil Nigh, Wayne M. Needham, Kenneth M. Butler, Peter C. Maxwell, Robert C. Aitken, Wojciech Maly:
So What Is an Optimal Test Mix? A Discussion of the SEMATECH Methods Experiment. ITC 1997: 1037-1038 - [c16]Vishwani D. Agrawal, Robert C. Aitken, J. Braden, Joan Figueras, S. Kumar, Hans-Joachim Wunderlich, Yervant Zorian:
Power Dissipation During Testing: Should We Worry About it? VTS 1997: 456-457 - [c15]Phil Nigh, Wayne M. Needham, Kenneth M. Butler, Peter C. Maxwell, Robert C. Aitken:
An experimental study comparing the relative effectiveness of functional, scan, IDDq and delay-fault testing. VTS 1997: 459 - 1996
- [j6]Robert C. Aitken:
When tools cry wolf: Testability pitfalls of synthesized designs. IEEE Des. Test Comput. 13(4): 96- (1996) - [c14]Peter C. Maxwell, Robert C. Aitken, Kathleen R. Kollitz, Allen C. Brown:
IDDQ and AC Scan: The War Against Unmodelled Defects. ITC 1996: 250-258 - [c13]Robert C. Aitken:
Modelling the Unmodellable: Algorithmic Fault Diagnosis. ITC 1996: 931 - [c12]Robert C. Aitken, J. Hutcheson, N. Murthy, Phil Nigh, Nicholas Sporck:
Volume Manufacturing - ICs and Boards: DFT to the Rescue? VTS 1996: 212-213 - 1995
- [j5]Robert C. Aitken:
An Overview of Test Synthesis Tools. IEEE Des. Test Comput. 12(2): 8-15 (1995) - [c11]Robert C. Aitken:
Finding Defects with Fault Models. ITC 1995: 498-505 - 1994
- [c10]Peter C. Maxwell, Robert C. Aitken, Leendert M. Huisman:
The Effect on Quality of Non-Uniform Fault Coverage and Fault Probability. ITC 1994: 739-746 - 1993
- [j4]Peter C. Maxwell, Robert C. Aitken:
Test Sets and Reject Rates: All Fault Coverages are Not Created Equal. IEEE Des. Test Comput. 10(1): 42-51 (1993) - [c9]Peter C. Maxwell, Robert C. Aitken:
Biased Voting: A Method for Simulating CMOS Bridging Faults in the Presence of Variable Gate Logic. ITC 1993: 63-72 - [c8]Robert C. Aitken:
BP-1992 A Comparison of Defect Models for Fault Location with IDDQ Measurements. ITC 1993: 1051-1060 - 1992
- [j3]Peter C. Maxwell, Robert C. Aitken:
IDDQ testing as a component of a test suite: The need for several fault coverage metrics. J. Electron. Test. 3(4): 305-316 (1992) - [j2]Robert C. Aitken:
Diagnosis of leakage faults with IDDQ. J. Electron. Test. 3(4): 367-375 (1992) - [j1]Dhiren Xavier, Robert C. Aitken, André Ivanov, Vinod K. Agarwal:
Using an asymmetric error model to study aliasing in signature analysis registers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(1): 16-25 (1992) - [c7]Peter C. Maxwell, Robert C. Aitken, Vic Johansen, Inshen Chiang:
The Effectiveness of IDDQ, Functional and Scan Tests: How Many Fault Coverages Do We Need? ITC 1992: 168-177 - [c6]Robert C. Aitken:
A Comparison of Defect Models for Fault Location with IDDQ Measurements. ITC 1992: 778-787 - 1991
- [c5]Peter C. Maxwell, Robert C. Aitken, Vic Johansen, Inshen Chiang:
The Effect of Different Test Sets on Quality Level Prediction: When is 80% better than 90%? ITC 1991: 358-364 - [c4]Robert C. Aitken:
Fault Location with Current Monitoring. ITC 1991: 623-632
1980 – 1989
- 1989
- [c3]Robert C. Aitken, Vinod K. Agarwal:
A diagnosis method using pseudo-random vectors without intermediate signatures. ICCAD 1989: 574-577 - [c2]Dhiren Xavier, Robert C. Aitken, André Ivanov, Vinod K. Agarwal:
: Experiments on Aliasing in Signature Analysis Registers. ITC 1989: 344-354 - 1988
- [c1]Robert C. Aitken, Vinod K. Agarwal:
Aliasing probability of non-exhaustive randomized syndrome tests. ICCAD 1988: 232-235
Coauthor Index
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