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Stefan Eichenberger
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2010 – 2019
- 2013
- [j6]Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman:
Diagnosis of Interconnect Full Open Defects in the Presence of Gate Leakage Currents. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(2): 301-312 (2013) - 2011
- [j5]Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman:
Diagnosis of Interconnect Full Open Defects in the Presence of Fan-Out. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(12): 1911-1922 (2011) - [j4]Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman:
Gate Leakage Impact on Full Open Defects in Interconnect Lines. IEEE Trans. Very Large Scale Integr. Syst. 19(12): 2209-2220 (2011) - 2010
- [c18]Rosa Rodríguez-Montañés, Daniel Arumí, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman:
Diagnosis of full open defects in interconnect lines with fan-out. ETS 2010: 233-238 - [c17]Friedrich Hapke, Wilfried Redemund, Jürgen Schlöffel, Rene Krenz-Baath, Andreas Glowatz, Michael Wittke, Hamidreza Hashempour, Stefan Eichenberger:
Defect-oriented cell-internal testing. ITC 2010: 285-294 - [c16]Lavanya Jagan, Camelia Hora, Bram Kruseman, Stefan Eichenberger, Ananta K. Majhi, V. Kamakoti:
Impact of Temperature on Test Quality. VLSI Design 2010: 276-281
2000 – 2009
- 2009
- [c15]Friedrich Hapke, Rene Krenz-Baath, Andreas Glowatz, Jürgen Schlöffel, Hamidreza Hashempour, Stefan Eichenberger, Camelia Hora, Dan Adolfsson:
Defect-oriented cell-aware ATPG and fault simulation for industrial cell libraries and designs. ITC 2009: 1-10 - 2008
- [c14]Stefan Eichenberger, Jeroen Geuzebroek, Camelia Hora, Bram Kruseman, Ananta K. Majhi:
Towards a World Without Test Escapes: The Use of Volume Diagnosis to Improve Test Quality. ITC 2008: 1-10 - [c13]Rosa Rodríguez-Montañés, Daniel Arumí, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman:
Time-dependent Behaviour of Full Open Defects in Interconnect Lines. ITC 2008: 1-10 - [c12]Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman:
Full Open Defects in Nanometric CMOS. VTS 2008: 119-124 - 2007
- [j3]Jing Wang, Duncan M. Hank Walker, Xiang Lu, Ananta K. Majhi, Bram Kruseman, Guido Gronthoud, Luis Elvira Villagra, Paul J. A. M. van de Wiel, Stefan Eichenberger:
Modeling Power Supply Noise in Delay Testing. IEEE Des. Test Comput. 24(3): 226-234 (2007) - [c11]Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi:
Diagnosis of Bridging Defects Based on Current Signatures at Low Power Supply Voltages. VTS 2007: 145-150 - [c10]Rosa Rodríguez-Montañés, Daniel Arumí, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi:
Diagnosis of Full Open Defects in Interconnecting Lines. VTS 2007: 158-166 - [i1]Ananta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen:
Memory Testing Under Different Stress Conditions: An Industrial Evaluation. CoRR abs/0710.4693 (2007) - 2006
- [c9]Jing Wang, D. M. H. Walker, Ananta K. Majhi, Bram Kruseman, Guido Gronthoud, Luis Elvira Villagra, Paul van de Wiel, Stefan Eichenberger:
Power Supply Noise in Delay Testing. ITC 2006: 1-10 - 2005
- [c8]Ananta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen:
Memory Testing Under Different Stress Conditions: An Industrial Evaluation. DATE 2005: 438-443 - [c7]Ananta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen:
Memory testing improvements through different stress conditions. ESSCIRC 2005: 299-302 - 2004
- [j2]Rob Aitken, Stefan Eichenberger, Gary Maier, Sandip Kundu, Hank Walker:
ITC 2003 Roundtable: Design for Manufacturability. IEEE Des. Test Comput. 21(2): 144-156 (2004) - [c6]Bram Kruseman, Ananta K. Majhi, Guido Gronthoud, Stefan Eichenberger:
On Hazard-free Patterns for Fine-delay Fault Testing. ITC 2004: 213-222 - [c5]Bram Kruseman, Ananta K. Majhi, Camelia Hora, Stefan Eichenberger, Johan Meirlevede:
Systematic Defects in Deep Sub-Micron Technologies. ITC 2004: 290-299 - [c4]Subhasish Mitra, Erik H. Volkerink, Edward J. McCluskey, Stefan Eichenberger:
Delay Defect Screening using Process Monitor Structures. VTS 2004: 43-52 - 2003
- [j1]Camelia Hora, Rene Segers, Stefan Eichenberger, Maurice Lousberg:
On a Statistical Fault Diagnosis Approach Enabling Fast Yield Ramp-Up. J. Electron. Test. 19(4): 369-376 (2003) - [c3]Stefan Eichenberger:
Design for Manufacturability - or the meaning of 'subtle'. ITC 2003: 1316 - [c2]Ananta K. Majhi, Guido Gronthoud, Camelia Hora, Maurice Lousberg, Pop Valer, Stefan Eichenberger:
Improving Diagnostic Resolution of Delay Faults using Path Delay Fault Model. VTS 2003: 345-350 - 2002
- [c1]Camelia Hora, Rene Segers, Stefan Eichenberger, Maurice Lousberg:
An Effective Diagnosis Method to Support Yield Improvement. ITC 2002: 260-269
Coauthor Index
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