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ORCIDPatrick Chiang 0001
Patrick Yin Chiang
Person information
- affiliation: Fudan University, School of Microelectronics, Shanghai, China
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2020 – today
- 2024
[j50]Yuan Li
, Zhihong Lin, Wenbo Dong, Ziwen Hu, Chill Wang, Shenglong Zhuo, Yifan Wu, Hengwei Yu, Patrick Yin Chiang:
An Angle-Insensitive 138-dB Dynamic Range Light Sensor With 4 Time-Interleaved Channels 32-ppm/°C Temperature-Independent Flicker Detection. IEEE Trans. Circuits Syst. II Express Briefs 71(2): 537-541 (2024)- [c77]Jian Qian, Miao Sun, Sifan Zhou, Ziyu Zhao, Ruizhi Hun, Patrick Chiang:
Sub-SA: Strengthen In-Context Learning via Submodular Selective Annotation. ECAI 2024: 2034-2041 - [c76]Xiongshi Luo, Xuewei You, Zhenghao Li, Hamed Mosalam, Dongfan Xu, Taiyang Fan, Hongchang Qiao, Wentao Zhou, Hongzhi Wu, Liping Zhong, Patrick Yin Chiang, Quan Pan:
7.5 A 224Gb/s/wire Single-Ended PAM-4 Transceiver Front-End with 29dB Equalization for 800GbE/1.6TbE. ISSCC 2024: 132-134 - [i5]Jian Qian, Miao Sun, Sifan Zhou, Biao Wan, Minhao Li, Patrick Chiang:
TimeLDM: Latent Diffusion Model for Unconditional Time Series Generation. CoRR abs/2407.04211 (2024) - [i4]Jian Qian, Miao Sun, Sifan Zhou, Ziyu Zhao, Ruizhi Hun, Patrick Chiang:
Sub-SA: Strengthen In-context Learning via Submodular Selective Annotation. CoRR abs/2407.05693 (2024) - [i3]Jian Qian, Miao Sun, Ashley Lee, Jie Li, Shenglong Zhuo, Patrick Yin Chiang:
SDformer: Efficient End-to-End Transformer for Depth Completion. CoRR abs/2409.08159 (2024) - 2023
- [j49]Shenglong Zhuo, Tao Xia, Lei Zhao, Miao Sun, Yifan Wu, Lei Wang, Hengwei Yu, Jiqing Xu, Jier Wang, Zhihong Lin, Yuan Li, Lei Qiu, Rui Bai, Xuefeng Chen, Patrick Yin Chiang:
Solid-State dToF LiDAR System Using an Eight-Channel Addressable, 20-W/Ch Transmitter, and a 128 × 128 SPAD Receiver With SNR-Based Pixel Binning and Resolution Upscaling. IEEE J. Solid State Circuits 58(3): 757-770 (2023) - [j48]Miao Sun, Shenglong Zhuo, Patrick Yin Chiang:
Multi-Scale Histogram-Based Probabilistic Deep Neural Network for Super-Resolution 3D LiDAR Imaging. Sensors 23(1): 420 (2023) - [j47]Hengwei Yu, Long Wang, Jiqing Xu, Patrick Yin Chiang:
A dToF Ranging Sensor with Accurate Photon Detector Measurements for LiDAR Applications. Sensors 23(6): 3011 (2023) - [j46]Jier Wang, Jie Li, Yifan Wu, Hengwei Yu, Lebei Cui, Miao Sun, Patrick Yin Chiang:
A 256 × 256 LiDAR Imaging System Based on a 200 mW SPAD-Based SoC with Microlens Array and Lightweight RGB-Guided Depth Completion Neural Network. Sensors 23(15): 6927 (2023) - [j45]Shenglong Zhuo, Yuwei Wang, Tao Xia, Yifan Wu, Wei Zheng, Miao Sun, Zhihong Lin, Patrick Yin Chiang:
A 200 MHz 14 W Pulsed Optical Illuminator With Laser Driver ASIC and On-Chip DLL-Based Time Interpolator for Indirect Time-of-Flight Applications. IEEE Trans. Circuits Syst. II Express Briefs 70(2): 396-400 (2023) - [j44]Miao Sun, Yingjie Cao, Jian Qian, Jie Li, Sifan Zhou, Ziyu Zhao, Yifan Wu, Tao Xia, Yajie Qin, Lei Qiu, Shunli Ma, Patrick Yin Chiang, Shenglong Zhuo:
A 40nm 2TOPS/W Depth-Completion Neural Network Accelerator SoC With Efficient Depth Engine for Realtime LiDAR Systems. IEEE Trans. Circuits Syst. II Express Briefs 70(5): 1704-1708 (2023) - [c75]Yifan Wu, Sifan Zhou, Miao Sun, Tao Xia, Jian Qian, Lei Wang, Shi Shi, Lebei Cui, Chill Wang, Yuan Li, Hengwei Yu, Zhihong Lin, Lei Qiu, Yajie Qin, Min Sun, Rui Bai, Xuefeng Chen, Patrick Yin Chiang, Shenglong Zhuo:
dToF LIDAR System Using Addressable Multi-Channel VCSEL Transmitter, 128x80 SPAD Sensor, and ML-Based Object Detection for Adaptive Beam-Steering. CICC 2023: 1-2 - [c74]Tao Xia, Yuan Li, Liujia Song, Wei Chen, Hengwei Yu, Miao Sun, Lei Zhao, Zhihong Lin, Yuntong Tian, Hao Yan, Jiabin Meng, Yifan Wu, Yajie Qin, Xuefeng Chen, Shenglong Zhuo, Patrick Yin Chiang:
A Sub-ns Pulsed VCSEL Driver with Real-Time Adaptive Current Control, Integrated Boost Switching Regulator and Class-1 Laser Eye Safety. ESSCIRC 2023: 197-200 - [c73]Yuan Li, Zhihong Lin, Tao Xia, Jiqing Xu, Yuxiang Tang, Shenglong Zhuo, Xuefeng Chen, Xudong Zhang, Hengwei Yu, Huanli Jiang, Patrick Yin Chiang:
A 2GHz On-Chip-Oscilloscope with High Accuracy Pulse Width Detection for Auto-Peak-Power Controller & Peak-Current Detector in Voltage-Mode DToF Driver. ISCAS 2023: 1-5 - [c72]Zhihong Lin, Yuan Li, Aaron Wang, Chill Wang, Qianfan Ran, Shenglong Zhuo, Yifan Wu, Hengwei Yu, Patrick Yin Chiang:
An Angle-Insensitive Time-Interleaved 4-Channels 138dB Dynamic Range Light Sensor with Flicker Detection for Smart Lighting Application. ISCAS 2023: 1-5 - [c71]Yifan Wu, Jier Wang, Hengwei Yu, Long Wang, Miao Sun, Zhihong Lin, Xiangyu Fang, Mengxin Yu, Jiqing Xu, Lei Qiu, Patrick Chiang, Shenglong Zhuo:
A 2KSPS 123dB Dynamic-Range SPAD-based Optical Sensor SoC with On-chip Auto-Gain-Control and FFT Processor for 100 μlux Light Illuminance and Flicker Detection. ISCAS 2023: 1-5 - [c70]Hengwei Yu, Shenglong Zhuo, Yifan Wu, Long Wang, Jiqing Xu, Jier Wang, Zhihong Lin, Patrick Yin Chiang:
A Fully Integrated dToF System-on-Chip with High Precision Using Adaptive Optical Power Control and Shifted Histogram-Bin Binning. ISCAS 2023: 1-5 - [i2]Sifan Zhou, Zhi Tian, Xiangxiang Chu, Xinyu Zhang, Bo Zhang, Xiaobo Lu, Chengjian Feng, Zequn Jie, Patrick Yin Chiang, Lin Ma:
FastPillars: A Deployment-friendly Pillar-based 3D Detector. CoRR abs/2302.02367 (2023) - 2022
- [j43]Jian He, Yuguang Zhang, Han Liu, Qiwen Liao, Zhao Zhang, Miaofeng Li, Fan Jiang, Jingbo Shi, Jian Liu, Nanjian Wu, Yong Chen, Patrick Yin Chiang, Ningmei Yu, Xi Xiao, Nan Qi:
A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 69(3): 1159-1170 (2022) - [j42]Tao Xia, Xuefeng Chen, Yifan Wu, Yuwei Wang, Yuan Li, Lei Wang, Liujia Song, Hengwei Yu, Jiqing Xu, Miao Sun, Jier Wang, Lei Zhao, Zhihong Lin, Shenglong Zhuo, Patrick Yin Chiang:
An 8-A Sub-1ns Pulsed VCSEL Driver IC With Built-In Pulse Monitor and Automatic Peak Current Control for Direct Time-of-Flight Applications. IEEE Trans. Circuits Syst. II Express Briefs 69(11): 4193-4197 (2022) - [c69]Shenglong Zhuo, Lei Zhao, Tao Xia, Lei Wang, Shi Shi, Yifan Wu, Chang Liu, Chill Wang, Yuwei Wang, Yuan Li, Hengwei Yu, Jiqing Xu, Aaron Wang, Zhihong Lin, Yun Chen, Rui Bai, Xuefeng Chen, Patrick Yin Chiang:
Solid-State dToF LiDAR System Using an Eight-Channel Addressable, 20W/Ch Transmitter, and a 128x128 SPAD Receiver with SNR-Based Pixel Binning and Resolution Upscaling. CICC 2022: 1-2 - [c68]Shenglong Zhuo, Yuwei Wang, Tao Xia, Yifan Wu, Lichun Xie, Wei Zheng, Zhihong Lin, Miao Sun, Lei Zhao, Yajie Qin, Rui Bai, Patrick Yin Chiang:
An Integrated 200MHz 4A Pulsed Laser Driver with DLL-Based Time Interpolator for Indirect Time-of-Flight Applications. ISCAS 2022: 3493-3497 - 2021
- [j41]Juncheng Wang, Xuefeng Chen, Rui Bai, Patrick Yin Chiang, Quan Pan:
A 4 × 10 Gb/s Adaptive Optical Receiver Utilizing Current-Reuse and Crosstalk-Remove. IEEE Trans. Very Large Scale Integr. Syst. 29(12): 2110-2118 (2021) - [c67]Miao Sun, Yingjie Cao, Patrick Yin Chiang:
Energy-aware Retinaface: A Power Efficient Edge-Computing SOC for Face Detector in 40nm. ASICON 2021: 1-4 - [c66]Tao Xia, Xuefeng Chen, Yuwei Wang, Yuan Li, Yifan Wu, Lei Wang, Liujia Song, Shenglong Zhuo, Zhihong Lin, Patrick Yin Chiang:
An integrated 8A pulsed VCSEL array driver under 12V supply with built-in pulse monitor and automatic peak current control for direct time-of-flight applications. A-SSCC 2021: 1-3 - 2020
- [j40]Qiwen Liao, Nan Qi, Miaofeng Li, Shang Hu, Jian He, Bozhi Yin, Jingbo Shi, Jian Liu, Patrick Yin Chiang, Xi Xiao, Nanjian Wu:
A 50-Gb/s PAM4 Si-Photonic Transmitter With Digital-Assisted Distributed Driver and Integrated CDR in 40-nm CMOS. IEEE J. Solid State Circuits 55(5): 1282-1296 (2020) - [c65]Gurjeet Singh, Sun Miao, Shi Shi, Patrick Chiang:
FotonNet: A Hardware-efficient Object Detection System using 3D-depth Segmentation and 2D-deep Neural Network Classifier. ICPRAM 2020: 461-468 - [c64]Kangmin Hu, Julie R. Hu, Brian Otis, Patrick Yin Chiang:
A 1.575GHz, 1.63mW CMOS Injection-Locked Ring Oscillator Powered by FBAR-Based PLL Reference. ISCAS 2020: 1-4 - [c63]Dan Li, Shengwei Gao, Yongjun Shi, Xiaoyan Gui, Nan Qi, Zhiyong Li, Quan Pan, Patrick Chiang, Li Geng:
A 112-Gb/s PAM-4 Linear Optical Receiver in 130-nm SiGe BiCMOS. ISCAS 2020: 1-4 - [c62]Miao Sun, Gurjeet Singh, Patrick Yin Chiang:
Anti-Gan: Discriminating 3D reconstructed and real faces for robust facial Identity in Anti-spoofing Generator Adversarial Network. ISSPIT 2020: 1-8 - [c61]Xin Wang, Yi Peng, Yuanxi Zhang, Tao Xia, Yifan Wu, Juncheng Wang, Lei Wang, Liujia Song, Lei Zhao, Shenglong Zhuo, Quan Pan, Xuefeng Chen, Patrick Yin Chiang, Rui Bai:
PAM-X™: A 25Gb/s-PAM4 Optical Transceiver Chipset for 5G Optical Front-Haul. OFC 2020: 1-3
2010 – 2019
- 2019
- [j39]Juncheng Wang, Quan Pan, Yajie Qin, Xuefeng Chen, Shang Hu, Rui Bai, Xin Wang, Yaxin Cai, Tao Xia, Yuanxi Zhang, Jianxu Ma, Nan Qi, Patrick Yin Chiang:
A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1698-1702 (2019) - [j38]Dan Li, Ming Liu, Shengwei Gao, Yongjun Shi, Yihua Zhang, Zhiyong Li, Patrick Yin Chiang, Franco Maloberti, Li Geng:
Low-Noise Broadband CMOS TIA Based on Multi-Stage Stagger-Tuned Amplifier for High-Speed High-Sensitivity Optical Communication. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(10): 3676-3689 (2019) - [c60]Gurjeet Singh, Sun Miao, Patrick Chiang:
Deep Temporal Filter: An LSTM based approach to filter noise from TDC based SPAD Receiver. ISSPIT 2019: 1-5 - [c59]Shang Hu, Tingyu Yao, Bozhi Yin, Chunyu Song, Lei Zhao, Juncheng Wang, Lei Wang, Rui Bai, Xin Wang, Tao Xia, Yi Peng, Binbin Yao, Yuan Li, Xuefeng Chen, Quan Pan, Nan Qi, Patrick Yin Chiang:
A 50Gb/s PAM-4 Retimer-CDR + VCSEL Driver with Asymmetric Pulsed Pre-Emphasis Integrated into a Single CMOS Die. OFC 2019: 1-3 - 2018
- [c58]Juncheng Wang, Xuefeng Chen, Shang Hu, Yaxin Cai, Rui Bai, Xin Wang, Yuanxi Zhang, Shenglong Zhuo, Chang Liu, Bozhi Yin, Jianxu Ma, Hao Yan, Jiangao Xuan, Milton Lu, Tao Xia, Nan Qi, Patrick Yin Chiang:
A Fully-Integrated 25Gb/s Low-Noise TIA+CDR Optical Receiver designed in 40nm-CMOS. A-SSCC 2018: 67-68 - [c57]Chang Liu, Bozhi Yin, Tingyu Yao, Nan Qi, Dan Li, Jingbo Shi, Juncheng Wang, Hu Shang, Rui Bai, Patrick Yin Chiang:
A 50Gb/s-PAM4 CDR with On-Chip Eye Opening Monitor for Reference-Level and Clock-Sampling Adaptation. OFC 2018: 1-3 - [i1]Gurjeet Singh, Sun Miao, Shi Shi, Patrick Chiang:
FotonNet: A HW-Efficient Object Detection System Using 3D-Depth Segmentation and 2D-DNN Classifier. CoRR abs/1811.07493 (2018) - 2017
- [j37]Han Jin, Yajie Qin, Hao Liang, Lei Wan, Hao Lan, Guoping Chen, Ran Liu, Li-Rong Zheng, Patrick Chiang, Zhiliang Hong:
A Mobile-Based High Sensitivity On-Field Organophosphorus Compounds Detecting System for IoT-Based Food Safety Tracking. J. Sensors 2017: 8797435:1-8797435:13 (2017) - [c56]Nan Qi, Yuhang Kang, Qipeng Lin, Jianxu Ma, Jingbo Shi, Bozhi Yin, Chang Liu, Rui Bai, Shang Hu, Juncheng Wang, Jiangbing Du, Lin Ma, Zuyuan He, Ming Liu, Feng Zhang, Patrick Yin Chiang:
A 51Gb/s, 320mW, PAM4 CDR with baud-rate sampling for high-speed optical interconnects. A-SSCC 2017: 89-92 - 2016
- [j36]Bruce Querbach, Rahul Khanna, Sudeep Puligundla, David Blankenbeckler, Joseph Crop, Patrick Yin Chiang:
Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC. IEEE Des. Test 33(1): 59-67 (2016) - [j35]Patrick Chiang, Visvesh S. Sathe:
Introduction to the Special Section on the 2015 Custom Integrated Circuits Conference. IEEE J. Solid State Circuits 51(8): 1733 (2016) - [j34]Kunzhi Yu, Cheng Li, Hao Li, Alex Titriku, Ayman Shafik, Binhao Wang, Zhongkai Wang, Rui Bai, Chin-Hui Chen, Marco Fiorentino, Patrick Yin Chiang, Samuel Palermo:
A 25 Gb/s Hybrid-Integrated Silicon Photonic Source-Synchronous Receiver With Microring Wavelength Stabilization. IEEE J. Solid State Circuits 51(9): 2129-2141 (2016) - [j33]Bo Zhou, Patrick Chiang:
Short-Range Low-Data-Rate FM-UWB Transceivers: Overview, Analysis, and Design. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(3): 423-435 (2016) - [j32]Shuai Chen, Hao Li, Patrick Yin Chiang:
A Robust Energy/Area-Efficient Forwarded-Clock Receiver With All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 24(2): 578-586 (2016) - [c55]Vahid Behravan, Gurjeet Singh, Patrick Yin Chiang:
A Framework for Compressive-Sensing of 3D Point Clouds. CIS 2016: 69-72 - [c54]Jian Kang, Patrick Yin Chiang, Arun Natarajan:
21.6 A 1.2cm2 2.4GHz self-oscillating rectifier-antenna achieving -34.5dBm sensitivity for wirelessly powered sensors. ISSCC 2016: 374-375 - [c53]Nan Qi, Xi Xiao, Shang Hu, Miaofeng Li, Hao Li, Zhiyong Li, Patrick Chiang:
A 32Gb/s NRZ, 25GBaud/s PAM4 reconfigurable, Si-Photonic MZM transmitter in CMOS. OFC 2016: 1-3 - [c52]Jian Kang, Sujaya Rao, Patrick Chiang, Arun Natarajan:
Area-constrained wirelessly-powered UWB SoC design for small insect localization. WiSNet 2016: 18-20 - 2015
- [j31]Chia-Hung Chen, Yi Zhang, Tao He, Patrick Yin Chiang, Gabor C. Temes:
A Micro-Power Two-Step Incremental Analog-to-Digital Converter. IEEE J. Solid State Circuits 50(8): 1796-1808 (2015) - [j30]Hao Li, Zhe Xuan, Alex Titriku, Cheng Li, Kunzhi Yu, Binhao Wang, Ayman Shafik, Nan Qi, Yang Liu, Ran Ding, Tom Baehr Jones, Marco Fiorentino, Michael Hochberg, Samuel Palermo, Patrick Yin Chiang:
A 25 Gb/s, 4.4 V-Swing, AC-Coupled Ring Modulator-Based WDM Transmitter with Wavelength Stabilization in 65 nm CMOS. IEEE J. Solid State Circuits 50(12): 3145-3159 (2015) - [j29]José M. de la Rosa, Patrick Chiang, Lawrence T. Clark:
Guest Editorial: Special Section on the 2014 IEEE Custom Integrated Circuits Conference (CICC 2014). IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(8): 1897-1898 (2015) - [c51]Shuo Li, Nan Qi, Vahid Behravan, Zhiliang Hong, Patrick Yin Chiang:
A 20 μW dual-channel analog front-end in 65nm CMOS for portable ECG monitoring system. ASICON 2015: 1-4 - [c50]Vahid Behravan, Neil E. Glover, Rutger Farry, Patrick Yin Chiang, Mohammed Shoaib:
Rate-adaptive compressed-sensing and sparsity variance of biomedical signals. BSN 2015: 1-6 - [c49]Vahid Behravan, Shuo Li, Neil E. Glover, Chia-Hung Chen, Mohammed Shoaib, Gabor C. Temes, Patrick Yin Chiang:
A compressed-sensing sensor-on-chip incorporating statistics collection to improve reconstruction performance. CICC 2015: 1-4 - [c48]Hao Li, Zhe Xuan, Alex Titriku, Cheng Li, Kunzhi Yu, Binhao Wang, Ayman Shafik, Nan Qi, Yang Liu, Ran Ding, Tom Baehr Jones, Marco Fiorentino, Michael Hochberg, Samuel Palermo, Patrick Yin Chiang:
22.6 A 25Gb/s 4.4V-swing AC-coupled Si-photonic microring transmitter with 2-tap asymmetric FFE and dynamic thermal tuning in 65nm CMOS. ISSCC 2015: 1-3 - [c47]Kunzhi Yu, Hao Li, Cheng Li, Alex Titriku, Ayman Shafik, Binhao Wang, Zhongkai Wang, Rui Bai, Chin-Hui Chen, Marco Fiorentino, Patrick Yin Chiang, Samuel Palermo:
22.4 A 24Gb/s 0.71pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilization. ISSCC 2015: 1-3 - [c46]Bruce Querbach, Tan Peter Yanyang, Lovelace Van, David Blankenbeckler, Rahul Khanna, Sudeep Puligundla, Patrick Chiang:
Platform IO and system memory test using L3 cache based test (CBT) and parallel execution of CPGC Intel BIST engine. ITC 2015: 1-10 - [c45]Binhao Wang, Kunzhi Yu, Hao Li, Patrick Yin Chiang, Samuel Palermo:
Energy efficiency comparisons of NRZ and PAM4 modulation for ring-resonator-based silicon photonic links. MWSCAS 2015: 1-4 - [c44]Nan Qi, Xianyao Li, Hao Li, Xi Xiao, Lei Wang, Zhiyong Li, Zhuo Gao, Yude Yu, Miki Moyal, Patrick Chiang:
A 25Gb/s, 520mW, 6.4Vpp Silicon-Photonic Mach-Zehnder Modulator with distributed driver in CMOS. OFC 2015: 1-3 - [c43]Kunzhi Yu, Chin-Hui Chen, Cheng Li, Hao Li, Alex Titriku, Binhao Wang, Ayman Shafik, Zhongkai Wang, Marco Fiorentino, Patrick Yin Chiang, Samuel Palermo:
25Gb/s hybrid-integrated silicon photonic receiver with microring wavelength stabilization. OFC 2015: 1-3 - 2014
- [j28]Lingli Xia, Jiao Cheng, Neil E. Glover, Patrick Chiang:
0.56 V, -20 dBm RF-Powered, Multi-Node Wireless Body Area Network System-on-a-Chip With Harvesting-Efficiency Tracking Loop. IEEE J. Solid State Circuits 49(6): 1345-1355 (2014) - [j27]Cheng Li, Rui Bai, Ayman Shafik, Ehsan Zhian Tabasy, Binhao Wang, Geng Tang, Chao Ma, Chin-Hui Chen, Zhen Peng, Marco Fiorentino, Raymond G. Beausoleil, Patrick Chiang, Samuel Palermo:
Silicon Photonic Transceiver Circuits With Microring Resonator Bias-Based Wavelength Stabilization in 65 nm CMOS. IEEE J. Solid State Circuits 49(6): 1419-1436 (2014) - [j26]Young-Hoon Song, Noah Hae-Woong Yang, Hao Li, Patrick Yin Chiang, Samuel Palermo:
An 8-16 Gb/s, 0.65-1.05 pJ/b, Voltage-Mode Transmitter With Analog Impedance Modulation Equalization and Sub-3 ns Power-State Transitioning. IEEE J. Solid State Circuits 49(11): 2631-2643 (2014) - [j25]Jiao Cheng, Nan Qi, Patrick Yin Chiang, Arun Natarajan:
A Low-Power, Low-Voltage WBAN-Compatible Sub-Sampling PSK Receiver in 65 nm CMOS. IEEE J. Solid State Circuits 49(12): 3018-3030 (2014) - [c42]Chia-Hung Chen, Yi Zhang, Tao He, Patrick Yin Chiang, Gabor C. Temes:
A 11μW 250 Hz BW two-step incremental ADC with 100 dB DR and 91 dB SNDR for integrated sensor interfaces. CICC 2014: 1-4 - [c41]Pedram Mohseni, Patrick Chiang:
Energy-efficient bio-sensing systems. CICC 2014: 1 - [c40]Robert Pawlowski, Joseph Crop, Minki Cho, James W. Tschanz, Vivek De, Thomas Fairbanks, Heather Quinn, Shekhar Borkar, Patrick Yin Chiang:
Characterization of radiation-induced SRAM and logic soft errors from 0.33V to 1.0V in 65nm CMOS. CICC 2014: 1-4 - [c39]Rich Meier, Nicholas Kelly, Omri Almog, Patrick Chiang:
A piezoelectric energy-harvesting shoe system for podiatric sensing. EMBC 2014: 622-625 - [c38]Quan Pan, Yipeng Wang, Zhengxiong Hou, Li Sun, Liang Wu, Wing-Hung Ki, Patrick Chiang, C. Patrick Yue:
A 41-mW 30-Gb/s CMOS optical receiver with digitally-tunable cascaded equalization. ESSCIRC 2014: 127-130 - [c37]Rui Bai, Samuel Palermo, Patrick Yin Chiang:
2.5 A 0.25pJ/b 0.7V 16Gb/s 3-tap decision-feedback equalizer in 65nm CMOS. ISSCC 2014: 46-47 - [c36]Jiao Cheng, Nan Qi, Patrick Yin Chiang, Arun Natarajan:
9.6 A 1.3mW 0.6V WBAN-compatible sub-sampling PSK receiver in 65nm CMOS. ISSCC 2014: 168-169 - [c35]Young-Hoon Song, Hae-Woong Yang, Hao Li, Patrick Yin Chiang, Samuel Palermo:
26.5 An 8-to-16Gb/s 0.65-to-1.05pJ/b 2-tap impedance-modulated voltage-mode transmitter with fast power-state transitioning in 65nm CMOS. ISSCC 2014: 446-447 - [c34]Bruce Querbach, Rahul Khanna, David Blankenbeckler, Yulan Zhang, Ronald T. Anderson, David G. Ellis, Zale T. Schoenborn, Sabyasachi Deyati, Patrick Chiang:
A reusable BIST with software assisted repair technology for improved memory and IO debug, validation and test time. ITC 2014: 1-10 - [c33]Hao Li, Shuai Chen, Liqiong Yang, Rui Bai, Weiwu Hu, Freeman Y. Zhong, Samuel Palermo, Patrick Yin Chiang:
A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS. VLSIC 2014: 1-2 - 2013
- [j24]Young-Hoon Song, Rui Bai, Kangmin Hu, Noah Hae-Woong Yang, Patrick Yin Chiang, Samuel Palermo:
A 0.47-0.66 pJ/bit, 4.8-8 Gb/s I/O Transceiver in 65 nm CMOS. IEEE J. Solid State Circuits 48(5): 1276-1289 (2013) - [j23]Chao Ma, Changhui Hu, Jiao Cheng, Lingli Xia, Patrick Yin Chiang:
A Near-Threshold, 0.16 nJ/b OOK-Transmitter With 0.18 nJ/b Noise-Cancelling Super-Regenerative Receiver for the Medical Implant Communications Service. IEEE Trans. Biomed. Circuits Syst. 7(6): 841-850 (2013) - [j22]Jacob Postman, Tushar Krishna, Christopher Edmonds, Li-Shiuan Peh, Patrick Chiang:
SWIFT: A Low-Power Network-On-Chip Implementing the Token Flow Control Router Architecture With Swing-Reduced Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 21(8): 1432-1446 (2013) - [c32]Shuai Chen, Hao Li, Liqiong Yang, Zongren Yang, Weiwu Hu, Patrick Yin Chiang:
A 1.2 pJ/b 6.4 Gb/s 8+1-lane forwarded-clock receiver with PVT-variation-tolerant all-digital clock and data recovery in 28nm CMOS. CICC 2013: 1-4 - [c31]Lei Wan, Yajie Qin, Patrick Chiang, Guoping Chen, Ran Liu, Zhiliang Hong:
High-sensitivity photodetection sensor front-end, detecting organophosphourous compounds for food safety. CICC 2013: 1-4 - [c30]Cheng Li, Rui Bai, Ayman Shafik, Ehsan Zhian Tabasy, Geng Tang, Chao Ma, Chin-Hui Chen, Zhen Peng, Marco Fiorentino, Patrick Chiang, Samuel Palermo:
A ring-resonator-based silicon photonics transceiver with bias-based wavelength stabilization and adaptive-power-sensitivity receiver. ISSCC 2013: 124-125 - [c29]Bruce Querbach, Sudeep Puligundla, Daniel Becerra, Zale T. Schoenborn, Patrick Chiang:
Comparison of hardware based and software based stress testing of memory IO interface. MWSCAS 2013: 637-640 - 2012
- [j21]Kangmin Hu, Rui Bai, Tao Jiang, Chao Ma, Ahmed Ragab, Samuel Palermo, Patrick Yin Chiang:
0.16-0.25 pJ/bit, 8 Gb/s Near-Threshold Serial Link Receiver With Super-Harmonic Injection-Locking. IEEE J. Solid State Circuits 47(8): 1842-1853 (2012) - [j20]Tao Jiang, Wing Liu, Freeman Y. Zhong, Charlie Zhong, Kangmin Hu, Patrick Yin Chiang:
A Single-Channel, 1.25-GS/s, 6-bit, 6.08-mW Asynchronous Successive-Approximation ADC With Improved Feedback Delay in 40-nm CMOS. IEEE J. Solid State Circuits 47(10): 2444-2453 (2012) - [j19]Yang Xu, Baoyong Chi, Xiaobao Yu, Nan Qi, Patrick Chiang, Zhihua Wang:
Power-Scalable, Complex Bandpass/Low-Pass Filter With I/Q Imbalance Calibration for a Multimode GNSS Receiver. IEEE Trans. Circuits Syst. II Express Briefs 59-II(1): 30-34 (2012) - [j18]Lingli Xia, Jingguang Wang, Will Beattie, Jacob Postman, Patrick Yin Chiang:
Sub-2-ps, Static Phase Error Calibration Technique Incorporating Measurement Uncertainty Cancellation for Multi-Gigahertz Time-Interleaved T/H Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(2): 276-284 (2012) - [j17]Nan Qi, Yang Xu, Baoyong Chi, Yang Xu, Xiaobao Yu, Xing Zhang, Ni Xu, Patrick Chiang, Woogeun Rhee, Zhihua Wang:
A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(8): 1720-1732 (2012) - [j16]Kangmin Hu, Larry Wu, Patrick Yin Chiang:
A Comparative Study of 20-Gb/s NRZ and Duobinary Signaling Using Statistical Analysis. IEEE Trans. Very Large Scale Integr. Syst. 20(7): 1336-1341 (2012) - [j15]Nariman Moezzi Madani, Thorlindur Thorolfsson, Patrick Chiang, William Rhett Davis:
Area-Efficient Antenna-Scalable MIMO Detector for K-best Sphere Decoding. J. Signal Process. Syst. 68(2): 171-182 (2012) - [c28]Jiao Cheng, Lingli Xia, Chao Ma, Yong Lian, Xiaoyuan Xu, C. Patrick Yue, Zhiliang Hong, Patrick Yin Chiang:
A near-threshold, multi-node, wireless body area sensor network powered by RF energy harvesting. CICC 2012: 1-4 - [c27]Joseph Crop, Robert Pawlowski, Patrick Chiang:
Regaining throughput using completion detection for error-resilient, near-threshold logic. DAC 2012: 974-979 - [c26]Yi Luo, Chris Winstead, Patrick Chiang:
125Mbps ultra-wideband system evaluation for cortical implant devices. EMBC 2012: 779-782 - [c25]Taj Morton, Alex Weeks, Samuel House, Patrick Chiang, Chris Scaffidi:
Location and activity tracking with the cloud. EMBC 2012: 5846-5849 - [c24]Evgeni Krimer, Patrick Chiang, Mattan Erez:
Lane decoupling for improving the timing-error resiliency of wide-SIMD architectures. ISCA 2012: 237-248 - [c23]Chia-Hung Chen, Joseph Crop, Jeongseok Chae, Patrick Chiang, Gabor C. Temes:
A 12-bit 7 µW/channel 1 kHz/channel incremental ADC for biosensor interface circuits. ISCAS 2012: 2969-2972 - [c22]Eric Donkoh, Teck Siong Ong, Yan Nee Too, Patrick Chiang:
Register file write data gating techniques and break-even analysis model. ISLPED 2012: 149-154 - [c21]Eric Donkoh, Patrick Chiang:
A low-leakage dynamic register file with unclocked wordline and sub-segmentation for improved bitline scalability. ISLPED 2012: 155-160 - [c20]Robert Pawlowski, Evgeni Krimer, Joseph Crop, Jacob Postman, Nariman Moezzi Madani, Mattan Erez, Patrick Chiang:
A 530mV 10-lane SIMD processor with variation resiliency in 45nm SOI. ISSCC 2012: 492-494 - [c19]Rahul Khanna, Debabani Choudhury, Patrick Yin Chiang, Huaping Liu, Lingli Xia:
Innovative approach to server performance and power monitoring in data centers using wireless sensors (invited paper). RWS 2012: 99-102 - [c18]Tao Jiang, Kangmin Hu, Patrick Yin Chiang:
A low-power, capacitively-divided, ring oscillator with digitally adjustable voltage swing. VLSI-DAT 2012: 1-4 - 2011
- [j14]Lingli Xia, Stephen Redfield, Patrick Chiang:
Experimental Characterization of a UWB Channel for Body Area Networks. EURASIP J. Wirel. Commun. Netw. 2011 (2011) - [j13]Lingli Xia, Hu Chen, Yumei Huang, Zhiliang Hong, Patrick Yin Chiang:
100-phase, dual-loop delay-locked loop for impulse radio ultra-wideband coherent receiver synchronisation. IET Circuits Devices Syst. 5(6): 484-493 (2011) - [j12]Ahmed Ragab, Yang Liu, Kangmin Hu, Patrick Chiang, Samuel Palermo:
Receiver Jitter Tracking Characteristics in High-Speed Source Synchronous Links. J. Electr. Comput. Eng. 2011: 982314:1-982314:15 (2011) - [j11]Changhui Hu, Rahul Khanna, Jay J. Nejedlo, Kangmin Hu, Huaping Liu, Patrick Yin Chiang:
A 90 nm-CMOS, 500 Mbps, 3-5 GHz Fully-Integrated IR-UWB Transceiver With Multipath Equalization Using Pulse Injection-Locking for Receiver Phase Synchronization. IEEE J. Solid State Circuits 46(5): 1076-1088 (2011) - [j10]Rui Bai, Jingguang Wang, Lingli Xia, Feng Zhang, Zongren Yang, Weiwu Hu, Patrick Chiang:
Sinusoidal Clock Sampling for Multigigahertz ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(12): 2808-2815 (2011) - [c17]Changhui Hu, Patrick Yin Chiang:
All-digital 3-50 GHz ultra-wideband pulse generator for short-range wireless interconnect in 40nm CMOS. CICC 2011: 1-4 - [c16]Kangmin Hu, Tao Jiang, Samuel Palermo, Patrick Yin Chiang:
Low-power 8Gb/s near-threshold serial link receivers using super-harmonic injection locking in 65nm CMOS. CICC 2011: 1-4 - [c15]Jacob Postman, Patrick Chiang:
Energy-efficient transceiver circuits for short-range on-chip interconnects. CICC 2011: 1-4 - [c14]Nariman Moezzi Madani, Thorlindur Thorolfsson, Joseph Crop, Patrick Chiang, W. Rhett Davis:
An energy-efficient 64-QAM MIMO detector for emerging wireless standards. DATE 2011: 246-251 - [c13]Ryan K. Albright, Benjamin J. Goska, Tory M. Hagen, Yu Mike Chi, Gert Cauwenberghs, Patrick Yin Chiang:
OLAM: A wearable, non-contact sensor for continuous heart-rate and activity monitoring. EMBC 2011: 5625-5628 - [c12]Samuel House, Sean Connell, Ian Milligan, Daniel Austin, Tamara L. Hayes, Patrick Chiang:
Indoor localization using pedestrian dead reckoning updated with RFID-based fiducials. EMBC 2011: 7598-7601 - [c11]Joseph Crop, Robert Pawlowski, Nariman Moezzi Madani, Jarrod Jackson, Patrick Chiang:
Design automation methodology for improving the variability of synthesized digital circuits operating in the sub/near-threshold regime. IGCC 2011: 1-6 - [c10]Thuan Duong-Ba, Thinh P. Nguyen, Patrick Chiang:
Network coding in multicore processors. IPCCC 2011: 1-7 - 2010
- [j9]Evgeni Krimer, Robert Pawlowski, Mattan Erez, Patrick Chiang:
Synctium: a Near-Threshold Stream Processor for Energy-Constrained Parallel Applications. IEEE Comput. Archit. Lett. 9(1): 21-24 (2010) - [j8]Patrick Yin Chiang, Sirikarn Woracheewan, Changhui Hu, Lei Guo, Rahul Khanna, Jay J. Nejedlo, Huaping Liu:
Short-Range, Wireless Interconnect within a Computing Chassis: Design Challenges. IEEE Des. Test Comput. 27(4): 32-43 (2010) - [j7]Kangmin Hu, Tao Jiang, Jingguang Wang, Frank O'Mahony, Patrick Yin Chiang:
A 0.6 mW/Gb/s, 6.4-7.2 Gb/s Serial Link Receiver Using Local Injection-Locked Ring Oscillators in 90 nm CMOS. IEEE J. Solid State Circuits 45(4): 899-908 (2010) - [j6]Patrick Yin Chiang, Changhui Hu:
Chaotic Pulse-Position Baseband Modulation for an Ultra-Wideband Transceiver in CMOS. IEEE Trans. Circuits Syst. II Express Briefs 57-II(8): 642-646 (2010) - [c9]Tao Jiang, Wing Liu, Freeman Y. Zhong, Charlie Zhong, Patrick Yin Chiang:
Single-channel, 1.25-GS/s, 6-bit, loop-unrolled asynchronous SAR-ADC in 40nm-CMOS. CICC 2010: 1-4 - [c8]Tushar Krishna, Jacob Postman, Christopher Edmonds, Li-Shiuan Peh, Patrick Chiang:
SWIFT: A SWing-reduced interconnect for a Token-based Network-on-Chip in 90nm CMOS. ICCD 2010: 439-446
2000 – 2009
- 2009
- [j5]Tushar Krishna, Amit Kumar, Li-Shiuan Peh, Jacob Postman, Patrick Chiang, Mattan Erez:
Express Virtual Channels with Capacitively Driven Global Links. IEEE Micro 29(4): 48-61 (2009) - [j4]Baoyong Chi, Jinke Yao, Patrick Chiang, Zhihua Wang:
A Fast-Settling Wideband-IF ASK Baseband Circuit for a Wireless Endoscope Capsule. IEEE Trans. Circuits Syst. II Express Briefs 56-II(4): 275-279 (2009) - [j3]Baoyong Chi, Jinke Yao, Patrick Chiang, Zhihua Wang:
A 0.18-muhboxm CMOS GFSK Analog Front End Using a Bessel-Based Quadrature Discriminator With On-Chip Automatic Tuning. IEEE Trans. Circuits Syst. I Regul. Pap. 56-I(11): 2498-2510 (2009) - [c7]Tao Jiang, Patrick Yin Chiang:
Sense Amplifier Power and Delay Characterization for Operation under Low-Vdd and Low-voltage Clock Swing. ISCAS 2009: 181-184 - [c6]Zhuo Gao, D. Kesharwani, Patrick Chiang, Weiwu Hu:
Measuring and Compensating for Process Mismatch-induced, Reference Spurs in Phase-locked Loops using a Sub-sampled DSP. ISCAS 2009: 1585-1588 - [c5]Zhuo Gao, Hang Yu, Patrick Chiang, Yi Yang, Feng Zhang:
A 10Gb/s Wire-line Transceiver with Half Rate Period Calibration CDR. ISCAS 2009: 1827-1830 - [c4]Kangmin Hu, Tao Jiang, Patrick Chiang:
Comparison of On-die Global Clock Distribution Methods for Parallel Serial Links. ISCAS 2009: 1843-1846 - 2008
- [c3]Tushar Krishna, Amit Kumar, Patrick Chiang, Mattan Erez, Li-Shiuan Peh:
NoC with Near-Ideal Express Virtual Channels Using Global-Line Communication. Hot Interconnects 2008: 11-20 - 2007
- [c2]Yike Cui, Baoyong Chi, Minjie Liu, Yulei Zhang, Yongming Li, Zhihua Wang, Patrick Chiang:
Process Variation Compensation of a 2.4GHz LNA in 0.18um CMOS Using Digitally Switchable Capacitance. ISCAS 2007: 2562-2565 - 2005
- [j2]Patrick Chiang, William J. Dally, Ming-Ju Edward Lee, Ramesh Senthinathan, Yangjin Oh, Mark A. Horowitz:
A 20-Gb/s 0.13-μm CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexer. IEEE J. Solid State Circuits 40(4): 1004-1011 (2005) - 2001
- [c1]Patrick Chiang, William J. Dally, Ming-Ju Edward Lee:
Monolithic chaotic communications system. ISCAS (3) 2001: 325-328 - 2000
- [j1]Ming-Ju Edward Lee, William J. Dally, Patrick Chiang:
Low-power area-efficient high-speed I/O circuit techniques. IEEE J. Solid State Circuits 35(11): 1591-1599 (2000)
Coauthor Index
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