default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDJian Liu 0021
Person information
- affiliation: Chinese Academy of Sciences, Institute of Semiconductors, State Key Laboratory of Superlattices and Microstructures, Beijing, China
Other persons with the same name
- Jian Liu — disambiguation page
- Jian Liu 0001
![[0000-0002-8331-0834]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-8331-0834")
— University of Tennessee, Knoxville, TN, USA (and 3 more) - Jian Liu 0002 — Hunan University, Changsha, The State Key Laboratory of Advanced Design and Manufacturing for Vehicle Body, China
- Jian Liu 0003 — Shijiazhuang Mechanical Engineering College, Department of Mathematics, Hebei, China
- Jian Liu 0004 — Tianjin University, School of Computer Software, Tianjin, China (and 2 more)
- Jian Liu 0005 — University of Science and Technology of China, Department of Modern Physics, Hefei, China
- Jian Liu 0006 — Southeast University, School of Automation, Key Laboratory of Measurement and Control of Complex System of Engineering Nanjing, China (and 1 more)
- Jian Liu 0007 — East China Normal University, Shanghai Key Laboratory of Trustworthy Computing, China (and 1 more)
- Jian Liu 0008 — Chinese Academy of Sciences, Institute of Information Engineering, Beijing, China (and 1 more)
- Jian Liu 0009 — Harbin Institute of Technology, Institute of Ultra-Precision Optoelectronic Instrument Engineering, China
- Jian Liu 0010 — The University of Arizona, Systems and Industrial Engineering Department, Tucson, AZ, USA (and 1 more)
- Jian Liu 0011 — Huazhong University of Science and Technology, Institute of Pattern Recognition and Artificial Intelligence, Wuhan, China
- Jian Liu 0012 — Zhejiang University, Hangzhou, China (and 2 more)
- Jian Liu 0013 — Shandong University of Finance and Economics, School of Mathematics and Quantitative Economics, China
- Jian Liu 0014 — University of Western Australia, School of Computer Science and Software Engineering, Crawley, Australia
- Jian Liu 0015 — South China University of Technology, School of Electronic and Information Engineering, Guangzhou, China
- Jian Liu 0016 — Xidian University, School of Mechano-Electronic Engineering, Xian, China (and 1 more)
- Jian Liu 0017 — Chinese Academy of Sciences, Shanghai Institute of Applied Physics, China
- Jian Liu 0018 — Beijing University of Technology, Faculty of Information Technology, Beijing, China
- Jian Liu 0019 — Peking University, College of Chemistry and Molecular Engineering, Beijing, China
- Jian Liu 0020 — East China Jiaotong University, Department of Information Engineering, Nanchang, China
- Jian Liu 0022 — Xidian University, School of Artificial Intelligence, Key Laboratory of Intelligent Perception and Image Understanding, Xi'an, China
- Jian Liu 0023 — University of Jinan, School of Mathematical Sciences, Jinan, China
- Jian Liu 0024 — National University of Defense Technology, School of Electronic Science and Technology, Changsha, China
- Jian Liu 0025 — Nanjing University of Finances and Economics, College of Information Engineering, Nanjing, China
- Jian Liu 0026 — University of Science and Technology Beijing, School of Computer and Communication Engineering, Institute of Advanced Network Technology and New Services, Beijing, China (and 1 more)
- Jian Liu 0027 — Qorvo Inc., ESD Engineering, Greensboro, NC, USA (and 1 more)
- Jian Liu 0028 — Nankai University, College of Computer Science, Tianjin, China (and 2 more)
- Jian Liu 0029 — Nanjing University of Posts and Telecommunications (NJUPT), China
- Jian Liu 0030 — Fudan University, Shanghai, China
- Jian Liu 0031 — University of South Carolina, Department of Computer Science and Engineering, Columbia, SC, USA
- Jian Liu 0032 — Beijing Jiaotong University, School of Computer and Information Technology, Beijing, China (and 1 more)
- Jian Liu 0033 — Nanjing University of Science and Technology, China (and 1 more)
- Jian Liu 0034 — University of Technology Sydney, Australia
- Jian Liu 0035 — University of Illinois Urbana-Champaign, USA
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[j29]Fuming Lei, Xu Yang, Jian Liu, Runjiang Dou, Nanjian Wu:
DT-SCNN: dual-threshold spiking convolutional neural network with fewer operations and memory access for edge applications. Frontiers Comput. Neurosci. 18 (2024)- [j28]Honghao Wu, Wenchang Li, Jian Liu, Ting Hong, Tianyi Zhang:
Design of an integrated temperature and humidity sensor based on high dynamic range utilization rate ADC. IEICE Electron. Express 21(1): 20230164 (2024) - [j27]Shichong Zhai, Wenchang Li, Tianyi Zhang, Jian Liu:
A low power BJT-based CMOS temperature sensor using dynamic-distributing-bias circuit. IEICE Electron. Express 21(4): 20230500 (2024) - [j26]Xu Yang, Chunhe Yao, Lei Kang, Qian Luo, Nan Qi, Runjiang Dou, Shuangming Yu, Peng Feng, Zhongming Wei, Jian Liu, Kaiyou Wang, Nanjian Wu, Liyuan Liu:
A Bio-Inspired Spiking Vision Chip Based on SPAD Imaging and Direct Spike Computing for Versatile Edge Vision. IEEE J. Solid State Circuits 59(6): 1883-1898 (2024) - [j25]Min Liu, Ziteng Cai, Zhe Wang, Shaohua Zhou, Man-Kay Law, Jian Liu, Jianguo Ma, Nanjian Wu, Liyuan Liu:
A 3 THz CMOS Image Sensor. IEEE J. Solid State Circuits 59(9): 2934-2947 (2024) - [j24]Linfeng Wei, Wenchang Li, Tianyi Zhang, Jian Liu:
A design method of bipolar junction transistor for high-precision remote temperature sensing. Microelectron. J. 145: 106125 (2024) - [j23]Zhe Wang, Xu Yang, Na Tian, Min Liu, Ziteng Cai, Peng Feng, Runjiang Dou, Shuangming Yu, Nanjian Wu, Jian Liu, Liyuan Liu:
A 64 × 128 3D-Stacked SPAD Image Sensor for Low-Light Imaging. Sensors 24(13): 4358 (2024) - [j22]Siyuan Wei, Ke Ning, Lei Kang, Xuemin Zheng, Mingxin Zhao, Mengmeng Xu, Shuyu Wang, Xuanzhe Xu, Runjiang Dou, Shuangming Yu, Xu Yang, Jian Liu, Cong Shi, Nanjian Wu, Liyuan Liu:
A Real-Time 2D/3D Perception Visual Vector Processor for 1920 × 1080 High-Resolution High-Speed Intelligent Vision Chips. IEEE Trans. Circuits Syst. I Regul. Pap. 71(2): 740-753 (2024) - [j21]Tianyi Zhang, Wenchang Li, Jiapeng Li, Linfeng Wei, Jian Liu:
A 700nW Compact Temperature Sensor With a One-Point Trimmed Inaccuracy of +1.2/-1.0 °C for On-Chip Thermal Monitoring. IEEE Trans. Circuits Syst. II Express Briefs 71(8): 3675-3679 (2024) - [c40]Xinyu Shen, Zhao Zhang, Yong Chen, Yixi Li, Yidan Zhang, Guike Li, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu:
A 0.144 mm212.5-16GHz PVT-Tolerant Dual-Path Offset-Charge-Pump-Based Fractional-N PLL Achieving 72.9 fSRMs Jitter, -271.5dB FoMN, and Sub-10% Jitter Variation. CICC 2024: 1-2 - [c39]Yang Min, Yi Zhang, Tao Yang, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Nanjian Wu, Yonghui Lin, Huiyao Peng, Jingbo Shi, Nan Qi:
A 32Gb/s NRZ Low-Bias DFB Driver with Frequency Boosting for High Efficiency Data Transmission. ISCAS 2024: 1-4 - 2023
- [j20]Sikai Chen, Mingyang You, Yunqi Yang, Ye Jin, Ziyi Lin, Yihong Li, Leliang Li, Guike Li, Yujun Xie, Zhao Zhang, Binhao Wang, Ningfeng Tang, Faju Liu, Zheyu Fang, Jian Liu, Nanjian Wu, Yong Chen, Liyuan Liu, Ninghua Zhu, Ming Li, Nan Qi:
A 50Gb/s CMOS Optical Receiver With Si-Photonics PD for High-Speed Low-Latency Chiplet I/O. IEEE Trans. Circuits Syst. I Regul. Pap. 70(11): 4271-4282 (2023) - [j19]Mengmeng Xu, Zhongxing Zhang, Honglong Li, Qian Luo, Runjiang Dou, Liyuan Liu, Jian Liu, Nanjian Wu:
Hierarchical Parallel Vision Processor for High-Speed Ship Detection. IEEE Trans. Circuits Syst. II Express Briefs 70(3): 1164-1168 (2023) - [j18]Lei Kang, Xu Yang, Chi Zhang, Shuangming Yu, Runjiang Dou, Wenchang Li, Cong Shi, Jian Liu, Nanjian Wu, Liyuan Liu:
A 24.3 μJ/Image SNN Accelerator for DVS-Gesture With WS-LOS Dataflow and Sparse Methods. IEEE Trans. Circuits Syst. II Express Briefs 70(11): 4226-4230 (2023) - [c38]Yixi Li, Zhao Zhang, Yong Chen, Xinyu Shen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu:
A 12.75-to-16-GHz Spur-Jitter-Joint-Optimization SS-PLL Achieving -94.55-dBc Reference Spur, 31.9-fs Integrated Jitter and -260.1-dB FoM. A-SSCC 2023: 1-3 - [c37]Han Liu, Nan Qi, Donglai Lu, Zizheng Dong, Zhihan Zhang, Jian He, Guike Li, Leliang Li, Ye Liu, Ziyue Dang, Daigao Chen, Zhao Zhang, Jian Liu, Nanjian Wu, Xi Xiao, Liyuan Liu:
A $\boldsymbol{4} \times \boldsymbol{112}-\mathbf{Gb}/\mathbf{s}$ PAM-4 Silicon-Photonic Transceiver Front-End for Linear-Drive Co-Packaged Optics. A-SSCC 2023: 1-3 - [c36]Yidan Zhang, Zhao Zhang, Yiqing Xu, Xinyu Shen, Nan Qi, Nanjian Wu, Jian Liu, Liyuan Liu:
A Wideband Low-Noise Linear LiDAR Analog Front-End Achieving 1.6 GHz Bandwidth, $\boldsymbol{2.7}\ \mathbf{pA}/\mathbf{Hz}^{\boldsymbol{0.5}}$ Input Referred Noise, and 103 $\mathbf{dB}\mathbf{\Omega}$ Transimpedance Gain. A-SSCC 2023: 1-3 - [c35]Zhaoyu Zhang, Zhao Zhang, Yong Chen, Guoqing Wang, Xinyu Shen, Nan Qi, Guike Li, Shuangming Yu, Jian Liu, Nanjian Wu, Liyuan Liu:
A 0.0035-mm2 0.42-pJ/bit 8-32-Gb/s Reference-Less CDR Incorporating Adaptively-Biased ChargeSharing Integrator, Alexander PFD, and 1-Tap DFE. ESSCIRC 2023: 177-180 - [c34]Xinyu Shen, Zhao Zhang, Guike Li, Yong Chen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu:
A 4-12.1-GHz Fractional-N Ring Sampling PLL Based on Adaptively-Biased PD-Merged DTC Achieving -37.6± 0.9-dBc Integrated Phase Noise, 261.9-fs RMS Jitter, and -240.6-dB FoM. ESSCIRC 2023: 257-260 - [c33]Fuming Lei, Xu Yang, Jian Liu, Nanjian Wu, Cong Shi, Runjiang Dou, Liyuan Liu:
A Lightweight Integer-STBP On-Chip Learning Method of Spiking Neural Networks For Edge Processors. ICTA 2023: 1-2 - [c32]Huanhui Zhang, Xu Yang, Zhe Wang, Shuangming Yu, Peng Feng, Jian Liu, Nanjian Wu, Runjiang Dou, Liyuan Liu:
A 128×128 15µm-Pitch DROIC with Pixel-Level 14-Bit ADC. ICTA 2023: 1-2 - [c31]Guoqing Wang, Zhao Zhang, Xinyu Shen, Zhaoyu Zhang, Jian Liu, Nanjian Wu, Liyuan Liu:
A 64-Gb/s 0.33-pJ/bit PAM4 Receiver Analog Front-End with a Single-Stage Triple-Peaking CTLE Achieving 22.5-dB Boost in 40-nm CMOS Process. ICTA 2023: 120-121 - [c30]Yongliang Xiong, Yihao Yang, Qianli Ma, Yangming Ren, Leliang Li, Guike Li, Jian Liu, Yingtao Li, Binhao Wang, Nan Qi, Liyuan Liu:
A 400-Gb/s 64-QAM Optical Receiver with Monolithically Integrated TIA and Balanced-PD in 45-nm SOI CMOS. ICTA 2023: 186-187 - [c29]Jingbo Shi, Han Liu, Tao Yang, Ming Jin, Haowen Shu, Fenghe Yang, Lei Shi, Yuansheng Tao, Jianrui Deng, Ruixuan Chen, Changhao Han, Jian Liu, Nanjian Wu, Nan Qi, Liyuan Liu:
An 800G Integrated Silicon-Photonic Transmitter based on 16-Channel Mach-Zehnder Modulator and Co-Designed 5.35pJ/bit CMOS Drivers. ISCAS 2023: 1-4 - [c28]Zhao Zhang, Xinyu Shen, Zhaoyu Zhang, Guike Li, Nan Qi, Jian Liu, Yong Chen, Nanjian Wu, Liyuan Liu:
A O.4V-VDD 2.25-to-2.75GHz ULV-SS-PLL Achieving 236.6fsrms Jitter, -253.8dB Jitter-Power FoM, and -76.1dBc Reference Spur. ISSCC 2023: 86-87 - [c27]Min Liu, Ziteng Cai, Shaohua Zhou, Man-Kay Law, Jian Liu, Jianguo Ma, Nanjian Wu, Liyuan Liu:
A 16.4kPixel 3.08-to-3.86THz Digital Real-Time CMOS Image Sensor with 73dB Dynamic Range. ISSCC 2023: 98-99 - [c26]Zhao Zhang, Zhaoyu Zhang, Yong Chen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu:
A 64-Gb/s Reference-Less PAM4 CDR with Asymmetrical Linear Phase Detector Soring 231.5-fsrms Clock Jitter and 0.21-pJ/bit Energy Efficiency in 40-nm CMOS. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j17]Tianyi Zhang, Wenchang Li, Jinyu Xiao, Jian Liu:
Thermal field reconstruction based on weighted dictionary learning. IET Circuits Devices Syst. 16(3): 228-239 (2022) - [j16]Qiwen Liao, Yuguang Zhang, Siyuan Ma, Lei Wang, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Xi Xiao, Nan Qi:
A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR. IEEE J. Solid State Circuits 57(3): 767-780 (2022) - [j15]Jian He, Yuguang Zhang, Han Liu, Qiwen Liao, Zhao Zhang, Miaofeng Li, Fan Jiang, Jingbo Shi, Jian Liu, Nanjian Wu, Yong Chen, Patrick Yin Chiang, Ningmei Yu, Xi Xiao, Nan Qi:
A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 69(3): 1159-1170 (2022) - [j14]Jian He, Donglai Lu, Haiyun Xue, Sikai Chen, Han Liu, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Liyuan Liu, Nanjian Wu, Ningmei Yu, Fengman Liu, Xi Xiao, Yong Chen, Nan Qi:
Design of a PAM-4 VCSEL-Based Transceiver Front-End for Beyond-400G Short-Reach Optical Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 69(11): 4345-4357 (2022) - [j13]Hongtao Zhou, Runjiang Dou, Li Cheng, Jian Liu, Nanjian Wu:
A Provisional Labels-Reduced, Real-Time Connected Component Labeling Algorithm for Edge Hardware. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2997-3001 (2022) - [j12]Qian Luo, Chunhe Yao, Ke Ning, Xuemin Zheng, Mingxin Zhao, Li Cheng, Shuangming Yu, Jian Liu, Nanjian Wu, Liyuan Liu:
A Programmable and Flexible Vision Processor. IEEE Trans. Circuits Syst. II Express Briefs 69(9): 3884-3888 (2022) - [c25]Yihong Li, Sikai Chen, Yunqi Yang, Qianli Ma, Ming Zhong, Ziyi Lin, Leliang Li, Guike Li, Zhao Zhang, Liyuan Liu, Jian Liu, Nanjian Wu, Yong Chen, Qi Peng, Nan Qi:
A 50-Gb/s NRZ Receiver Targeting Low-Latency Multi-Chip Module Optical I/O in 45-nm SOI CMOS. APCCAS 2022: 360-363 - [c24]Zhaoyu Zhang, Xinyu Shen, Yixi Li, Guike Li, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Zhao Zhang:
A 0.006-mm26-to-20-Gb/s NRZ Bang-Bang Clock and Data Recovery Circuit With Dual-Path Loop. APCCAS 2022: 556-559 - [c23]Yixi Li, Xinyu Shen, Zhaoyu Zhang, Guike Li, Tao Yin, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Zhao Zhang:
A 0.004-mm2 O.7-V 31.654-μW BPSK Demodulator Incorporating Dual-Path Loop Self-Biased PLL. APCCAS 2022: 569-573 - [c22]Yunqi Yang, Ming Zhong, Qianli Ma, Ziyi Lin, Leliang Li, Guike Li, Liyuan Liu, Jian Liu, Nanjian Wu, Haikun Jia, Xinghui Liu, Nan Qi:
A 56Gb/s De-serializer with PAM-4 CDR for Chiplet Optical-I/O. ICTA 2022: 1-2 - [c21]Shichong Zhai, Wenchang Li, Jian Liu, Tianyi Zhang:
A Low Supply Sensitivity CMOS Temperature Sensor Using Dynamic-Distributing-Bias Circuit. ICTA 2022: 180-181 - [c20]Haozhe Xu, Siyuan Wei, Nan Qi, Peng Wu, Jian Liu, Nanjian Wu, Liyuan Liu, Shuangming Yu:
Floorplanning and Power/Ground Network Design for A Programmable Vision Chip. ICTA 2022: 184-185 - [c19]Sikai Chen, Jintao Xue, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Liyuan Liu, Binhao Wang, Yingtao Li, Nan Qi:
A 224-Gb/s Inverter-Based TIA with Interleaved Active-Feedback and Distributed Peaking in 28-nm CMOS for Silicon Photonic Receivers. ICTA 2022: 198-199 - 2021
- [j11]Shiya Lv, Jian Liu, Zhaoxin Geng:
Application of Memristors in Hardware Security: A Current State-of-the-Art Technology. Adv. Intell. Syst. 3(1): 2000127 (2021) - [c18]Donglai Lu, Jian He, Weizhong Li, Sikai Chen, Jian Liu, Nanjian Wu, Ningmei Yu, Liyuan Liu, Yong Chen, Xi Xiao, Nan Qi:
100Gb/s PAM-4 VCSEL Driver and TIA for Short-Reach 400G-1.6T Optical Interconnects. APCCAS 2021: 253-256 - [c17]Qiwen Liao, Miaofeng Li, Zhao Zhang, Jian Liu, Nanjian Wu, Xi Xiao, Nan Qi:
A 50Gb/s High-Efficiency Si-Photonic Transmitter With Lump-Segmented MZM and Integrated PAM4 CDR. CICC 2021: 1-2 - [c16]Mingyang You, Minjia Chen, Yihong Li, Guike Li, Jian Liu, Yong Chen, Yingtao Li, Nan Qi:
A 4×25Gb/s De-Serializer with Baud-Rate Sampling CDR and Standing-Wave Clock Distribution for NIC Optical Interconnects. ICTA 2021: 253-254 - [c15]Ming Zhong, Qingwen Wang, Yong Chen, Jian Liu, Liyuan Liu, Xinghua Wang, Xiaoming Xiong, Nan Qi:
A 4×25-Gb/s Serializer with Integrated CDR and 3-Tap FFE Driver for NIC Optical Interconnects. ICTA 2021: 255-256 - [c14]Han Liu, Guike Li, Jian Liu, Nanjian Wu, Liyuan Liu, Yingtao Li, Nan Qi:
A Fast-Transient Capacitor-Less Low-Dropout Regulator for Wideband Optical Transceivers. ICTA 2021: 257-258 - [c13]Tong Fang, Min Liu, Liyuan Liu, Ziteng Cai, Runjiang Dou, Peng Feng, Nan Qi, Zhao Zhang, Jian Liu, Nanjian Wu:
A 32×32 Array Terahertz Sensor in 65-nm CMOS Technology. ICTA 2021: 259-260 - 2020
- [j10]Song Ma, Liyuan Liu, Tong Fang, Jian Liu, Nanjian Wu:
A Discrete-Time Audio ΔΣ Modulator Using Dynamic Amplifier With Speed Enhancement and Flicker Noise Reduction Techniques. IEEE J. Solid State Circuits 55(2): 333-343 (2020) - [j9]Qiwen Liao, Nan Qi, Miaofeng Li, Shang Hu, Jian He, Bozhi Yin, Jingbo Shi, Jian Liu, Patrick Yin Chiang, Xi Xiao, Nanjian Wu:
A 50-Gb/s PAM4 Si-Photonic Transmitter With Digital-Assisted Distributed Driver and Integrated CDR in 40-nm CMOS. IEEE J. Solid State Circuits 55(5): 1282-1296 (2020) - [c12]Hongtao Zhou, Runjiang Dou, Shuangming Yu, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu:
A High-Speed Parallel FPGA Implementation of Harris Corner Detection. ICTA 2020: 71-72 - [c11]Zhenhua Guo, Chao Gu, Shuangming Yu, Liyuan Liu, Jian Liu, Peng Feng, Nanjian Wu:
A Compact On-chip Analog Memory Cell for Storing TOF Image Signal in CMOS Process. ICTA 2020: 83-84 - [c10]Kai Hao, Jian He, Leliang Li, Shuangming Yu, Liyuan Liu, Jian Liu, Ningmei Yu, Nanjian Wu, Nan Qi:
A 28GBaud High-Swing Linear Mach-Zehnder Modulators Driver for PAM-4 and Coherent Optical Communications. ICTA 2020: 94-95 - [c9]Chao Gu, Zhenhua Guo, Shuangming Yu, Liyuan Liu, Jian Liu, Peng Feng, Nanjian Wu:
A Method of Estimating FD Capacitance with Large Size Photodiode in High Speed Imaging (Invited Paper). ICTA 2020: 141-142 - [c8]Yang Liu, Nan Qi, Xiuli Xu, Weizhong Li, Lei Wang, Minjia Chen, Qixiang Cheng, Jingbo Shi, Liyuan Liu, Jian Liu, Xi Xiao, Nanjian Wu:
A 50Gb/s PAM-4 Optical Receiver with Si-Photonic PD and Linear TIA in 40nm CMOS. ISCAS 2020: 1-4
2010 – 2019
- 2019
- [j8]Jincheng Yang, Zhao Zhang, Nan Qi, Liyuan Liu, Jian Liu, Nanjian Wu:
A 0.45-to-1.8 GHz synthesized injection-locked bang-bang phase locked loop with fine frequency tuning circuits. Sci. China Inf. Sci. 62(6): 62405:1-62405:16 (2019) - [j7]Zhao Zhang, Jincheng Yang, Liyuan Liu, Nan Qi, Peng Feng, Jian Liu, Nanjian Wu:
0.1-5 GHz wideband ΔΣ fractional-N frequency synthesiser for software-defined radio application. IET Circuits Devices Syst. 13(7): 1071-1077 (2019) - [j6]Zhao Zhang, Jincheng Yang, Liyuan Liu, Nan Qi, Peng Feng, Jian Liu, Nanjian Wu:
An 18-23 GHz 57.4-fs RMS Jitter -253.5-dB FoM Sub-Harmonically Injection-Locked All-Digital PLL With Single-Ended Injection Technique and ILFD Aided Adaptive Injection Timing Alignment Technique. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(10): 3733-3746 (2019) - [c7]Song Ma, Liyuan Liu, Jian Liu, Nanjian Wu:
A 8-b 1GS/s 2b/cycle SAR ADC in 28-nm CMOS. APCCAS 2019: 21-24 - [c6]Xu Yang, Shuangming Yu, Liyuan Liu, Jian Liu, Nanjian Wu:
Efficient Reservoir Encoding Method for Near-Sensor Classification with Rate-Coding Based Spiking Convolutional Neural Networks. ISNN (2) 2019: 242-251 - 2018
- [j5]Jie Yang, Yongxing Yang, Zhe Chen, Liyuan Liu, Jian Liu, Nanjian Wu:
A Heterogeneous Parallel Processor for High-Speed Vision Chip. IEEE Trans. Circuits Syst. Video Technol. 28(3): 746-758 (2018) - [j4]Zhao Zhang, Jincheng Yang, Liyuan Liu, Peng Feng, Jian Liu, Nanjian Wu:
A 0.9-2.25-GHz Sub-0.2-mW/GHz Compact Low-Voltage Low-Power Hybrid Digital PLL With Loop Bandwidth-Tracking Technique. IEEE Trans. Very Large Scale Integr. Syst. 26(5): 933-944 (2018) - [c5]Tong Fang, Runjiang Dou, Liyuan Liu, Jian Liu, Nanjian Wu:
A 25 fps 32 × 24 Digital CMOS Terahertz Image Sensor. A-SSCC 2018: 87-90 - [c4]Zhao Zhang, Jincheng Yang, Liyuan Liu, Nan Qi, Peng Feng, Jian Liu, Nanjian Wu:
A Fast Auto-Frequency Calibration Technique for Wideband PLL with Wide Reference Frequency Range. A-SSCC 2018: 227-230 - 2017
- [j3]Zhao-yang Liu, Liyuan Liu, Zhao Zhang, Jian Liu, Nanjian Wu:
Terahertz detector for imaging in 180-nm standard CMOS process. Sci. China Inf. Sci. 60(8): 82401 (2017) - [j2]Zhao Zhang, Jincheng Yang, Liyuan Liu, Peng Feng, Jian Liu, Nanjian Wu:
A 1.25-to-6.25 GHz -237.2-dB FOM wideband self-biased PLL for multi-rate serial link data transmitter. IEICE Electron. Express 14(11): 20170422 (2017) - [c3]Tong Fang, Zhao-yang Liu, Liyuan Liu, Yuan-Yuan Li, Jun-qi Liu, Jian Liu, Nanjian Wu:
Detection of 3.0 THz wave with a detector in 65 nm standard CMOS process. A-SSCC 2017: 189-192 - [c2]Zhao Zhang, Jincheng Yang, Liyuan Liu, Peng Feng, Jian Liu, Nanjian Wu:
A 18-to-23 GHz -253.5dB-FoM sub-harmonically injection-locked ADPLL with ILFD aided adaptive injection timing alignment technique. A-SSCC 2017: 249-252 - 2015
- [j1]Yangfan Zhou, Zhongxiang Cao, Ye Han, Quanliang Li, Cong Shi, Runjiang Dou, Qi Qin, Jian Liu, Nanjian Wu:
A low power global shutter pixel with extended FD voltage swing range for large format high speed CMOS image sensor. Sci. China Inf. Sci. 58(4): 1-10 (2015) - [c1]Zhongxing Zhang, Jie Yang, Honglong Li, Liyuan Liu, Jian Liu, Nanjian Wu:
High-speed object detection based on a hierarchical parallel vision chip. ASICON 2015: 1-4
Coauthor Index
[j26] [j25] [j23] [j22] [c40] [j20] [j19] [j18] [c38] [c37] [c36] [c35] [c34] [c33] [c32] [c31] [c30] [c29] [c28] [c27] [c26] [j16] [j14] [j12] [c25] [c24] [c23] [c22] [c20] [c19] [c18] [c15] [c14] [c13] [j10] [c12] [c11] [c10] [c9] [c8] [j8] [j7] [j6] [c7] [c6] [j5] [j4] [c5] [c4] [j3] [j2] [c3] [c2] [c1]
[j29] [j26] [j25] [j23] [j22] [c40] [c39] [j20] [j19] [j18] [c38] [c37] [c36] [c35] [c34] [c33] [c32] [c31] [c29] [c28] [c27] [c26] [j16] [j15] [j14] [j13] [j12] [c25] [c24] [c23] [c22] [c20] [c18] [c17] [c14] [c13] [j10] [j9] [c12] [c11] [c10] [c9] [c8] [j8] [j7] [j6] [c7] [c6] [j5] [j4] [c5] [c4] [j3] [j2] [c3] [c2] [j1] [c1]
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2025-02-20 20:44 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
